From nobody Sat Apr 27 15:44:41 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1503646871855262.94233568255174; Fri, 25 Aug 2017 00:41:11 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4DFC421E7903A; Fri, 25 Aug 2017 00:38:32 -0700 (PDT) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BB54821E14547 for ; Fri, 25 Aug 2017 00:38:31 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP; 25 Aug 2017 00:41:07 -0700 Received: from jyao1-mobl.ccr.corp.intel.com ([10.239.196.35]) by fmsmga004.fm.intel.com with ESMTP; 25 Aug 2017 00:41:06 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,424,1498546800"; d="scan'208";a="304276355" From: Jiewen Yao To: edk2-devel@lists.01.org Date: Fri, 25 Aug 2017 15:40:44 +0800 Message-Id: <1503646846-1036-2-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1503646846-1036-1-git-send-email-jiewen.yao@intel.com> References: <1503646846-1036-1-git-send-email-jiewen.yao@intel.com> Subject: [edk2] [PATCH 1/3] IntelSiliconPkg/header: update PlatformVtdPolicy X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add flexible exception list format: 1) Support Device scope based reporting: Such as, Seg:0/StartBus:0/(Dev:1C|Func:0)/(Dev:0|Func:0) 2) Support PCI VendorId/DeviceId based reporting Such as, VID:8086|DID:9D2F|Rev:21|SVID:8086|SDID:7270 Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/Include/Protocol/PlatformVtdPolicy.h | 51 ++++++++++++++++= +++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/IntelSiliconPkg/Include/Protocol/PlatformVtdPolicy.h b/IntelSi= liconPkg/Include/Protocol/PlatformVtdPolicy.h index 29774c1..441da5c 100644 --- a/IntelSiliconPkg/Include/Protocol/PlatformVtdPolicy.h +++ b/IntelSiliconPkg/Include/Protocol/PlatformVtdPolicy.h @@ -16,6 +16,7 @@ #define __PLATFORM_VTD_POLICY_PROTOCOL_H__ =20 #include +#include =20 #define EDKII_PLATFORM_VTD_POLICY_PROTOCOL_GUID \ { \ @@ -66,6 +67,53 @@ EFI_STATUS OUT EDKII_PLATFORM_VTD_DEVICE_INFO *DeviceInfo ); =20 +#pragma pack(1) + +typedef struct { + // + // The segment number of the device + // + UINT16 SegmentNumber; + // + // Device scope definition in DMAR table + // + EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER DeviceScope; + // + // Pci path definition in DMAR table + // +//EFI_ACPI_DMAR_PCI_PATH PciPath[]; +} EDKII_PLATFORM_VTD_DEVICE_SCOPE; + +typedef struct { + UINT16 VendorId; + UINT16 DeviceId; + UINT8 RevisionId; + UINT16 SubsystemVendorId; + UINT16 SubsystemDeviceId; +} EDKII_PLATFORM_VTD_PCI_DEVICE_ID; + +#define EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO_TYPE_END 0 +#define EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO_TYPE_DEVICE_SCOPE 1 +#define EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO_TYPE_PCI_DEVICE_ID 2 + +typedef struct { + // + // EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO_TYPE_xxx defined above. + // + UINT8 Type; + // + // The length of the full data structure including EDKII_PLATFORM_VTD_EX= CEPTION_DEVICE_INFO and Data. + // + UINT8 Length; + // + // Data can be EDKII_PLATFORM_VTD_DEVICE_SCOPE or EDKII_PLATFORM_VTD_PCI= _DEVICE_ID + // +//UINT8 Data[Length - sizeof(EDKII_PLATFORM_VTD_EXCEPTION_DEVI= CE_INFO)]; +} EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO; + +#pragma pack() + + /** Get a list of the exception devices. =20 @@ -74,6 +122,7 @@ EFI_STATUS @param[in] This The protocol instance pointer. @param[out] DeviceInfoCount The count of the list of DeviceInfo. @param[out] DeviceInfo A callee allocated buffer to hold a li= st of DeviceInfo. + Each DeviceInfo pointer points to EDKI= I_PLATFORM_VTD_EXCEPTION_DEVICE_INFO. =20 @retval EFI_SUCCESS The DeviceInfoCount and DeviceInfo are ret= urned. @retval EFI_INVALID_PARAMETER DeviceInfoCount is NULL, or DeviceInfo is = NULL. @@ -85,7 +134,7 @@ EFI_STATUS (EFIAPI *EDKII_PLATFORM_VTD_POLICY_GET_EXCEPTION_DEVICE_LIST) ( IN EDKII_PLATFORM_VTD_POLICY_PROTOCOL *This, OUT UINTN *DeviceInfoCount, - OUT EDKII_PLATFORM_VTD_DEVICE_INFO **DeviceInfo + OUT VOID **DeviceInfo ); =20 struct _EDKII_PLATFORM_VTD_POLICY_PROTOCOL { --=20 2.7.4.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Apr 27 15:44:41 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 150364687459398.18904662113914; Fri, 25 Aug 2017 00:41:14 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 89CB621D1E2C4; Fri, 25 Aug 2017 00:38:34 -0700 (PDT) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D491821D1E2C1 for ; Fri, 25 Aug 2017 00:38:32 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP; 25 Aug 2017 00:41:08 -0700 Received: from jyao1-mobl.ccr.corp.intel.com ([10.239.196.35]) by fmsmga004.fm.intel.com with ESMTP; 25 Aug 2017 00:41:07 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,424,1498546800"; d="scan'208";a="304276365" From: Jiewen Yao To: edk2-devel@lists.01.org Date: Fri, 25 Aug 2017 15:40:45 +0800 Message-Id: <1503646846-1036-3-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1503646846-1036-1-git-send-email-jiewen.yao@intel.com> References: <1503646846-1036-1-git-send-email-jiewen.yao@intel.com> Subject: [edk2] [PATCH 2/3] IntelSiliconPkg/IntelVTd: update PlatformVtdPolicy X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" 1. Handle flexible exception list format. 1.1 Handle DeviceScope based device info. 1.2 Handle PciDeviceId based device info. 2. Reorg the PCI_DEVICE_INFORMATION 2.1 Merge data pointer reduce allocation times 2.2 Add PCI device id to PCI_DEVICE_INFORMATION 2.3 Rename PciDescriptor to avoid confusing. 3. Fix the debug message too long issue. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/IntelVTdDxe/DmaProtection.c | 143 ++++++++++++- IntelSiliconPkg/IntelVTdDxe/DmaProtection.h | 119 ++++++++--- IntelSiliconPkg/IntelVTdDxe/DmarAcpiTable.c | 48 +++-- IntelSiliconPkg/IntelVTdDxe/PciInfo.c | 212 ++++++++++++-------- IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 28 +-- IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c | 20 +- IntelSiliconPkg/IntelVTdDxe/VtdReg.c | 14 +- 7 files changed, 423 insertions(+), 161 deletions(-) diff --git a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.c b/IntelSiliconPkg/= IntelVTdDxe/DmaProtection.c index f0628b5..82ed4d2 100644 --- a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.c +++ b/IntelSiliconPkg/IntelVTdDxe/DmaProtection.c @@ -152,6 +152,132 @@ ReturnUefiMemoryMap ( } =20 /** + The scan bus callback function to always enable page attribute. + + @param[in] Context The context of the callback. + @param[in] Segment The segment of the source. + @param[in] Bus The bus of the source. + @param[in] Device The device of the source. + @param[in] Function The function of the source. + + @retval EFI_SUCCESS The VTd entry is updated to always enable = all DMA access for the specific device. +**/ +EFI_STATUS +EFIAPI +ScanBusCallbackAlwaysEnablePageAttribute ( + IN VOID *Context, + IN UINT16 Segment, + IN UINT8 Bus, + IN UINT8 Device, + IN UINT8 Function + ) +{ + VTD_SOURCE_ID SourceId; + EFI_STATUS Status; + + SourceId.Bits.Bus =3D Bus; + SourceId.Bits.Device =3D Device; + SourceId.Bits.Function =3D Function; + Status =3D AlwaysEnablePageAttribute (Segment, SourceId); + return Status; +} + +/** + Always enable the VTd page attribute for the device in the DeviceScope. + + @param[in] DeviceScope the input device scope data structure + + @retval EFI_SUCCESS The VTd entry is updated to always enable = all DMA access for the specific device in the device scope. +**/ +EFI_STATUS +AlwaysEnablePageAttributeDeviceScope ( + IN EDKII_PLATFORM_VTD_DEVICE_SCOPE *DeviceScope + ) +{ + UINT8 Bus; + UINT8 Device; + UINT8 Function; + VTD_SOURCE_ID SourceId; + UINT8 SecondaryBusNumber; + EFI_STATUS Status; + + Status =3D GetPciBusDeviceFunction (DeviceScope->SegmentNumber, &DeviceS= cope->DeviceScope, &Bus, &Device, &Function); + + if (DeviceScope->DeviceScope.Type =3D=3D EFI_ACPI_DEVICE_SCOPE_ENTRY_TYP= E_PCI_BRIDGE) { + // + // Need scan the bridge and add all devices. + // + SecondaryBusNumber =3D PciSegmentRead8 (PCI_SEGMENT_LIB_ADDRESS(Device= Scope->SegmentNumber, Bus, Device, Function, PCI_BRIDGE_SECONDARY_BUS_REGIS= TER_OFFSET)); + Status =3D ScanPciBus (NULL, DeviceScope->SegmentNumber, SecondaryBusN= umber, ScanBusCallbackAlwaysEnablePageAttribute); + return Status; + } else { + SourceId.Bits.Bus =3D Bus; + SourceId.Bits.Device =3D Device; + SourceId.Bits.Function =3D Function; + Status =3D AlwaysEnablePageAttribute (DeviceScope->SegmentNumber, Sour= ceId); + return Status; + } +} + +/** + Always enable the VTd page attribute for the device matching DeviceId. + + @param[in] PciDeviceId the input PCI device ID + + @retval EFI_SUCCESS The VTd entry is updated to always enable = all DMA access for the specific device matching DeviceId. +**/ +EFI_STATUS +AlwaysEnablePageAttributePciDeviceId ( + IN EDKII_PLATFORM_VTD_PCI_DEVICE_ID *PciDeviceId + ) +{ + UINTN VtdIndex; + UINTN PciIndex; + PCI_DEVICE_DATA *PciDeviceData; + EFI_STATUS Status; + + for (VtdIndex =3D 0; VtdIndex < mVtdUnitNumber; VtdIndex++) { + for (PciIndex =3D 0; PciIndex < mVtdUnitInformation[VtdIndex].PciDevic= eInfo.PciDeviceDataNumber; PciIndex++) { + PciDeviceData =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDe= viceData[PciIndex]; + + if (((PciDeviceId->VendorId =3D=3D 0xFFFF) || (PciDeviceId->VendorId= =3D=3D PciDeviceData->PciDeviceId.VendorId)) && + ((PciDeviceId->DeviceId =3D=3D 0xFFFF) || (PciDeviceId->DeviceId= =3D=3D PciDeviceData->PciDeviceId.DeviceId)) && + ((PciDeviceId->RevisionId =3D=3D 0xFF) || (PciDeviceId->Revision= Id =3D=3D PciDeviceData->PciDeviceId.RevisionId)) && + ((PciDeviceId->SubsystemVendorId =3D=3D 0xFFFF) || (PciDeviceId-= >SubsystemVendorId =3D=3D PciDeviceData->PciDeviceId.SubsystemVendorId)) && + ((PciDeviceId->SubsystemDeviceId =3D=3D 0xFFFF) || (PciDeviceId-= >SubsystemDeviceId =3D=3D PciDeviceData->PciDeviceId.SubsystemDeviceId)) ) { + Status =3D AlwaysEnablePageAttribute (mVtdUnitInformation[VtdIndex= ].Segment, PciDeviceData->PciSourceId); + if (EFI_ERROR(Status)) { + continue; + } + } + } + } + return EFI_SUCCESS; +} + +/** + Always enable the VTd page attribute for the device. + + @param[in] DeviceInfo the exception device information + + @retval EFI_SUCCESS The VTd entry is updated to always enable = all DMA access for the specific device in the device info. +**/ +EFI_STATUS +AlwaysEnablePageAttributeExceptionDeviceInfo ( + IN EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO *DeviceInfo + ) +{ + switch (DeviceInfo->Type) { + case EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO_TYPE_DEVICE_SCOPE: + return AlwaysEnablePageAttributeDeviceScope ((VOID *)(DeviceInfo + 1)); + case EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO_TYPE_PCI_DEVICE_ID: + return AlwaysEnablePageAttributePciDeviceId ((VOID *)(DeviceInfo + 1)); + default: + return EFI_UNSUPPORTED; + } +} + +/** Initialize platform VTd policy. **/ VOID @@ -159,10 +285,11 @@ InitializePlatformVTdPolicy ( VOID ) { - EFI_STATUS Status; - UINTN DeviceInfoCount; - EDKII_PLATFORM_VTD_DEVICE_INFO *DeviceInfo; - UINTN Index; + EFI_STATUS Status; + UINTN DeviceInfoCount; + VOID *DeviceInfo; + EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO *ThisDeviceInfo; + UINTN Index; =20 // // It is optional. @@ -173,10 +300,16 @@ InitializePlatformVTdPolicy ( (VOID **)&mPlatformVTdPolicy ); if (!EFI_ERROR(Status)) { + DEBUG ((DEBUG_INFO, "InitializePlatformVTdPolicy\n")); Status =3D mPlatformVTdPolicy->GetExceptionDeviceList (mPlatformVTdPol= icy, &DeviceInfoCount, &DeviceInfo); if (!EFI_ERROR(Status)) { + ThisDeviceInfo =3D DeviceInfo; for (Index =3D 0; Index < DeviceInfoCount; Index++) { - AlwaysEnablePageAttribute (DeviceInfo[Index].Segment, DeviceInfo[I= ndex].SourceId); + if (ThisDeviceInfo->Type =3D=3D EDKII_PLATFORM_VTD_EXCEPTION_DEVIC= E_INFO_TYPE_END) { + break; + } + AlwaysEnablePageAttributeExceptionDeviceInfo (ThisDeviceInfo); + ThisDeviceInfo =3D (VOID *)((UINTN)ThisDeviceInfo + ThisDeviceInfo= ->Length); } FreePool (DeviceInfo); } diff --git a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h b/IntelSiliconPkg/= IntelVTdDxe/DmaProtection.h index c311b29..f7b5292 100644 --- a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h +++ b/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h @@ -50,19 +50,24 @@ #define ALIGN_VALUE_LOW(Value, Alignment) ((Value) & (~((Alignment) - 1))) =20 // -// This is the initial max PCI descriptor. +// This is the initial max PCI DATA number. // The number may be enlarged later. // -#define MAX_PCI_DESCRIPTORS 0x100 +#define MAX_VTD_PCI_DATA_NUMBER 0x100 =20 typedef struct { - BOOLEAN IncludeAllFlag; - UINTN PciDescriptorNumber; - UINTN PciDescriptorMaxNumber; - BOOLEAN *IsRealPciDevice; - VTD_SOURCE_ID *PciDescriptors; + UINT8 DeviceType; + VTD_SOURCE_ID PciSourceId; + EDKII_PLATFORM_VTD_PCI_DEVICE_ID PciDeviceId; // for statistic analysis - UINTN *AccessCount; + UINTN AccessCount; +} PCI_DEVICE_DATA; + +typedef struct { + BOOLEAN IncludeAllFlag; + UINTN PciDeviceDataNumber; + UINTN PciDeviceDataMaxNumber; + PCI_DEVICE_DATA *PciDeviceData; } PCI_DEVICE_INFORMATION; =20 typedef struct { @@ -78,6 +83,29 @@ typedef struct { PCI_DEVICE_INFORMATION PciDeviceInfo; } VTD_UNIT_INFORMATION; =20 +/** + The scan bus callback function. + + It is called in PCI bus scan for each PCI device under the bus. + + @param[in] Context The context of the callback. + @param[in] Segment The segment of the source. + @param[in] Bus The bus of the source. + @param[in] Device The device of the source. + @param[in] Function The function of the source. + + @retval EFI_SUCCESS The specific PCI device is processed in th= e callback. +**/ +typedef +EFI_STATUS +(EFIAPI *SCAN_BUS_FUNC_CALLBACK_FUNC) ( + IN VOID *Context, + IN UINT16 Segment, + IN UINT8 Bus, + IN UINT8 Device, + IN UINT8 Function + ); + extern EFI_ACPI_DMAR_HEADER *mAcpiDmarTable; =20 extern UINT64 mVtdHostAddressWidthMask; @@ -182,13 +210,12 @@ DumpVtdECapRegs ( ); =20 /** - Register PCI device to VTd engine as PCI descriptor. + Register PCI device to VTd engine. =20 @param[in] VtdIndex The index of VTd engine. @param[in] Segment The segment of the source. @param[in] SourceId The SourceId of the source. - @param[in] IsRealPciDevice TRUE: It is a real PCI device. - FALSE: It is not a real PCI device. + @param[in] DeviceType The DMAR device scope type. @param[in] CheckExist TRUE: ERROR will be returned if the PC= I device is already registered. FALSE: SUCCESS will be returned if the= PCI device is registered. =20 @@ -201,25 +228,47 @@ RegisterPciDevice ( IN UINTN VtdIndex, IN UINT16 Segment, IN VTD_SOURCE_ID SourceId, - IN BOOLEAN IsRealPciDevice, + IN UINT8 DeviceType, IN BOOLEAN CheckExist ); =20 /** - Scan PCI bus and register PCI devices under the bus. + The scan bus callback function to always enable page attribute. =20 - @param[in] VtdIndex The index of VTd engine. + @param[in] Context The context of the callback. @param[in] Segment The segment of the source. @param[in] Bus The bus of the source. + @param[in] Device The device of the source. + @param[in] Function The function of the source. =20 - @retval EFI_SUCCESS The PCI devices under the bus are register= ed. - @retval EFI_OUT_OF_RESOURCES No enough resource to register a new PCI d= evice. + @retval EFI_SUCCESS The VTd entry is updated to always enable = all DMA access for the specific device. **/ EFI_STATUS -ScanPciBus ( - IN UINTN VtdIndex, +EFIAPI +ScanBusCallbackRegisterPciDevice ( + IN VOID *Context, IN UINT16 Segment, - IN UINT8 Bus + IN UINT8 Bus, + IN UINT8 Device, + IN UINT8 Function + ); + +/** + Scan PCI bus and invoke callback function for each PCI devices under the= bus. + + @param[in] Context The context of the callback function. + @param[in] Segment The segment of the source. + @param[in] Bus The bus of the source. + @param[in] Callback The callback function in PCI scan. + + @retval EFI_SUCCESS The PCI devices under the bus are scaned. +**/ +EFI_STATUS +ScanPciBus ( + IN VOID *Context, + IN UINT16 Segment, + IN UINT8 Bus, + IN SCAN_BUS_FUNC_CALLBACK_FUNC Callback ); =20 /** @@ -240,8 +289,8 @@ DumpPciDeviceInfo ( @param[out] ExtContextEntry The ExtContextEntry of the source. @param[out] ContextEntry The ContextEntry of the source. =20 - @return The index of the PCI descriptor. - @retval (UINTN)-1 The PCI descriptor is not found. + @return The index of the VTd engine. + @retval (UINTN)-1 The VTd engine is not found. **/ UINTN FindVtdIndexByPciDevice ( @@ -371,17 +420,17 @@ SetAccessAttribute ( ); =20 /** - Return the index of PCI descriptor. + Return the index of PCI data. =20 @param[in] VtdIndex The index used to identify a VTd engine. @param[in] Segment The Segment used to identify a VTd engine. @param[in] SourceId The SourceId used to identify a VTd engine= and table entry. =20 - @return The index of the PCI descriptor. - @retval (UINTN)-1 The PCI descriptor is not found. + @return The index of the PCI data. + @retval (UINTN)-1 The PCI data is not found. **/ UINTN -GetPciDescriptor ( +GetPciDataIndex ( IN UINTN VtdIndex, IN UINT16 Segment, IN VTD_SOURCE_ID SourceId @@ -490,4 +539,24 @@ FlushPageTableMemory ( IN UINTN Size ); =20 +/** + Get PCI device information from DMAR DevScopeEntry. + + @param[in] Segment The segment number. + @param[in] DmarDevScopeEntry DMAR DevScopeEntry + @param[out] Bus The bus number. + @param[out] Device The device number. + @param[out] Function The function number. + + @retval EFI_SUCCESS The PCI device information is returned. +**/ +EFI_STATUS +GetPciBusDeviceFunction ( + IN UINT16 Segment, + IN EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER *DmarDevScopeEntry, + OUT UINT8 *Bus, + OUT UINT8 *Device, + OUT UINT8 *Function + ); + #endif diff --git a/IntelSiliconPkg/IntelVTdDxe/DmarAcpiTable.c b/IntelSiliconPkg/= IntelVTdDxe/DmarAcpiTable.c index 84b5485..2456b0c 100644 --- a/IntelSiliconPkg/IntelVTdDxe/DmarAcpiTable.c +++ b/IntelSiliconPkg/IntelVTdDxe/DmarAcpiTable.c @@ -49,7 +49,11 @@ DumpDmarDeviceScopeEntry ( =20 DEBUG ((DEBUG_INFO, " *****************************************************************= ********\n" + )); + DEBUG ((DEBUG_INFO, " * DMA-Remapping Device Scope Entry Structure = *\n" + )); + DEBUG ((DEBUG_INFO, " *****************************************************************= ********\n" )); DEBUG ((DEBUG_INFO, @@ -140,7 +144,11 @@ DumpDmarAndd ( =20 DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" + )); + DEBUG ((DEBUG_INFO, " * ACPI Name-space Device Declaration Structure = *\n" + )); + DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" )); DEBUG ((DEBUG_INFO, @@ -189,7 +197,11 @@ DumpDmarRhsa ( =20 DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" + )); + DEBUG ((DEBUG_INFO, " * Remapping Hardware Status Affinity Structure = *\n" + )); + DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" )); DEBUG ((DEBUG_INFO, @@ -241,7 +253,11 @@ DumpDmarAtsr ( =20 DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" + )); + DEBUG ((DEBUG_INFO, " * Root Port ATS Capability Reporting Structure = *\n" + )); + DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" )); DEBUG ((DEBUG_INFO, @@ -305,7 +321,11 @@ DumpDmarRmrr ( =20 DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" + )); + DEBUG ((DEBUG_INFO, " * Reserved Memory Region Reporting Structure = *\n" + )); + DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" )); DEBUG ((DEBUG_INFO, @@ -369,7 +389,11 @@ DumpDmarDrhd ( =20 DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" + )); + DEBUG ((DEBUG_INFO, " * DMA-Remapping Hardware Definition Structure = *\n" + )); + DEBUG ((DEBUG_INFO, " *******************************************************************= ********\n" )); DEBUG ((DEBUG_INFO, @@ -440,7 +464,11 @@ DumpAcpiDMAR ( // DEBUG ((DEBUG_INFO, "*********************************************************************= ********\n" + )); + DEBUG ((DEBUG_INFO, "* DMAR Table = *\n" + )); + DEBUG ((DEBUG_INFO, "*********************************************************************= ********\n" )); =20 @@ -548,11 +576,11 @@ GetPciBusDeviceFunction ( switch (DmarDevScopeEntry->Type) { case EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT: case EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE: - while ((UINTN)DmarPciPath < (UINTN)DmarDevScopeEntry + DmarDevScopeEnt= ry->Length) { + while ((UINTN)DmarPciPath + sizeof(EFI_ACPI_DMAR_PCI_PATH) < (UINTN)Dm= arDevScopeEntry + DmarDevScopeEntry->Length) { MyBus =3D PciSegmentRead8 (PCI_SEGMENT_LIB_ADDRESS(Segment, MyBus, M= yDevice, MyFunction, PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET)); + DmarPciPath ++; MyDevice =3D DmarPciPath->Device; MyFunction =3D DmarPciPath->Function; - DmarPciPath ++; } break; case EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC: @@ -589,7 +617,6 @@ ProcessDhrd ( UINT8 SecondaryBusNumber; EFI_STATUS Status; VTD_SOURCE_ID SourceId; - BOOLEAN IsRealPciDevice; =20 mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress =3D (UINTN)DmarDrhd->Re= gisterBaseAddress; DEBUG ((DEBUG_INFO," VTD (%d) BaseAddress - 0x%016lx\n", VtdIndex, Dma= rDrhd->RegisterBaseAddress)); @@ -600,7 +627,7 @@ ProcessDhrd ( mVtdUnitInformation[VtdIndex].PciDeviceInfo.IncludeAllFlag =3D TRUE; DEBUG ((DEBUG_INFO," ProcessDhrd: with INCLUDE ALL\n")); =20 - Status =3D ScanPciBus(VtdIndex, DmarDrhd->SegmentNumber, 0); + Status =3D ScanPciBus((VOID *)VtdIndex, DmarDrhd->SegmentNumber, 0, Sc= anBusCallbackRegisterPciDevice); if (EFI_ERROR (Status)) { return Status; } @@ -616,15 +643,6 @@ ProcessDhrd ( if (EFI_ERROR (Status)) { return Status; } - switch (DmarDevScopeEntry->Type) { - case EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT: - case EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE: - IsRealPciDevice =3D TRUE; - break; - default: - IsRealPciDevice =3D FALSE; - break; - } =20 DEBUG ((DEBUG_INFO," ProcessDhrd: ")); switch (DmarDevScopeEntry->Type) { @@ -650,7 +668,7 @@ ProcessDhrd ( SourceId.Bits.Device =3D Device; SourceId.Bits.Function =3D Function; =20 - Status =3D RegisterPciDevice (VtdIndex, DmarDrhd->SegmentNumber, Sourc= eId, IsRealPciDevice, TRUE); + Status =3D RegisterPciDevice (VtdIndex, DmarDrhd->SegmentNumber, Sourc= eId, DmarDevScopeEntry->Type, TRUE); if (EFI_ERROR (Status)) { // // There might be duplication for special device other than standard= PCI device. @@ -665,7 +683,7 @@ ProcessDhrd ( switch (DmarDevScopeEntry->Type) { case EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE: SecondaryBusNumber =3D PciSegmentRead8 (PCI_SEGMENT_LIB_ADDRESS(Dmar= Drhd->SegmentNumber, Bus, Device, Function, PCI_BRIDGE_SECONDARY_BUS_REGIST= ER_OFFSET)); - Status =3D ScanPciBus (VtdIndex, DmarDrhd->SegmentNumber, SecondaryB= usNumber); + Status =3D ScanPciBus ((VOID *)VtdIndex, DmarDrhd->SegmentNumber, Se= condaryBusNumber, ScanBusCallbackRegisterPciDevice); if (EFI_ERROR (Status)) { return Status; } diff --git a/IntelSiliconPkg/IntelVTdDxe/PciInfo.c b/IntelSiliconPkg/IntelV= TdDxe/PciInfo.c index 27e253d..36750b3 100644 --- a/IntelSiliconPkg/IntelVTdDxe/PciInfo.c +++ b/IntelSiliconPkg/IntelVTdDxe/PciInfo.c @@ -14,32 +14,34 @@ #include "DmaProtection.h" =20 /** - Return the index of PCI descriptor. + Return the index of PCI data. =20 @param[in] VtdIndex The index used to identify a VTd engine. @param[in] Segment The Segment used to identify a VTd engine. @param[in] SourceId The SourceId used to identify a VTd engine= and table entry. =20 - @return The index of the PCI descriptor. - @retval (UINTN)-1 The PCI descriptor is not found. + @return The index of the PCI data. + @retval (UINTN)-1 The PCI data is not found. **/ UINTN -GetPciDescriptor ( +GetPciDataIndex ( IN UINTN VtdIndex, IN UINT16 Segment, IN VTD_SOURCE_ID SourceId ) { - UINTN Index; + UINTN Index; + VTD_SOURCE_ID *PciSourceId; =20 if (Segment !=3D mVtdUnitInformation[VtdIndex].Segment) { return (UINTN)-1; } =20 - for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDescriptorNumber; Index++) { - if ((mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDescriptors[Index]= .Bits.Bus =3D=3D SourceId.Bits.Bus) && - (mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDescriptors[Index]= .Bits.Device =3D=3D SourceId.Bits.Device) && - (mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDescriptors[Index]= .Bits.Function =3D=3D SourceId.Bits.Function) ) { + for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDeviceDataNumber; Index++) { + PciSourceId =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDevice= Data[Index].PciSourceId; + if ((PciSourceId->Bits.Bus =3D=3D SourceId.Bits.Bus) && + (PciSourceId->Bits.Device =3D=3D SourceId.Bits.Device) && + (PciSourceId->Bits.Function =3D=3D SourceId.Bits.Function) ) { return Index; } } @@ -48,13 +50,12 @@ GetPciDescriptor ( } =20 /** - Register PCI device to VTd engine as PCI descriptor. + Register PCI device to VTd engine. =20 @param[in] VtdIndex The index of VTd engine. @param[in] Segment The segment of the source. @param[in] SourceId The SourceId of the source. - @param[in] IsRealPciDevice TRUE: It is a real PCI device. - FALSE: It is not a real PCI device. + @param[in] DeviceType The DMAR device scope type. @param[in] CheckExist TRUE: ERROR will be returned if the PC= I device is already registered. FALSE: SUCCESS will be returned if the= PCI device is registered. =20 @@ -67,17 +68,16 @@ RegisterPciDevice ( IN UINTN VtdIndex, IN UINT16 Segment, IN VTD_SOURCE_ID SourceId, - IN BOOLEAN IsRealPciDevice, + IN UINT8 DeviceType, IN BOOLEAN CheckExist ) { - PCI_DEVICE_INFORMATION *PciDeviceInfo; - VTD_SOURCE_ID *PciDescriptor; - UINTN PciDescriptorIndex; - UINTN Index; - BOOLEAN *NewIsRealPciDevice; - VTD_SOURCE_ID *NewPciDescriptors; - UINTN *NewAccessCount; + PCI_DEVICE_INFORMATION *PciDeviceInfo; + VTD_SOURCE_ID *PciSourceId; + UINTN PciDataIndex; + UINTN Index; + PCI_DEVICE_DATA *NewPciDeviceData; + EDKII_PLATFORM_VTD_PCI_DEVICE_ID *PciDeviceId; =20 PciDeviceInfo =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo; =20 @@ -86,72 +86,71 @@ RegisterPciDevice ( // Do not register device in other VTD Unit // for (Index =3D 0; Index < VtdIndex; Index++) { - PciDescriptorIndex =3D GetPciDescriptor (Index, Segment, SourceId); - if (PciDescriptorIndex !=3D (UINTN)-1) { + PciDataIndex =3D GetPciDataIndex (Index, Segment, SourceId); + if (PciDataIndex !=3D (UINTN)-1) { DEBUG ((DEBUG_INFO, " RegisterPciDevice: PCI S%04x B%02x D%02x F%= 02x already registered by Other Vtd(%d)\n", Segment, SourceId.Bits.Bus, Sou= rceId.Bits.Device, SourceId.Bits.Function, Index)); return EFI_SUCCESS; } } } =20 - PciDescriptorIndex =3D GetPciDescriptor (VtdIndex, Segment, SourceId); - if (PciDescriptorIndex =3D=3D (UINTN)-1) { + PciDataIndex =3D GetPciDataIndex (VtdIndex, Segment, SourceId); + if (PciDataIndex =3D=3D (UINTN)-1) { // // Register new // =20 - if (PciDeviceInfo->PciDescriptorNumber >=3D PciDeviceInfo->PciDescript= orMaxNumber) { + if (PciDeviceInfo->PciDeviceDataNumber >=3D PciDeviceInfo->PciDeviceDa= taMaxNumber) { // // Reallocate // - NewIsRealPciDevice =3D AllocateZeroPool (sizeof(*NewIsRealPciDevice)= * (PciDeviceInfo->PciDescriptorMaxNumber + MAX_PCI_DESCRIPTORS)); - if (NewIsRealPciDevice =3D=3D NULL) { - return EFI_OUT_OF_RESOURCES; - } - NewPciDescriptors =3D AllocateZeroPool (sizeof(*NewPciDescriptors) *= (PciDeviceInfo->PciDescriptorMaxNumber + MAX_PCI_DESCRIPTORS)); - if (NewPciDescriptors =3D=3D NULL) { - FreePool (NewIsRealPciDevice); + NewPciDeviceData =3D AllocateZeroPool (sizeof(*NewPciDeviceData) * (= PciDeviceInfo->PciDeviceDataMaxNumber + MAX_VTD_PCI_DATA_NUMBER)); + if (NewPciDeviceData =3D=3D NULL) { return EFI_OUT_OF_RESOURCES; } - NewAccessCount =3D AllocateZeroPool (sizeof(*NewAccessCount) * (PciD= eviceInfo->PciDescriptorMaxNumber + MAX_PCI_DESCRIPTORS)); - if (NewAccessCount =3D=3D NULL) { - FreePool (NewIsRealPciDevice); - FreePool (NewPciDescriptors); - return EFI_OUT_OF_RESOURCES; - } - PciDeviceInfo->PciDescriptorMaxNumber +=3D MAX_PCI_DESCRIPTORS; - if (PciDeviceInfo->IsRealPciDevice !=3D NULL) { - CopyMem (NewIsRealPciDevice, PciDeviceInfo->IsRealPciDevice, sizeo= f(*NewIsRealPciDevice) * PciDeviceInfo->PciDescriptorNumber); - FreePool (PciDeviceInfo->IsRealPciDevice); - } - PciDeviceInfo->IsRealPciDevice =3D NewIsRealPciDevice; - if (PciDeviceInfo->PciDescriptors !=3D NULL) { - CopyMem (NewPciDescriptors, PciDeviceInfo->PciDescriptors, sizeof(= *NewPciDescriptors) * PciDeviceInfo->PciDescriptorNumber); - FreePool (PciDeviceInfo->PciDescriptors); + PciDeviceInfo->PciDeviceDataMaxNumber +=3D MAX_VTD_PCI_DATA_NUMBER; + if (PciDeviceInfo->PciDeviceData !=3D NULL) { + CopyMem (NewPciDeviceData, PciDeviceInfo->PciDeviceData, sizeof(*N= ewPciDeviceData) * PciDeviceInfo->PciDeviceDataNumber); + FreePool (PciDeviceInfo->PciDeviceData); } - PciDeviceInfo->PciDescriptors =3D NewPciDescriptors; - if (PciDeviceInfo->AccessCount !=3D NULL) { - CopyMem (NewAccessCount, PciDeviceInfo->AccessCount, sizeof(*NewAc= cessCount) * PciDeviceInfo->PciDescriptorNumber); - FreePool (PciDeviceInfo->AccessCount); - } - PciDeviceInfo->AccessCount =3D NewAccessCount; + PciDeviceInfo->PciDeviceData =3D NewPciDeviceData; } =20 - ASSERT (PciDeviceInfo->PciDescriptorNumber < PciDeviceInfo->PciDescrip= torMaxNumber); - - PciDescriptor =3D &PciDeviceInfo->PciDescriptors[PciDeviceInfo->PciDes= criptorNumber]; - PciDescriptor->Bits.Bus =3D SourceId.Bits.Bus; - PciDescriptor->Bits.Device =3D SourceId.Bits.Device; - PciDescriptor->Bits.Function =3D SourceId.Bits.Function; - PciDeviceInfo->IsRealPciDevice[PciDeviceInfo->PciDescriptorNumber] =3D= IsRealPciDevice; + ASSERT (PciDeviceInfo->PciDeviceDataNumber < PciDeviceInfo->PciDeviceD= ataMaxNumber); =20 - PciDeviceInfo->PciDescriptorNumber++; + PciSourceId =3D &PciDeviceInfo->PciDeviceData[PciDeviceInfo->PciDevice= DataNumber].PciSourceId; + PciSourceId->Bits.Bus =3D SourceId.Bits.Bus; + PciSourceId->Bits.Device =3D SourceId.Bits.Device; + PciSourceId->Bits.Function =3D SourceId.Bits.Function; =20 DEBUG ((DEBUG_INFO, " RegisterPciDevice: PCI S%04x B%02x D%02x F%02x"= , Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function)= ); - if (!IsRealPciDevice) { + + PciDeviceId =3D &PciDeviceInfo->PciDeviceData[PciDeviceInfo->PciDevice= DataNumber].PciDeviceId; + if ((DeviceType =3D=3D EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT) = || + (DeviceType =3D=3D EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE)) { + PciDeviceId->VendorId =3D PciSegmentRead16 (PCI_SEGMENT_LIB_ADDRES= S(Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function,= PCI_VENDOR_ID_OFFSET)); + PciDeviceId->DeviceId =3D PciSegmentRead16 (PCI_SEGMENT_LIB_ADDRES= S(Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function,= PCI_DEVICE_ID_OFFSET)); + PciDeviceId->RevisionId =3D PciSegmentRead8 (PCI_SEGMENT_LIB_ADDRESS= (Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function, = PCI_REVISION_ID_OFFSET)); + + DEBUG ((DEBUG_INFO, " (%04x:%04x:%02x", PciDeviceId->VendorId, PciDe= viceId->DeviceId, PciDeviceId->RevisionId)); + + if (DeviceType =3D=3D EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT)= { + PciDeviceId->SubsystemVendorId =3D PciSegmentRead16 (PCI_SEGMENT_L= IB_ADDRESS(Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.= Function, PCI_SUBSYSTEM_VENDOR_ID_OFFSET)); + PciDeviceId->SubsystemDeviceId =3D PciSegmentRead16 (PCI_SEGMENT_L= IB_ADDRESS(Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.= Function, PCI_SUBSYSTEM_ID_OFFSET)); + DEBUG ((DEBUG_INFO, ":%04x:%04x", PciDeviceId->SubsystemVendorId, = PciDeviceId->SubsystemDeviceId)); + } + DEBUG ((DEBUG_INFO, ")")); + } + + PciDeviceInfo->PciDeviceData[PciDeviceInfo->PciDeviceDataNumber].Devic= eType =3D DeviceType; + + if ((DeviceType !=3D EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT) && + (DeviceType !=3D EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE)) { DEBUG ((DEBUG_INFO, " (*)")); } DEBUG ((DEBUG_INFO, "\n")); + + PciDeviceInfo->PciDeviceDataNumber++; } else { if (CheckExist) { DEBUG ((DEBUG_INFO, " RegisterPciDevice: PCI S%04x B%02x D%02x F%02= x already registered\n", Segment, SourceId.Bits.Bus, SourceId.Bits.Device, = SourceId.Bits.Function)); @@ -163,20 +162,67 @@ RegisterPciDevice ( } =20 /** - Scan PCI bus and register PCI devices under the bus. + The scan bus callback function to register PCI device. =20 - @param[in] VtdIndex The index of VTd engine. + @param[in] Context The context of the callback. @param[in] Segment The segment of the source. @param[in] Bus The bus of the source. + @param[in] Device The device of the source. + @param[in] Function The function of the source. =20 - @retval EFI_SUCCESS The PCI devices under the bus are register= ed. - @retval EFI_OUT_OF_RESOURCES No enough resource to register a new PCI d= evice. + @retval EFI_SUCCESS The PCI device is registered. **/ EFI_STATUS -ScanPciBus ( - IN UINTN VtdIndex, +EFIAPI +ScanBusCallbackRegisterPciDevice ( + IN VOID *Context, IN UINT16 Segment, - IN UINT8 Bus + IN UINT8 Bus, + IN UINT8 Device, + IN UINT8 Function + ) +{ + VTD_SOURCE_ID SourceId; + UINTN VtdIndex; + UINT8 BaseClass; + UINT8 SubClass; + UINT8 DeviceType; + EFI_STATUS Status; + + VtdIndex =3D (UINTN)Context; + SourceId.Bits.Bus =3D Bus; + SourceId.Bits.Device =3D Device; + SourceId.Bits.Function =3D Function; + + DeviceType =3D EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT; + BaseClass =3D PciSegmentRead8 (PCI_SEGMENT_LIB_ADDRESS(Segment, Bus, Dev= ice, Function, PCI_CLASSCODE_OFFSET + 2)); + if (BaseClass =3D=3D PCI_CLASS_BRIDGE) { + SubClass =3D PciSegmentRead8 (PCI_SEGMENT_LIB_ADDRESS(Segment, Bus, De= vice, Function, PCI_CLASSCODE_OFFSET + 1)); + if (SubClass =3D=3D PCI_CLASS_BRIDGE_P2P) { + DeviceType =3D EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE; + } + } + + Status =3D RegisterPciDevice (VtdIndex, Segment, SourceId, DeviceType, F= ALSE); + return Status; +} + +/** + Scan PCI bus and invoke callback function for each PCI devices under the= bus. + + @param[in] Context The context of the callback function. + @param[in] Segment The segment of the source. + @param[in] Bus The bus of the source. + @param[in] Callback The callback function in PCI scan. + + @retval EFI_SUCCESS The PCI devices under the bus are scaned. +**/ +EFI_STATUS +ScanPciBus ( + IN VOID *Context, + IN UINT16 Segment, + IN UINT8 Bus, + IN SCAN_BUS_FUNC_CALLBACK_FUNC Callback ) { UINT8 Device; @@ -189,7 +235,6 @@ ScanPciBus ( UINT16 VendorID; UINT16 DeviceID; EFI_STATUS Status; - VTD_SOURCE_ID SourceId; =20 // Scan the PCI bus for devices for (Device =3D 0; Device < PCI_MAX_DEVICE + 1; Device++) { @@ -205,10 +250,7 @@ ScanPciBus ( continue; } =20 - SourceId.Bits.Bus =3D Bus; - SourceId.Bits.Device =3D Device; - SourceId.Bits.Function =3D Function; - Status =3D RegisterPciDevice (VtdIndex, Segment, SourceId, TRUE, FAL= SE); + Status =3D Callback (Context, Segment, Bus, Device, Function); if (EFI_ERROR (Status)) { return Status; } @@ -220,7 +262,7 @@ ScanPciBus ( SecondaryBusNumber =3D PciSegmentRead8 (PCI_SEGMENT_LIB_ADDRESS(= Segment, Bus, Device, Function, PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET)); DEBUG ((DEBUG_INFO," ScanPciBus: PCI bridge S%04x B%02x D%02x F= %02x (SecondBus:%02x)\n", Segment, Bus, Device, Function, SecondaryBusNumbe= r)); if (SecondaryBusNumber !=3D 0) { - Status =3D ScanPciBus (VtdIndex, Segment, SecondaryBusNumber); + Status =3D ScanPciBus (Context, Segment, SecondaryBusNumber, C= allback); if (EFI_ERROR (Status)) { return Status; } @@ -246,15 +288,15 @@ DumpPciDeviceInfo ( UINTN Index; =20 DEBUG ((DEBUG_INFO,"PCI Device Information (Number 0x%x, IncludeAll - %d= ):\n", - mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDescriptorNumber, + mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDeviceDataNumber, mVtdUnitInformation[VtdIndex].PciDeviceInfo.IncludeAllFlag )); - for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDescriptorNumber; Index++) { + for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDeviceDataNumber; Index++) { DEBUG ((DEBUG_INFO," S%04x B%02x D%02x F%02x\n", mVtdUnitInformation[VtdIndex].Segment, - mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDescriptors[Index].Bi= ts.Bus, - mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDescriptors[Index].Bi= ts.Device, - mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDescriptors[Index].Bi= ts.Function + mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDeviceData[Index].Pci= SourceId.Bits.Bus, + mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDeviceData[Index].Pci= SourceId.Bits.Device, + mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDeviceData[Index].Pci= SourceId.Bits.Function )); } } @@ -267,8 +309,8 @@ DumpPciDeviceInfo ( @param[out] ExtContextEntry The ExtContextEntry of the source. @param[out] ContextEntry The ContextEntry of the source. =20 - @return The index of the PCI descriptor. - @retval (UINTN)-1 The PCI descriptor is not found. + @return The index of the VTd engine. + @retval (UINTN)-1 The VTd engine is not found. **/ UINTN FindVtdIndexByPciDevice ( @@ -285,15 +327,15 @@ FindVtdIndexByPciDevice ( VTD_EXT_ROOT_ENTRY *ExtRootEntry; VTD_EXT_CONTEXT_ENTRY *ExtContextEntryTable; VTD_EXT_CONTEXT_ENTRY *ThisExtContextEntry; - UINTN PciDescriptorIndex; + UINTN PciDataIndex; =20 for (VtdIndex =3D 0; VtdIndex < mVtdUnitNumber; VtdIndex++) { if (Segment !=3D mVtdUnitInformation[VtdIndex].Segment) { continue; } =20 - PciDescriptorIndex =3D GetPciDescriptor (VtdIndex, Segment, SourceId); - if (PciDescriptorIndex =3D=3D (UINTN)-1) { + PciDataIndex =3D GetPciDataIndex (VtdIndex, Segment, SourceId); + if (PciDataIndex =3D=3D (UINTN)-1) { continue; } =20 diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c b/IntelSiliconP= kg/IntelVTdDxe/TranslationTable.c index bc0c24c..cd3111c 100644 --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c @@ -86,16 +86,16 @@ CreateContextEntry ( VTD_ROOT_ENTRY *RootEntry; VTD_CONTEXT_ENTRY *ContextEntryTable; VTD_CONTEXT_ENTRY *ContextEntry; - VTD_SOURCE_ID *PciDescriptor; + VTD_SOURCE_ID *PciSourceId; VTD_SOURCE_ID SourceId; UINTN MaxBusNumber; UINTN EntryTablePages; =20 MaxBusNumber =3D 0; - for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDescriptorNumber; Index++) { - PciDescriptor =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDesc= riptors[Index]; - if (PciDescriptor->Bits.Bus > MaxBusNumber) { - MaxBusNumber =3D PciDescriptor->Bits.Bus; + for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDeviceDataNumber; Index++) { + PciSourceId =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDevice= Data[Index].PciSourceId; + if (PciSourceId->Bits.Bus > MaxBusNumber) { + MaxBusNumber =3D PciSourceId->Bits.Bus; } } DEBUG ((DEBUG_INFO," MaxBusNumber - 0x%x\n", MaxBusNumber)); @@ -111,12 +111,12 @@ CreateContextEntry ( mVtdUnitInformation[VtdIndex].RootEntryTable =3D (VTD_ROOT_ENTRY *)Buffe= r; Buffer =3D (UINT8 *)Buffer + EFI_PAGES_TO_SIZE (RootPages); =20 - for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDescriptorNumber; Index++) { - PciDescriptor =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDesc= riptors[Index]; + for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDeviceDataNumber; Index++) { + PciSourceId =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDevice= Data[Index].PciSourceId; =20 - SourceId.Bits.Bus =3D PciDescriptor->Bits.Bus; - SourceId.Bits.Device =3D PciDescriptor->Bits.Device; - SourceId.Bits.Function =3D PciDescriptor->Bits.Function; + SourceId.Bits.Bus =3D PciSourceId->Bits.Bus; + SourceId.Bits.Device =3D PciSourceId->Bits.Device; + SourceId.Bits.Function =3D PciSourceId->Bits.Function; =20 RootEntry =3D &mVtdUnitInformation[VtdIndex].RootEntryTable[SourceId.I= ndex.RootIndex]; if (RootEntry->Bits.Present =3D=3D 0) { @@ -886,7 +886,7 @@ SetAccessAttribute ( VTD_CONTEXT_ENTRY *ContextEntry; VTD_SECOND_LEVEL_PAGING_ENTRY *SecondLevelPagingEntry; UINT64 Pt; - UINTN PciDescriptorIndex; + UINTN PciDataIndex; UINT16 DomainIdentifier; =20 SecondLevelPagingEntry =3D NULL; @@ -899,12 +899,12 @@ SetAccessAttribute ( return EFI_DEVICE_ERROR; } =20 - PciDescriptorIndex =3D GetPciDescriptor (VtdIndex, Segment, SourceId); - mVtdUnitInformation[VtdIndex].PciDeviceInfo.AccessCount[PciDescriptorInd= ex]++; + PciDataIndex =3D GetPciDataIndex (VtdIndex, Segment, SourceId); + mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDeviceData[PciDataIndex].= AccessCount++; // // DomainId should not be 0. // - DomainIdentifier =3D (UINT16)(PciDescriptorIndex + 1); + DomainIdentifier =3D (UINT16)(PciDataIndex + 1); =20 if (ExtContextEntry !=3D NULL) { if (ExtContextEntry->Bits.Present =3D=3D 0) { diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c b/IntelSilico= nPkg/IntelVTdDxe/TranslationTableEx.c index 9d4e6ea..68b25a7 100644 --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c @@ -33,16 +33,16 @@ CreateExtContextEntry ( VTD_EXT_ROOT_ENTRY *ExtRootEntry; VTD_EXT_CONTEXT_ENTRY *ExtContextEntryTable; VTD_EXT_CONTEXT_ENTRY *ExtContextEntry; - VTD_SOURCE_ID *PciDescriptor; + VTD_SOURCE_ID *PciSourceId; VTD_SOURCE_ID SourceId; UINTN MaxBusNumber; UINTN EntryTablePages; =20 MaxBusNumber =3D 0; - for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDescriptorNumber; Index++) { - PciDescriptor =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDesc= riptors[Index]; - if (PciDescriptor->Bits.Bus > MaxBusNumber) { - MaxBusNumber =3D PciDescriptor->Bits.Bus; + for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDeviceDataNumber; Index++) { + PciSourceId =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDevice= Data[Index].PciSourceId; + if (PciSourceId->Bits.Bus > MaxBusNumber) { + MaxBusNumber =3D PciSourceId->Bits.Bus; } } DEBUG ((DEBUG_INFO," MaxBusNumber - 0x%x\n", MaxBusNumber)); @@ -58,12 +58,12 @@ CreateExtContextEntry ( mVtdUnitInformation[VtdIndex].ExtRootEntryTable =3D (VTD_EXT_ROOT_ENTRY = *)Buffer; Buffer =3D (UINT8 *)Buffer + EFI_PAGES_TO_SIZE (RootPages); =20 - for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDescriptorNumber; Index++) { - PciDescriptor =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDesc= riptors[Index]; + for (Index =3D 0; Index < mVtdUnitInformation[VtdIndex].PciDeviceInfo.Pc= iDeviceDataNumber; Index++) { + PciSourceId =3D &mVtdUnitInformation[VtdIndex].PciDeviceInfo.PciDevice= Data[Index].PciSourceId; =20 - SourceId.Bits.Bus =3D PciDescriptor->Bits.Bus; - SourceId.Bits.Device =3D PciDescriptor->Bits.Device; - SourceId.Bits.Function =3D PciDescriptor->Bits.Function; + SourceId.Bits.Bus =3D PciSourceId->Bits.Bus; + SourceId.Bits.Device =3D PciSourceId->Bits.Device; + SourceId.Bits.Function =3D PciSourceId->Bits.Function; =20 ExtRootEntry =3D &mVtdUnitInformation[VtdIndex].ExtRootEntryTable[Sour= ceId.Index.RootIndex]; if (ExtRootEntry->Bits.LowerPresent =3D=3D 0) { diff --git a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c b/IntelSiliconPkg/IntelVT= dDxe/VtdReg.c index b1178b7..d78353f 100644 --- a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c +++ b/IntelSiliconPkg/IntelVTdDxe/VtdReg.c @@ -187,8 +187,8 @@ PrepareVtdConfig ( } =20 DomainNumber =3D (UINTN)1 << (UINT8)((UINTN)mVtdUnitInformation[Index]= .CapReg.Bits.ND * 2 + 4); - if (mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptorNumber >=3D = DomainNumber) { - DEBUG((DEBUG_ERROR, "!!!! Pci device Number(0x%x) >=3D DomainNumber(= 0x%x) !!!!\n", mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptorNumber= , DomainNumber)); + if (mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceDataNumber >=3D = DomainNumber) { + DEBUG((DEBUG_ERROR, "!!!! Pci device Number(0x%x) >=3D DomainNumber(= 0x%x) !!!!\n", mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceDataNumber= , DomainNumber)); return ; } } @@ -305,13 +305,13 @@ DisableDmar ( =20 for (Index =3D 0; Index < mVtdUnitNumber; Index++) { DEBUG((DEBUG_INFO, "engine [%d] access\n", Index)); - for (SubIndex =3D 0; SubIndex < mVtdUnitInformation[Index].PciDeviceIn= fo.PciDescriptorNumber; SubIndex++) { + for (SubIndex =3D 0; SubIndex < mVtdUnitInformation[Index].PciDeviceIn= fo.PciDeviceDataNumber; SubIndex++) { DEBUG ((DEBUG_INFO, " PCI S%04X B%02x D%02x F%02x - %d\n", mVtdUnitInformation[Index].Segment, - mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptors[SubIndex].= Bits.Bus, - mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptors[SubIndex].= Bits.Device, - mVtdUnitInformation[Index].PciDeviceInfo.PciDescriptors[SubIndex].= Bits.Function, - mVtdUnitInformation[Index].PciDeviceInfo.AccessCount[SubIndex] + mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciS= ourceId.Bits.Bus, + mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciS= ourceId.Bits.Device, + mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].PciS= ourceId.Bits.Function, + mVtdUnitInformation[Index].PciDeviceInfo.PciDeviceData[Index].Acce= ssCount )); } } --=20 2.7.4.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Apr 27 15:44:41 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1503646878545531.5685331962761; Fri, 25 Aug 2017 00:41:18 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D1D0221D1E2C7; Fri, 25 Aug 2017 00:38:34 -0700 (PDT) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AEF4421D1E2C1 for ; Fri, 25 Aug 2017 00:38:33 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP; 25 Aug 2017 00:41:09 -0700 Received: from jyao1-mobl.ccr.corp.intel.com ([10.239.196.35]) by fmsmga004.fm.intel.com with ESMTP; 25 Aug 2017 00:41:08 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,424,1498546800"; d="scan'208";a="304276374" From: Jiewen Yao To: edk2-devel@lists.01.org Date: Fri, 25 Aug 2017 15:40:46 +0800 Message-Id: <1503646846-1036-4-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1503646846-1036-1-git-send-email-jiewen.yao@intel.com> References: <1503646846-1036-1-git-send-email-jiewen.yao@intel.com> Subject: [edk2] [PATCH 3/3] IntelSiliconPkg/PlatformVTdSample: update ExceptionDevice X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add sample for device scope based exception list and PCI vendor id based exception list. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/PlatformVTdSampleDxe/PlatformVTdSampleDxe.c | 80 +++++++++= ++++++++--- 1 file changed, 70 insertions(+), 10 deletions(-) diff --git a/IntelSiliconPkg/PlatformVTdSampleDxe/PlatformVTdSampleDxe.c b/= IntelSiliconPkg/PlatformVTdSampleDxe/PlatformVTdSampleDxe.c index f181b94..95e0f3a 100644 --- a/IntelSiliconPkg/PlatformVTdSampleDxe/PlatformVTdSampleDxe.c +++ b/IntelSiliconPkg/PlatformVTdSampleDxe/PlatformVTdSampleDxe.c @@ -27,6 +27,8 @@ #include #include =20 +#include + typedef struct { ACPI_EXTENDED_HID_DEVICE_PATH I2cController; UINT8 HidStr[8]; @@ -137,10 +139,57 @@ PLATFORM_PCI_BRIDGE_DEVICE_PATH mPlatformPciBridgeDev= icePath =3D { PLATFORM_END_ENTIRE }; =20 -EDKII_PLATFORM_VTD_DEVICE_INFO mExceptionDeviceList[] =3D { +#pragma pack(1) + +typedef struct { + EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO ExceptionDeviceInfo; + EDKII_PLATFORM_VTD_DEVICE_SCOPE DeviceScope; + EFI_ACPI_DMAR_PCI_PATH PciBridge; + EFI_ACPI_DMAR_PCI_PATH PciDevice; +} PLATFORM_EXCEPTION_DEVICE_SCOPE_STRUCT; + +typedef struct { + EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO ExceptionDeviceInfo; + EDKII_PLATFORM_VTD_PCI_DEVICE_ID PciDeviceId; +} PLATFORM_EXCEPTION_PCI_DEVICE_ID_STRUCT; + +#pragma pack() + +PLATFORM_EXCEPTION_DEVICE_SCOPE_STRUCT mExceptionDeviceScopeList[] =3D { { - 0x0, // Segment - {{0x00, 0x00, 0x02}} // Function, Device, Bus + { + EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO_TYPE_DEVICE_SCOPE, + sizeof(PLATFORM_EXCEPTION_DEVICE_SCOPE_STRUCT) + }, // ExceptionDeviceInfo + { + 0, // SegmentNumb= er + { + EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT, // Type + sizeof(EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER) + + 2 * sizeof(EFI_ACPI_DMAR_PCI_PATH), // Length + 0, // Reserved2 + 0, // Enumeration= Id + 0, // StartBusNum= ber + }, + }, // DeviceScope + { 0x1C, 1 }, // PciBridge + { 0x0, 0 }, // PciDevice + }, +}; + +PLATFORM_EXCEPTION_PCI_DEVICE_ID_STRUCT mExceptionPciDeviceIdList[] =3D { + { + { + EDKII_PLATFORM_VTD_EXCEPTION_DEVICE_INFO_TYPE_PCI_DEVICE_ID, + sizeof(PLATFORM_EXCEPTION_DEVICE_SCOPE_STRUCT) + }, // ExceptionDeviceInfo + { + 0x8086, // VendorId + 0x9D2F, // DeviceId + 0x21, // RevisionId + 0x8086, // SubsystemVe= ndorId + 0x7270, // SubsystemDe= viceId + }, }, }; =20 @@ -269,6 +318,7 @@ PlatformVTdGetDeviceId ( @param[in] This The protocol instance pointer. @param[out] DeviceInfoCount The count of the list of DeviceInfo. @param[out] DeviceInfo A callee allocated buffer to hold a li= st of DeviceInfo. + Each DeviceInfo pointer points to EDKI= I_PLATFORM_VTD_EXCEPTION_DEVICE_INFO. =20 @retval EFI_SUCCESS The DeviceInfoCount and DeviceInfo are ret= urned. @retval EFI_INVALID_PARAMETER DeviceInfoCount is NULL, or DeviceInfo is = NULL. @@ -280,7 +330,7 @@ EFIAPI PlatformVTdGetExceptionDeviceList ( IN EDKII_PLATFORM_VTD_POLICY_PROTOCOL *This, OUT UINTN *DeviceInfoCount, - OUT EDKII_PLATFORM_VTD_DEVICE_INFO **DeviceInfo + OUT VOID **DeviceInfo ) { DEBUG ((DEBUG_VERBOSE, "PlatformVTdGetExceptionDeviceList\n")); @@ -289,13 +339,23 @@ PlatformVTdGetExceptionDeviceList ( return EFI_INVALID_PARAMETER; } =20 - *DeviceInfo =3D AllocateZeroPool (sizeof(mExceptionDeviceList)); - if (*DeviceInfo =3D=3D NULL) { - return EFI_OUT_OF_RESOURCES; - } - CopyMem (*DeviceInfo, mExceptionDeviceList, sizeof(mExceptionDeviceList)= ); + if (0) { + *DeviceInfo =3D AllocateZeroPool (sizeof(mExceptionDeviceScopeList)); + if (*DeviceInfo =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + CopyMem (*DeviceInfo, mExceptionDeviceScopeList, sizeof(mExceptionDevi= ceScopeList)); + + *DeviceInfoCount =3D ARRAY_SIZE(mExceptionDeviceScopeList); + } else { + *DeviceInfo =3D AllocateZeroPool (sizeof(mExceptionPciDeviceIdList)); + if (*DeviceInfo =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + CopyMem (*DeviceInfo, mExceptionPciDeviceIdList, sizeof(mExceptionPciD= eviceIdList)); =20 - *DeviceInfoCount =3D ARRAY_SIZE(mExceptionDeviceList); + *DeviceInfoCount =3D ARRAY_SIZE(mExceptionPciDeviceIdList); + } =20 return EFI_SUCCESS; } --=20 2.7.4.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel