[edk2] [PATCH] IntelSiliconPkg: Fix VS2015 NOOPT IA32 build failure in IntelVTdDxe

Star Zeng posted 1 patch 6 years, 7 months ago
Failed in applying to current master (apply log)
IntelSiliconPkg/Include/IndustryStandard/Vtd.h   | 225 ++++++++++++-----------
IntelSiliconPkg/IntelVTdDxe/DmaProtection.h      |   2 +
IntelSiliconPkg/IntelVTdDxe/PciInfo.c            |   4 +-
IntelSiliconPkg/IntelVTdDxe/TranslationTable.c   |  39 ++--
IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c |  12 +-
IntelSiliconPkg/IntelVTdDxe/VtdReg.c             |   2 +-
6 files changed, 152 insertions(+), 132 deletions(-)
[edk2] [PATCH] IntelSiliconPkg: Fix VS2015 NOOPT IA32 build failure in IntelVTdDxe
Posted by Star Zeng 6 years, 7 months ago
There are VS2015 NOOPT IA32 build failure like below in IntelVTdDxe.
XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __allshl
XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __aullshr

This patch is to update Vtd.h to use UINT32 instead of UINT64 for
bitfields in structure definition, and also update IntelVTdDxe code
accordingly.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
---
 IntelSiliconPkg/Include/IndustryStandard/Vtd.h   | 225 ++++++++++++-----------
 IntelSiliconPkg/IntelVTdDxe/DmaProtection.h      |   2 +
 IntelSiliconPkg/IntelVTdDxe/PciInfo.c            |   4 +-
 IntelSiliconPkg/IntelVTdDxe/TranslationTable.c   |  39 ++--
 IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c |  12 +-
 IntelSiliconPkg/IntelVTdDxe/VtdReg.c             |   2 +-
 6 files changed, 152 insertions(+), 132 deletions(-)

diff --git a/IntelSiliconPkg/Include/IndustryStandard/Vtd.h b/IntelSiliconPkg/Include/IndustryStandard/Vtd.h
index 5c6a494eae34..3b7012c5a576 100644
--- a/IntelSiliconPkg/Include/IndustryStandard/Vtd.h
+++ b/IntelSiliconPkg/Include/IndustryStandard/Vtd.h
@@ -26,9 +26,10 @@
 
 typedef union {
   struct {
-    UINT64  Present:1;
-    UINT64  Reserved_1:11;
-    UINT64  ContextTablePointer:52;
+    UINT32  Present:1;
+    UINT32  Reserved_1:11;
+    UINT32  ContextTablePointerLo:20;
+    UINT32  ContextTablePointerHi:32;
 
     UINT64  Reserved_64;
   } Bits;
@@ -40,13 +41,15 @@ typedef union {
 
 typedef union {
   struct {
-    UINT64  LowerPresent:1;
-    UINT64  Reserved_1:11;
-    UINT64  LowerContextTablePointer:52;
-
-    UINT64  UpperPresent:1;
-    UINT64  Reserved_65:11;
-    UINT64  UpperContextTablePointer:52;
+    UINT32  LowerPresent:1;
+    UINT32  Reserved_1:11;
+    UINT32  LowerContextTablePointerLo:20;
+    UINT32  LowerContextTablePointerHi:32;
+
+    UINT32  UpperPresent:1;
+    UINT32  Reserved_65:11;
+    UINT32  UpperContextTablePointerLo:20;
+    UINT32  UpperContextTablePointerHi:32;
   } Bits;
   struct {
     UINT64  Uint64Lo;
@@ -56,17 +59,19 @@ typedef union {
 
 typedef union {
   struct {
-    UINT64  Present:1;
-    UINT64  FaultProcessingDisable:1;
-    UINT64  TranslationType:2;
-    UINT64  Reserved_4:8;
-    UINT64  SecondLevelPageTranslationPointer:52;
-
-    UINT64  AddressWidth:3;
-    UINT64  Ignored_67:4;
-    UINT64  Reserved_71:1;
-    UINT64  DomainIdentifier:16;
-    UINT64  Reserved_88:40;
+    UINT32  Present:1;
+    UINT32  FaultProcessingDisable:1;
+    UINT32  TranslationType:2;
+    UINT32  Reserved_4:8;
+    UINT32  SecondLevelPageTranslationPointerLo:20;
+    UINT32  SecondLevelPageTranslationPointerHi:32;
+
+    UINT32  AddressWidth:3;
+    UINT32  Ignored_67:4;
+    UINT32  Reserved_71:1;
+    UINT32  DomainIdentifier:16;
+    UINT32  Reserved_88:8;
+    UINT32  Reserved_96:32;
   } Bits;
   struct {
     UINT64  Uint64Lo;
@@ -76,51 +81,54 @@ typedef union {
 
 typedef union {
   struct {
-    UINT64  Present:1;
-    UINT64  FaultProcessingDisable:1;
-    UINT64  TranslationType:3;
-    UINT64  ExtendedMemoryType:3;
-    UINT64  DeferredInvalidateEnable:1;
-    UINT64  PageRequestEnable:1;
-    UINT64  NestedTranslationEnable:1;
-    UINT64  PASIDEnable:1;
-    UINT64  SecondLevelPageTranslationPointer:52;
-
-    UINT64  AddressWidth:3;
-    UINT64  PageGlobalEnable:1;
-    UINT64  NoExecuteEnable:1;
-    UINT64  WriteProtectEnable:1;
-    UINT64  CacheDisable:1;
-    UINT64  ExtendedMemoryTypeEnable:1;
-    UINT64  DomainIdentifier:16;
-    UINT64  SupervisorModeExecuteProtection:1;
-    UINT64  ExtendedAccessedFlagEnable:1;
-    UINT64  ExecuteRequestsEnable:1;
-    UINT64  SecondLevelExecuteEnable:1;
-    UINT64  Reserved_92:4;
-    UINT64  PageAttributeTable0:3;
-    UINT64  Reserved_Pat0:1;
-    UINT64  PageAttributeTable1:3;
-    UINT64  Reserved_Pat1:1;
-    UINT64  PageAttributeTable2:3;
-    UINT64  Reserved_Pat2:1;
-    UINT64  PageAttributeTable3:3;
-    UINT64  Reserved_Pat3:1;
-    UINT64  PageAttributeTable4:3;
-    UINT64  Reserved_Pat4:1;
-    UINT64  PageAttributeTable5:3;
-    UINT64  Reserved_Pat5:1;
-    UINT64  PageAttributeTable6:3;
-    UINT64  Reserved_Pat6:1;
-    UINT64  PageAttributeTable7:3;
-    UINT64  Reserved_Pat7:1;
-
-    UINT64  PASIDTableSize:4;
-    UINT64  Reserved_132:8;
-    UINT64  PASIDTablePointer:52;
-
-    UINT64  Reserved_192:12;
-    UINT64  PASIDStateTablePointer:52;
+    UINT32  Present:1;
+    UINT32  FaultProcessingDisable:1;
+    UINT32  TranslationType:3;
+    UINT32  ExtendedMemoryType:3;
+    UINT32  DeferredInvalidateEnable:1;
+    UINT32  PageRequestEnable:1;
+    UINT32  NestedTranslationEnable:1;
+    UINT32  PASIDEnable:1;
+    UINT32  SecondLevelPageTranslationPointerLo:20;
+    UINT32  SecondLevelPageTranslationPointerHi:32;
+
+    UINT32  AddressWidth:3;
+    UINT32  PageGlobalEnable:1;
+    UINT32  NoExecuteEnable:1;
+    UINT32  WriteProtectEnable:1;
+    UINT32  CacheDisable:1;
+    UINT32  ExtendedMemoryTypeEnable:1;
+    UINT32  DomainIdentifier:16;
+    UINT32  SupervisorModeExecuteProtection:1;
+    UINT32  ExtendedAccessedFlagEnable:1;
+    UINT32  ExecuteRequestsEnable:1;
+    UINT32  SecondLevelExecuteEnable:1;
+    UINT32  Reserved_92:4;
+    UINT32  PageAttributeTable0:3;
+    UINT32  Reserved_Pat0:1;
+    UINT32  PageAttributeTable1:3;
+    UINT32  Reserved_Pat1:1;
+    UINT32  PageAttributeTable2:3;
+    UINT32  Reserved_Pat2:1;
+    UINT32  PageAttributeTable3:3;
+    UINT32  Reserved_Pat3:1;
+    UINT32  PageAttributeTable4:3;
+    UINT32  Reserved_Pat4:1;
+    UINT32  PageAttributeTable5:3;
+    UINT32  Reserved_Pat5:1;
+    UINT32  PageAttributeTable6:3;
+    UINT32  Reserved_Pat6:1;
+    UINT32  PageAttributeTable7:3;
+    UINT32  Reserved_Pat7:1;
+
+    UINT32  PASIDTableSize:4;
+    UINT32  Reserved_132:8;
+    UINT32  PASIDTablePointerLo:20;
+    UINT32  PASIDTablePointerHi:32;
+
+    UINT32  Reserved_192:12;
+    UINT32  PASIDStateTablePointerLo:20;
+    UINT32  PASIDStateTablePointerHi:32;
   } Bits;
   struct {
     UINT64  Uint64_1;
@@ -132,63 +140,66 @@ typedef union {
 
 typedef union {
   struct {
-    UINT64  Present:1;
-    UINT64  Reserved_1:2;
-    UINT64  PageLevelCacheDisable:1;
-    UINT64  PageLevelWriteThrough:1;
-    UINT64  Reserved_5:6;
-    UINT64  SupervisorRequestsEnable:1;
-    UINT64  FirstLevelPageTranslationPointer:52;
+    UINT32  Present:1;
+    UINT32  Reserved_1:2;
+    UINT32  PageLevelCacheDisable:1;
+    UINT32  PageLevelWriteThrough:1;
+    UINT32  Reserved_5:6;
+    UINT32  SupervisorRequestsEnable:1;
+    UINT32  FirstLevelPageTranslationPointerLo:20;
+    UINT32  FirstLevelPageTranslationPointerHi:32;
   } Bits;
   UINT64    Uint64;
 } VTD_PASID_ENTRY;
 
 typedef union {
   struct {
-    UINT64  Reserved_0:32;
-    UINT64  ActiveReferenceCount:16;
-    UINT64  Reserved_48:15;
-    UINT64  DeferredInvalidate:1;
+    UINT32  Reserved_0:32;
+    UINT32  ActiveReferenceCount:16;
+    UINT32  Reserved_48:15;
+    UINT32  DeferredInvalidate:1;
   } Bits;
   UINT64    Uint64;
 } VTD_PASID_STATE_ENTRY;
 
 typedef union {
   struct {
-    UINT64  Present:1;
-    UINT64  ReadWrite:1;
-    UINT64  UserSupervisor:1;
-    UINT64  PageLevelWriteThrough:1;
-    UINT64  PageLevelCacheDisable:1;
-    UINT64  Accessed:1;
-    UINT64  Dirty:1;
-    UINT64  PageSize:1; // It is PageAttribute:1 for 4K page entry
-    UINT64  Global:1;
-    UINT64  Ignored_9:1;
-    UINT64  ExtendedAccessed:1;
-    UINT64  Ignored_11:1;
+    UINT32  Present:1;
+    UINT32  ReadWrite:1;
+    UINT32  UserSupervisor:1;
+    UINT32  PageLevelWriteThrough:1;
+    UINT32  PageLevelCacheDisable:1;
+    UINT32  Accessed:1;
+    UINT32  Dirty:1;
+    UINT32  PageSize:1; // It is PageAttribute:1 for 4K page entry
+    UINT32  Global:1;
+    UINT32  Ignored_9:1;
+    UINT32  ExtendedAccessed:1;
+    UINT32  Ignored_11:1;
     // NOTE: There is PageAttribute:1 as bit12 for 1G page entry and 2M page entry
-    UINT64  Address:40;
-    UINT64  Ignored_52:11;
-    UINT64  ExecuteDisable:1;
+    UINT32  AddressLo:20;
+    UINT32  AddressHi:20;
+    UINT32  Ignored_52:11;
+    UINT32  ExecuteDisable:1;
   } Bits;
   UINT64    Uint64;
 } VTD_FIRST_LEVEL_PAGING_ENTRY;
 
 typedef union {
   struct {
-    UINT64  Read:1;
-    UINT64  Write:1;
-    UINT64  Execute:1;
-    UINT64  ExtendedMemoryType:3;
-    UINT64  IgnorePAT:1;
-    UINT64  PageSize:1;
-    UINT64  Ignored_8:3;
-    UINT64  Snoop:1;
-    UINT64  Address:40;
-    UINT64  Ignored_52:10;
-    UINT64  TransientMapping:1;
-    UINT64  Ignored_63:1;
+    UINT32  Read:1;
+    UINT32  Write:1;
+    UINT32  Execute:1;
+    UINT32  ExtendedMemoryType:3;
+    UINT32  IgnorePAT:1;
+    UINT32  PageSize:1;
+    UINT32  Ignored_8:3;
+    UINT32  Snoop:1;
+    UINT32  AddressLo:20;
+    UINT32  AddressHi:20;
+    UINT32  Ignored_52:10;
+    UINT32  TransientMapping:1;
+    UINT32  Ignored_63:1;
   } Bits;
   UINT64    Uint64;
 } VTD_SECOND_LEVEL_PAGING_ENTRY;
@@ -299,7 +310,6 @@ typedef union {
     UINT32        NWFS:1; // No Write Flag Support
     UINT32        EAFS:1; // Extended Accessed Flag Support
     UINT32        PSS:5; // PASID Size Supported
-
     UINT32        Rsvd_40:24;
   } Bits;
   UINT64     Uint64;
@@ -307,8 +317,9 @@ typedef union {
 
 typedef union {
   struct {
-    UINT64   Rsvd_0:12;
-    UINT64   FI:52;        // FaultInfo
+    UINT32   Rsvd_0:12;
+    UINT32   FILo:20;      // FaultInfo
+    UINT32   FIHi:32;      // FaultInfo
 
     UINT32   SID:16;       // Source Identifier
     UINT32   Rsvd_80:13;
diff --git a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h b/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h
index 6efed6e555d1..8cfa69cb2364 100644
--- a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h
+++ b/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h
@@ -41,6 +41,8 @@
 #include <IndustryStandard/DmaRemappingReportingTable.h>
 #include <IndustryStandard/Vtd.h>
 
+#define VTD_64BITS_ADDRESS(Lo, Hi) (LShiftU64 (Lo, 12) | LShiftU64 (Hi, 32))
+
 #define ALIGN_VALUE_UP(Value, Alignment)  (((Value) + (Alignment) - 1) & (~((Alignment) - 1)))
 #define ALIGN_VALUE_LOW(Value, Alignment) ((Value) & (~((Alignment) - 1)))
 
diff --git a/IntelSiliconPkg/IntelVTdDxe/PciInfo.c b/IntelSiliconPkg/IntelVTdDxe/PciInfo.c
index ea84317c9ce4..d5f096fadd5d 100644
--- a/IntelSiliconPkg/IntelVTdDxe/PciInfo.c
+++ b/IntelSiliconPkg/IntelVTdDxe/PciInfo.c
@@ -289,7 +289,7 @@ FindVtdIndexByPciDevice (
 
     if (mVtdUnitInformation[VtdIndex].ExtRootEntryTable != 0) {
       ExtRootEntry = &mVtdUnitInformation[VtdIndex].ExtRootEntryTable[SourceId.Index.RootIndex];
-      ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)LShiftU64 (ExtRootEntry->Bits.LowerContextTablePointer, 12) ;
+      ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry->Bits.LowerContextTablePointerLo, ExtRootEntry->Bits.LowerContextTablePointerHi) ;
       ThisExtContextEntry  = &ExtContextEntryTable[SourceId.Index.ContextIndex];
       if (ThisExtContextEntry->Bits.AddressWidth == 0) {
         continue;
@@ -298,7 +298,7 @@ FindVtdIndexByPciDevice (
       *ContextEntry    = NULL;
     } else {
       RootEntry = &mVtdUnitInformation[VtdIndex].RootEntryTable[SourceId.Index.RootIndex];
-      ContextEntryTable = (VTD_CONTEXT_ENTRY *)(UINTN)LShiftU64 (RootEntry->Bits.ContextTablePointer, 12) ;
+      ContextEntryTable = (VTD_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(RootEntry->Bits.ContextTablePointerLo, RootEntry->Bits.ContextTablePointerHi) ;
       ThisContextEntry  = &ContextEntryTable[SourceId.Index.ContextIndex];
       if (ThisContextEntry->Bits.AddressWidth == 0) {
         continue;
diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c
index 5af4a4627b69..961d7cad0ddf 100644
--- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c
+++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c
@@ -120,12 +120,13 @@ CreateContextEntry (
 
     RootEntry = &mVtdUnitInformation[VtdIndex].RootEntryTable[SourceId.Index.RootIndex];
     if (RootEntry->Bits.Present == 0) {
-      RootEntry->Bits.ContextTablePointer  = RShiftU64 ((UINT64)(UINTN)Buffer, 12);
+      RootEntry->Bits.ContextTablePointerLo  = (UINT32) RShiftU64 ((UINT64)(UINTN)Buffer, 12);
+      RootEntry->Bits.ContextTablePointerHi  = (UINT32) RShiftU64 ((UINT64)(UINTN)Buffer, 32);
       RootEntry->Bits.Present = 1;
       Buffer = (UINT8 *)Buffer + EFI_PAGES_TO_SIZE (ContextPages);
     }
 
-    ContextEntryTable = (VTD_CONTEXT_ENTRY *)(UINTN)LShiftU64(RootEntry->Bits.ContextTablePointer, 12) ;
+    ContextEntryTable = (VTD_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(RootEntry->Bits.ContextTablePointerLo, RootEntry->Bits.ContextTablePointerHi) ;
     ContextEntry = &ContextEntryTable[SourceId.Index.ContextIndex];
     ContextEntry->Bits.TranslationType = 0;
     ContextEntry->Bits.FaultProcessingDisable = 0;
@@ -227,7 +228,7 @@ CreateSecondLevelPagingEntryTable (
     }
     DEBUG ((DEBUG_INFO,"  Lvl4(0x%x): Lvl3Start - 0x%x, Lvl3End - 0x%x\n", Index4, Lvl3Start, Lvl3End));
 
-    Lvl3PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64 (Lvl4PtEntry[Index4].Bits.Address, 12);
+    Lvl3PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(Lvl4PtEntry[Index4].Bits.AddressLo, Lvl4PtEntry[Index4].Bits.AddressHi);
     for (Index3 = Lvl3Start; Index3 <= Lvl3End; Index3++) {
       if (Lvl3PtEntry[Index3].Uint64 == 0) {
         Lvl3PtEntry[Index3].Uint64 = (UINT64)(UINTN)AllocateZeroPages (1);
@@ -239,7 +240,7 @@ CreateSecondLevelPagingEntryTable (
         SetSecondLevelPagingEntryAttribute (&Lvl3PtEntry[Index3], EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE);
       }
 
-      Lvl2PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64 (Lvl3PtEntry[Index3].Bits.Address, 12);
+      Lvl2PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(Lvl3PtEntry[Index3].Bits.AddressLo, Lvl3PtEntry[Index3].Bits.AddressHi);
       for (Index2 = 0; Index2 < SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); Index2++) {
         Lvl2PtEntry[Index2].Uint64 = BaseAddress;
         SetSecondLevelPagingEntryAttribute (&Lvl2PtEntry[Index2], IoMmuAccess);
@@ -341,7 +342,7 @@ DumpDmarContextEntryTable (
     if (RootEntry[Index].Bits.Present == 0) {
       continue;
     }
-    ContextEntry = (VTD_CONTEXT_ENTRY *)(UINTN)LShiftU64 (RootEntry[Index].Bits.ContextTablePointer, 12);
+    ContextEntry = (VTD_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(RootEntry[Index].Bits.ContextTablePointerLo, RootEntry[Index].Bits.ContextTablePointerHi);
     for (Index2 = 0; Index2 < VTD_CONTEXT_ENTRY_NUMBER; Index2++) {
       if ((ContextEntry[Index2].Uint128.Uint64Lo != 0) || (ContextEntry[Index2].Uint128.Uint64Hi != 0)) {
         DEBUG ((DEBUG_INFO,"    ContextEntry(0x%02x) D%02xF%02x - 0x%016lx %016lx\n",
@@ -350,7 +351,7 @@ DumpDmarContextEntryTable (
       if (ContextEntry[Index2].Bits.Present == 0) {
         continue;
       }
-      DumpSecondLevelPagingEntry ((VOID *)(UINTN)LShiftU64 (ContextEntry[Index2].Bits.SecondLevelPageTranslationPointer, 12));
+      DumpSecondLevelPagingEntry ((VOID *)(UINTN)VTD_64BITS_ADDRESS(ContextEntry[Index2].Bits.SecondLevelPageTranslationPointerLo, ContextEntry[Index2].Bits.SecondLevelPageTranslationPointerHi));
     }
   }
   DEBUG ((DEBUG_INFO,"=========================\n"));
@@ -387,7 +388,7 @@ DumpSecondLevelPagingEntry (
     if (Lvl4PtEntry[Index4].Uint64 == 0) {
       continue;
     }
-    Lvl3PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64 (Lvl4PtEntry[Index4].Bits.Address, 12);
+    Lvl3PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(Lvl4PtEntry[Index4].Bits.AddressLo, Lvl4PtEntry[Index4].Bits.AddressHi);
     for (Index3 = 0; Index3 < SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); Index3++) {
       if (Lvl3PtEntry[Index3].Uint64 != 0) {
         DEBUG ((DEBUG_VERBOSE,"    Lvl3Pt Entry(0x%03x) - 0x%016lx\n", Index3, Lvl3PtEntry[Index3].Uint64));
@@ -396,7 +397,7 @@ DumpSecondLevelPagingEntry (
         continue;
       }
 
-      Lvl2PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64 (Lvl3PtEntry[Index3].Bits.Address, 12);
+      Lvl2PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(Lvl3PtEntry[Index3].Bits.AddressLo, Lvl3PtEntry[Index3].Bits.AddressHi);
       for (Index2 = 0; Index2 < SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); Index2++) {
         if (Lvl2PtEntry[Index2].Uint64 != 0) {
           DEBUG ((DEBUG_VERBOSE,"      Lvl2Pt Entry(0x%03x) - 0x%016lx\n", Index2, Lvl2PtEntry[Index2].Uint64));
@@ -405,7 +406,7 @@ DumpSecondLevelPagingEntry (
           continue;
         }
         if (Lvl2PtEntry[Index2].Bits.PageSize == 0) {
-          Lvl1PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64 (Lvl2PtEntry[Index2].Bits.Address, 12);
+          Lvl1PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(Lvl2PtEntry[Index2].Bits.AddressLo, Lvl2PtEntry[Index2].Bits.AddressHi);
           for (Index1 = 0; Index1 < SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); Index1++) {
             if (Lvl1PtEntry[Index1].Uint64 != 0) {
               DEBUG ((DEBUG_VERBOSE,"        Lvl1Pt Entry(0x%03x) - 0x%016lx\n", Index1, Lvl1PtEntry[Index1].Uint64));
@@ -878,12 +879,13 @@ SetAccessAttribute (
       DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x B%02x D%02x F%02x) New\n", SecondLevelPagingEntry, Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
       Pt = (UINT64)RShiftU64 ((UINT64)(UINTN)SecondLevelPagingEntry, 12);
 
-      ExtContextEntry->Bits.SecondLevelPageTranslationPointer = Pt;
-      ExtContextEntry->Bits.DomainIdentifier = GetPciDescriptor (VtdIndex, Segment, SourceId);
+      ExtContextEntry->Bits.SecondLevelPageTranslationPointerLo = (UINT32) Pt;
+      ExtContextEntry->Bits.SecondLevelPageTranslationPointerHi = (UINT32) RShiftU64(Pt, 20);
+      ExtContextEntry->Bits.DomainIdentifier = (UINT16) GetPciDescriptor (VtdIndex, Segment, SourceId);
       ExtContextEntry->Bits.Present = 1;
       DumpDmarExtContextEntryTable (mVtdUnitInformation[VtdIndex].ExtRootEntryTable);
     } else {
-      SecondLevelPagingEntry = (VOID *)(UINTN)LShiftU64 (ExtContextEntry->Bits.SecondLevelPageTranslationPointer, 12);
+      SecondLevelPagingEntry = (VOID *)(UINTN)VTD_64BITS_ADDRESS(ExtContextEntry->Bits.SecondLevelPageTranslationPointerLo, ExtContextEntry->Bits.SecondLevelPageTranslationPointerHi);
       DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x B%02x D%02x F%02x)\n", SecondLevelPagingEntry, Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
     }
   } else if (ContextEntry != NULL) {
@@ -892,12 +894,13 @@ SetAccessAttribute (
       DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x B%02x D%02x F%02x) New\n", SecondLevelPagingEntry, Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
       Pt = (UINT64)RShiftU64 ((UINT64)(UINTN)SecondLevelPagingEntry, 12);
 
-      ContextEntry->Bits.SecondLevelPageTranslationPointer = Pt;
-      ContextEntry->Bits.DomainIdentifier = GetPciDescriptor (VtdIndex, Segment, SourceId);
+      ContextEntry->Bits.SecondLevelPageTranslationPointerLo = (UINT32) Pt;
+      ContextEntry->Bits.SecondLevelPageTranslationPointerHi = (UINT32) RShiftU64(Pt, 20);
+      ContextEntry->Bits.DomainIdentifier = (UINT16) GetPciDescriptor (VtdIndex, Segment, SourceId);
       ContextEntry->Bits.Present = 1;
       DumpDmarContextEntryTable (mVtdUnitInformation[VtdIndex].RootEntryTable);
     } else {
-      SecondLevelPagingEntry = (VOID *)(UINTN)LShiftU64 (ContextEntry->Bits.SecondLevelPageTranslationPointer, 12);
+      SecondLevelPagingEntry = (VOID *)(UINTN)VTD_64BITS_ADDRESS(ContextEntry->Bits.SecondLevelPageTranslationPointerLo, ContextEntry->Bits.SecondLevelPageTranslationPointerHi);
       DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x B%02x D%02x F%02x)\n", SecondLevelPagingEntry, Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
     }
   }
@@ -958,11 +961,13 @@ AlwaysEnablePageAttribute (
   SecondLevelPagingEntry = mVtdUnitInformation[VtdIndex].FixedSecondLevelPagingEntry;
   Pt = (UINT64)RShiftU64 ((UINT64)(UINTN)SecondLevelPagingEntry, 12);
   if (ExtContextEntry != NULL) {
-    ExtContextEntry->Bits.SecondLevelPageTranslationPointer = Pt;
+    ExtContextEntry->Bits.SecondLevelPageTranslationPointerLo = (UINT32) Pt;
+    ExtContextEntry->Bits.SecondLevelPageTranslationPointerHi = (UINT32) RShiftU64(Pt, 20);
     ExtContextEntry->Bits.DomainIdentifier = ((1 << (UINT8)((UINTN)mVtdUnitInformation[VtdIndex].CapReg.Bits.ND * 2 + 4)) - 1);
     ExtContextEntry->Bits.Present = 1;
   } else if (ContextEntry != NULL) {
-    ContextEntry->Bits.SecondLevelPageTranslationPointer = Pt;
+    ContextEntry->Bits.SecondLevelPageTranslationPointerLo = (UINT32) Pt;
+    ContextEntry->Bits.SecondLevelPageTranslationPointerHi = (UINT32) RShiftU64(Pt, 20);
     ContextEntry->Bits.DomainIdentifier = ((1 << (UINT8)((UINTN)mVtdUnitInformation[VtdIndex].CapReg.Bits.ND * 2 + 4)) - 1);
     ContextEntry->Bits.Present = 1;
   }
diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c b/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c
index 0f54b97d566c..65ed16ed7b8e 100644
--- a/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c
+++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c
@@ -67,14 +67,16 @@ CreateExtContextEntry (
 
     ExtRootEntry = &mVtdUnitInformation[VtdIndex].ExtRootEntryTable[SourceId.Index.RootIndex];
     if (ExtRootEntry->Bits.LowerPresent == 0) {
-      ExtRootEntry->Bits.LowerContextTablePointer  = RShiftU64 ((UINT64)(UINTN)Buffer, 12);
+      ExtRootEntry->Bits.LowerContextTablePointerLo  = (UINT32) RShiftU64 ((UINT64)(UINTN)Buffer, 12);
+      ExtRootEntry->Bits.LowerContextTablePointerHi  = (UINT32) RShiftU64 ((UINT64)(UINTN)Buffer, 32);
       ExtRootEntry->Bits.LowerPresent = 1;
-      ExtRootEntry->Bits.UpperContextTablePointer  = RShiftU64 ((UINT64)(UINTN)Buffer, 12) + 1;
+      ExtRootEntry->Bits.UpperContextTablePointerLo  = (UINT32) RShiftU64 ((UINT64)(UINTN)Buffer, 12) + 1;
+      ExtRootEntry->Bits.UpperContextTablePointerHi  = (UINT32) RShiftU64 (RShiftU64 ((UINT64)(UINTN)Buffer, 12) + 1, 20);
       ExtRootEntry->Bits.UpperPresent = 1;
       Buffer = (UINT8 *)Buffer + EFI_PAGES_TO_SIZE (ContextPages);
     }
 
-    ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)LShiftU64(ExtRootEntry->Bits.LowerContextTablePointer, 12) ;
+    ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry->Bits.LowerContextTablePointerLo, ExtRootEntry->Bits.LowerContextTablePointerHi) ;
     ExtContextEntry = &ExtContextEntryTable[SourceId.Index.ContextIndex];
     ExtContextEntry->Bits.TranslationType = 0;
     ExtContextEntry->Bits.FaultProcessingDisable = 0;
@@ -122,7 +124,7 @@ DumpDmarExtContextEntryTable (
     if (ExtRootEntry[Index].Bits.LowerPresent == 0) {
       continue;
     }
-    ExtContextEntry = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)LShiftU64 (ExtRootEntry[Index].Bits.LowerContextTablePointer, 12);
+    ExtContextEntry = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry[Index].Bits.LowerContextTablePointerLo, ExtRootEntry[Index].Bits.LowerContextTablePointerHi);
     for (Index2 = 0; Index2 < VTD_CONTEXT_ENTRY_NUMBER/2; Index2++) {
       if ((ExtContextEntry[Index2].Uint256.Uint64_1 != 0) || (ExtContextEntry[Index2].Uint256.Uint64_2 != 0) ||
           (ExtContextEntry[Index2].Uint256.Uint64_3 != 0) || (ExtContextEntry[Index2].Uint256.Uint64_4 != 0)) {
@@ -137,7 +139,7 @@ DumpDmarExtContextEntryTable (
     if (ExtRootEntry[Index].Bits.UpperPresent == 0) {
       continue;
     }
-    ExtContextEntry = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)LShiftU64 (ExtRootEntry[Index].Bits.UpperContextTablePointer, 12);
+    ExtContextEntry = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry[Index].Bits.UpperContextTablePointerLo, ExtRootEntry[Index].Bits.UpperContextTablePointerHi);
     for (Index2 = 0; Index2 < VTD_CONTEXT_ENTRY_NUMBER/2; Index2++) {
       if ((ExtContextEntry[Index2].Uint256.Uint64_1 != 0) || (ExtContextEntry[Index2].Uint256.Uint64_2 != 0) ||
           (ExtContextEntry[Index2].Uint256.Uint64_3 != 0) || (ExtContextEntry[Index2].Uint256.Uint64_4 != 0)) {
diff --git a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c b/IntelSiliconPkg/IntelVTdDxe/VtdReg.c
index d19aea2cc184..f36e3dec0671 100644
--- a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c
+++ b/IntelSiliconPkg/IntelVTdDxe/VtdReg.c
@@ -526,7 +526,7 @@ DumpVtdRegs (
     FrcdReg.Uint64[1] = MmioRead64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)));
     DEBUG((DEBUG_INFO, "  FRCD_REG[%d] - 0x%016lx %016lx\n", Index, FrcdReg.Uint64[1], FrcdReg.Uint64[0]));
     if (FrcdReg.Uint64[1] != 0 || FrcdReg.Uint64[0] != 0) {
-      DEBUG((DEBUG_INFO, "    Fault Info - 0x%016lx\n", LShiftU64(FrcdReg.Bits.FI, 12)));
+      DEBUG((DEBUG_INFO, "    Fault Info - 0x%016lx\n", VTD_64BITS_ADDRESS(FrcdReg.Bits.FILo, FrcdReg.Bits.FIHi)));
       SourceId.Uint16 = (UINT16)FrcdReg.Bits.SID;
       DEBUG((DEBUG_INFO, "    Source - B%02x D%02x F%02x\n", SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
       DEBUG((DEBUG_INFO, "    Type - %x (%a)\n", FrcdReg.Bits.T, FrcdReg.Bits.T ? "read" : "write"));
-- 
2.7.0.windows.1

_______________________________________________
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Re: [edk2] [PATCH] IntelSiliconPkg: Fix VS2015 NOOPT IA32 build failure in IntelVTdDxe
Posted by Yao, Jiewen 6 years, 7 months ago
Reviewed-by: Jiewen.yao@intel.com

> -----Original Message-----
> From: Zeng, Star
> Sent: Thursday, August 10, 2017 3:18 PM
> To: edk2-devel@lists.01.org
> Cc: Zeng, Star <star.zeng@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>
> Subject: [PATCH] IntelSiliconPkg: Fix VS2015 NOOPT IA32 build failure in
> IntelVTdDxe
> 
> There are VS2015 NOOPT IA32 build failure like below in IntelVTdDxe.
> XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __allshl
> XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __aullshr
> 
> This patch is to update Vtd.h to use UINT32 instead of UINT64 for
> bitfields in structure definition, and also update IntelVTdDxe code
> accordingly.
> 
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Star Zeng <star.zeng@intel.com>
> ---
>  IntelSiliconPkg/Include/IndustryStandard/Vtd.h   | 225
> ++++++++++++-----------
>  IntelSiliconPkg/IntelVTdDxe/DmaProtection.h      |   2 +
>  IntelSiliconPkg/IntelVTdDxe/PciInfo.c            |   4 +-
>  IntelSiliconPkg/IntelVTdDxe/TranslationTable.c   |  39 ++--
>  IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c |  12 +-
>  IntelSiliconPkg/IntelVTdDxe/VtdReg.c             |   2 +-
>  6 files changed, 152 insertions(+), 132 deletions(-)
> 
> diff --git a/IntelSiliconPkg/Include/IndustryStandard/Vtd.h
> b/IntelSiliconPkg/Include/IndustryStandard/Vtd.h
> index 5c6a494eae34..3b7012c5a576 100644
> --- a/IntelSiliconPkg/Include/IndustryStandard/Vtd.h
> +++ b/IntelSiliconPkg/Include/IndustryStandard/Vtd.h
> @@ -26,9 +26,10 @@
> 
>  typedef union {
>    struct {
> -    UINT64  Present:1;
> -    UINT64  Reserved_1:11;
> -    UINT64  ContextTablePointer:52;
> +    UINT32  Present:1;
> +    UINT32  Reserved_1:11;
> +    UINT32  ContextTablePointerLo:20;
> +    UINT32  ContextTablePointerHi:32;
> 
>      UINT64  Reserved_64;
>    } Bits;
> @@ -40,13 +41,15 @@ typedef union {
> 
>  typedef union {
>    struct {
> -    UINT64  LowerPresent:1;
> -    UINT64  Reserved_1:11;
> -    UINT64  LowerContextTablePointer:52;
> -
> -    UINT64  UpperPresent:1;
> -    UINT64  Reserved_65:11;
> -    UINT64  UpperContextTablePointer:52;
> +    UINT32  LowerPresent:1;
> +    UINT32  Reserved_1:11;
> +    UINT32  LowerContextTablePointerLo:20;
> +    UINT32  LowerContextTablePointerHi:32;
> +
> +    UINT32  UpperPresent:1;
> +    UINT32  Reserved_65:11;
> +    UINT32  UpperContextTablePointerLo:20;
> +    UINT32  UpperContextTablePointerHi:32;
>    } Bits;
>    struct {
>      UINT64  Uint64Lo;
> @@ -56,17 +59,19 @@ typedef union {
> 
>  typedef union {
>    struct {
> -    UINT64  Present:1;
> -    UINT64  FaultProcessingDisable:1;
> -    UINT64  TranslationType:2;
> -    UINT64  Reserved_4:8;
> -    UINT64  SecondLevelPageTranslationPointer:52;
> -
> -    UINT64  AddressWidth:3;
> -    UINT64  Ignored_67:4;
> -    UINT64  Reserved_71:1;
> -    UINT64  DomainIdentifier:16;
> -    UINT64  Reserved_88:40;
> +    UINT32  Present:1;
> +    UINT32  FaultProcessingDisable:1;
> +    UINT32  TranslationType:2;
> +    UINT32  Reserved_4:8;
> +    UINT32  SecondLevelPageTranslationPointerLo:20;
> +    UINT32  SecondLevelPageTranslationPointerHi:32;
> +
> +    UINT32  AddressWidth:3;
> +    UINT32  Ignored_67:4;
> +    UINT32  Reserved_71:1;
> +    UINT32  DomainIdentifier:16;
> +    UINT32  Reserved_88:8;
> +    UINT32  Reserved_96:32;
>    } Bits;
>    struct {
>      UINT64  Uint64Lo;
> @@ -76,51 +81,54 @@ typedef union {
> 
>  typedef union {
>    struct {
> -    UINT64  Present:1;
> -    UINT64  FaultProcessingDisable:1;
> -    UINT64  TranslationType:3;
> -    UINT64  ExtendedMemoryType:3;
> -    UINT64  DeferredInvalidateEnable:1;
> -    UINT64  PageRequestEnable:1;
> -    UINT64  NestedTranslationEnable:1;
> -    UINT64  PASIDEnable:1;
> -    UINT64  SecondLevelPageTranslationPointer:52;
> -
> -    UINT64  AddressWidth:3;
> -    UINT64  PageGlobalEnable:1;
> -    UINT64  NoExecuteEnable:1;
> -    UINT64  WriteProtectEnable:1;
> -    UINT64  CacheDisable:1;
> -    UINT64  ExtendedMemoryTypeEnable:1;
> -    UINT64  DomainIdentifier:16;
> -    UINT64  SupervisorModeExecuteProtection:1;
> -    UINT64  ExtendedAccessedFlagEnable:1;
> -    UINT64  ExecuteRequestsEnable:1;
> -    UINT64  SecondLevelExecuteEnable:1;
> -    UINT64  Reserved_92:4;
> -    UINT64  PageAttributeTable0:3;
> -    UINT64  Reserved_Pat0:1;
> -    UINT64  PageAttributeTable1:3;
> -    UINT64  Reserved_Pat1:1;
> -    UINT64  PageAttributeTable2:3;
> -    UINT64  Reserved_Pat2:1;
> -    UINT64  PageAttributeTable3:3;
> -    UINT64  Reserved_Pat3:1;
> -    UINT64  PageAttributeTable4:3;
> -    UINT64  Reserved_Pat4:1;
> -    UINT64  PageAttributeTable5:3;
> -    UINT64  Reserved_Pat5:1;
> -    UINT64  PageAttributeTable6:3;
> -    UINT64  Reserved_Pat6:1;
> -    UINT64  PageAttributeTable7:3;
> -    UINT64  Reserved_Pat7:1;
> -
> -    UINT64  PASIDTableSize:4;
> -    UINT64  Reserved_132:8;
> -    UINT64  PASIDTablePointer:52;
> -
> -    UINT64  Reserved_192:12;
> -    UINT64  PASIDStateTablePointer:52;
> +    UINT32  Present:1;
> +    UINT32  FaultProcessingDisable:1;
> +    UINT32  TranslationType:3;
> +    UINT32  ExtendedMemoryType:3;
> +    UINT32  DeferredInvalidateEnable:1;
> +    UINT32  PageRequestEnable:1;
> +    UINT32  NestedTranslationEnable:1;
> +    UINT32  PASIDEnable:1;
> +    UINT32  SecondLevelPageTranslationPointerLo:20;
> +    UINT32  SecondLevelPageTranslationPointerHi:32;
> +
> +    UINT32  AddressWidth:3;
> +    UINT32  PageGlobalEnable:1;
> +    UINT32  NoExecuteEnable:1;
> +    UINT32  WriteProtectEnable:1;
> +    UINT32  CacheDisable:1;
> +    UINT32  ExtendedMemoryTypeEnable:1;
> +    UINT32  DomainIdentifier:16;
> +    UINT32  SupervisorModeExecuteProtection:1;
> +    UINT32  ExtendedAccessedFlagEnable:1;
> +    UINT32  ExecuteRequestsEnable:1;
> +    UINT32  SecondLevelExecuteEnable:1;
> +    UINT32  Reserved_92:4;
> +    UINT32  PageAttributeTable0:3;
> +    UINT32  Reserved_Pat0:1;
> +    UINT32  PageAttributeTable1:3;
> +    UINT32  Reserved_Pat1:1;
> +    UINT32  PageAttributeTable2:3;
> +    UINT32  Reserved_Pat2:1;
> +    UINT32  PageAttributeTable3:3;
> +    UINT32  Reserved_Pat3:1;
> +    UINT32  PageAttributeTable4:3;
> +    UINT32  Reserved_Pat4:1;
> +    UINT32  PageAttributeTable5:3;
> +    UINT32  Reserved_Pat5:1;
> +    UINT32  PageAttributeTable6:3;
> +    UINT32  Reserved_Pat6:1;
> +    UINT32  PageAttributeTable7:3;
> +    UINT32  Reserved_Pat7:1;
> +
> +    UINT32  PASIDTableSize:4;
> +    UINT32  Reserved_132:8;
> +    UINT32  PASIDTablePointerLo:20;
> +    UINT32  PASIDTablePointerHi:32;
> +
> +    UINT32  Reserved_192:12;
> +    UINT32  PASIDStateTablePointerLo:20;
> +    UINT32  PASIDStateTablePointerHi:32;
>    } Bits;
>    struct {
>      UINT64  Uint64_1;
> @@ -132,63 +140,66 @@ typedef union {
> 
>  typedef union {
>    struct {
> -    UINT64  Present:1;
> -    UINT64  Reserved_1:2;
> -    UINT64  PageLevelCacheDisable:1;
> -    UINT64  PageLevelWriteThrough:1;
> -    UINT64  Reserved_5:6;
> -    UINT64  SupervisorRequestsEnable:1;
> -    UINT64  FirstLevelPageTranslationPointer:52;
> +    UINT32  Present:1;
> +    UINT32  Reserved_1:2;
> +    UINT32  PageLevelCacheDisable:1;
> +    UINT32  PageLevelWriteThrough:1;
> +    UINT32  Reserved_5:6;
> +    UINT32  SupervisorRequestsEnable:1;
> +    UINT32  FirstLevelPageTranslationPointerLo:20;
> +    UINT32  FirstLevelPageTranslationPointerHi:32;
>    } Bits;
>    UINT64    Uint64;
>  } VTD_PASID_ENTRY;
> 
>  typedef union {
>    struct {
> -    UINT64  Reserved_0:32;
> -    UINT64  ActiveReferenceCount:16;
> -    UINT64  Reserved_48:15;
> -    UINT64  DeferredInvalidate:1;
> +    UINT32  Reserved_0:32;
> +    UINT32  ActiveReferenceCount:16;
> +    UINT32  Reserved_48:15;
> +    UINT32  DeferredInvalidate:1;
>    } Bits;
>    UINT64    Uint64;
>  } VTD_PASID_STATE_ENTRY;
> 
>  typedef union {
>    struct {
> -    UINT64  Present:1;
> -    UINT64  ReadWrite:1;
> -    UINT64  UserSupervisor:1;
> -    UINT64  PageLevelWriteThrough:1;
> -    UINT64  PageLevelCacheDisable:1;
> -    UINT64  Accessed:1;
> -    UINT64  Dirty:1;
> -    UINT64  PageSize:1; // It is PageAttribute:1 for 4K page entry
> -    UINT64  Global:1;
> -    UINT64  Ignored_9:1;
> -    UINT64  ExtendedAccessed:1;
> -    UINT64  Ignored_11:1;
> +    UINT32  Present:1;
> +    UINT32  ReadWrite:1;
> +    UINT32  UserSupervisor:1;
> +    UINT32  PageLevelWriteThrough:1;
> +    UINT32  PageLevelCacheDisable:1;
> +    UINT32  Accessed:1;
> +    UINT32  Dirty:1;
> +    UINT32  PageSize:1; // It is PageAttribute:1 for 4K page entry
> +    UINT32  Global:1;
> +    UINT32  Ignored_9:1;
> +    UINT32  ExtendedAccessed:1;
> +    UINT32  Ignored_11:1;
>      // NOTE: There is PageAttribute:1 as bit12 for 1G page entry and 2M page
> entry
> -    UINT64  Address:40;
> -    UINT64  Ignored_52:11;
> -    UINT64  ExecuteDisable:1;
> +    UINT32  AddressLo:20;
> +    UINT32  AddressHi:20;
> +    UINT32  Ignored_52:11;
> +    UINT32  ExecuteDisable:1;
>    } Bits;
>    UINT64    Uint64;
>  } VTD_FIRST_LEVEL_PAGING_ENTRY;
> 
>  typedef union {
>    struct {
> -    UINT64  Read:1;
> -    UINT64  Write:1;
> -    UINT64  Execute:1;
> -    UINT64  ExtendedMemoryType:3;
> -    UINT64  IgnorePAT:1;
> -    UINT64  PageSize:1;
> -    UINT64  Ignored_8:3;
> -    UINT64  Snoop:1;
> -    UINT64  Address:40;
> -    UINT64  Ignored_52:10;
> -    UINT64  TransientMapping:1;
> -    UINT64  Ignored_63:1;
> +    UINT32  Read:1;
> +    UINT32  Write:1;
> +    UINT32  Execute:1;
> +    UINT32  ExtendedMemoryType:3;
> +    UINT32  IgnorePAT:1;
> +    UINT32  PageSize:1;
> +    UINT32  Ignored_8:3;
> +    UINT32  Snoop:1;
> +    UINT32  AddressLo:20;
> +    UINT32  AddressHi:20;
> +    UINT32  Ignored_52:10;
> +    UINT32  TransientMapping:1;
> +    UINT32  Ignored_63:1;
>    } Bits;
>    UINT64    Uint64;
>  } VTD_SECOND_LEVEL_PAGING_ENTRY;
> @@ -299,7 +310,6 @@ typedef union {
>      UINT32        NWFS:1; // No Write Flag Support
>      UINT32        EAFS:1; // Extended Accessed Flag Support
>      UINT32        PSS:5; // PASID Size Supported
> -
>      UINT32        Rsvd_40:24;
>    } Bits;
>    UINT64     Uint64;
> @@ -307,8 +317,9 @@ typedef union {
> 
>  typedef union {
>    struct {
> -    UINT64   Rsvd_0:12;
> -    UINT64   FI:52;        // FaultInfo
> +    UINT32   Rsvd_0:12;
> +    UINT32   FILo:20;      // FaultInfo
> +    UINT32   FIHi:32;      // FaultInfo
> 
>      UINT32   SID:16;       // Source Identifier
>      UINT32   Rsvd_80:13;
> diff --git a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h
> b/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h
> index 6efed6e555d1..8cfa69cb2364 100644
> --- a/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h
> +++ b/IntelSiliconPkg/IntelVTdDxe/DmaProtection.h
> @@ -41,6 +41,8 @@
>  #include <IndustryStandard/DmaRemappingReportingTable.h>
>  #include <IndustryStandard/Vtd.h>
> 
> +#define VTD_64BITS_ADDRESS(Lo, Hi) (LShiftU64 (Lo, 12) | LShiftU64 (Hi, 32))
> +
>  #define ALIGN_VALUE_UP(Value, Alignment)  (((Value) + (Alignment) - 1) &
> (~((Alignment) - 1)))
>  #define ALIGN_VALUE_LOW(Value, Alignment) ((Value) & (~((Alignment) - 1)))
> 
> diff --git a/IntelSiliconPkg/IntelVTdDxe/PciInfo.c
> b/IntelSiliconPkg/IntelVTdDxe/PciInfo.c
> index ea84317c9ce4..d5f096fadd5d 100644
> --- a/IntelSiliconPkg/IntelVTdDxe/PciInfo.c
> +++ b/IntelSiliconPkg/IntelVTdDxe/PciInfo.c
> @@ -289,7 +289,7 @@ FindVtdIndexByPciDevice (
> 
>      if (mVtdUnitInformation[VtdIndex].ExtRootEntryTable != 0) {
>        ExtRootEntry =
> &mVtdUnitInformation[VtdIndex].ExtRootEntryTable[SourceId.Index.RootIndex
> ];
> -      ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)LShiftU64
> (ExtRootEntry->Bits.LowerContextTablePointer, 12) ;
> +      ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry->Bits.LowerContextTablePointerL
> o, ExtRootEntry->Bits.LowerContextTablePointerHi) ;
>        ThisExtContextEntry  =
> &ExtContextEntryTable[SourceId.Index.ContextIndex];
>        if (ThisExtContextEntry->Bits.AddressWidth == 0) {
>          continue;
> @@ -298,7 +298,7 @@ FindVtdIndexByPciDevice (
>        *ContextEntry    = NULL;
>      } else {
>        RootEntry =
> &mVtdUnitInformation[VtdIndex].RootEntryTable[SourceId.Index.RootIndex];
> -      ContextEntryTable = (VTD_CONTEXT_ENTRY *)(UINTN)LShiftU64
> (RootEntry->Bits.ContextTablePointer, 12) ;
> +      ContextEntryTable = (VTD_CONTEXT_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(RootEntry->Bits.ContextTablePointerLo,
> RootEntry->Bits.ContextTablePointerHi) ;
>        ThisContextEntry  =
> &ContextEntryTable[SourceId.Index.ContextIndex];
>        if (ThisContextEntry->Bits.AddressWidth == 0) {
>          continue;
> diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c
> b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c
> index 5af4a4627b69..961d7cad0ddf 100644
> --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c
> +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c
> @@ -120,12 +120,13 @@ CreateContextEntry (
> 
>      RootEntry =
> &mVtdUnitInformation[VtdIndex].RootEntryTable[SourceId.Index.RootIndex];
>      if (RootEntry->Bits.Present == 0) {
> -      RootEntry->Bits.ContextTablePointer  = RShiftU64
> ((UINT64)(UINTN)Buffer, 12);
> +      RootEntry->Bits.ContextTablePointerLo  = (UINT32) RShiftU64
> ((UINT64)(UINTN)Buffer, 12);
> +      RootEntry->Bits.ContextTablePointerHi  = (UINT32) RShiftU64
> ((UINT64)(UINTN)Buffer, 32);
>        RootEntry->Bits.Present = 1;
>        Buffer = (UINT8 *)Buffer + EFI_PAGES_TO_SIZE (ContextPages);
>      }
> 
> -    ContextEntryTable = (VTD_CONTEXT_ENTRY
> *)(UINTN)LShiftU64(RootEntry->Bits.ContextTablePointer, 12) ;
> +    ContextEntryTable = (VTD_CONTEXT_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(RootEntry->Bits.ContextTablePointerLo,
> RootEntry->Bits.ContextTablePointerHi) ;
>      ContextEntry = &ContextEntryTable[SourceId.Index.ContextIndex];
>      ContextEntry->Bits.TranslationType = 0;
>      ContextEntry->Bits.FaultProcessingDisable = 0;
> @@ -227,7 +228,7 @@ CreateSecondLevelPagingEntryTable (
>      }
>      DEBUG ((DEBUG_INFO,"  Lvl4(0x%x): Lvl3Start - 0x%x, Lvl3End - 0x%x\n",
> Index4, Lvl3Start, Lvl3End));
> 
> -    Lvl3PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64
> (Lvl4PtEntry[Index4].Bits.Address, 12);
> +    Lvl3PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(Lvl4PtEntry[Index4].Bits.AddressLo,
> Lvl4PtEntry[Index4].Bits.AddressHi);
>      for (Index3 = Lvl3Start; Index3 <= Lvl3End; Index3++) {
>        if (Lvl3PtEntry[Index3].Uint64 == 0) {
>          Lvl3PtEntry[Index3].Uint64 = (UINT64)(UINTN)AllocateZeroPages (1);
> @@ -239,7 +240,7 @@ CreateSecondLevelPagingEntryTable (
>          SetSecondLevelPagingEntryAttribute (&Lvl3PtEntry[Index3],
> EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE);
>        }
> 
> -      Lvl2PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64
> (Lvl3PtEntry[Index3].Bits.Address, 12);
> +      Lvl2PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(Lvl3PtEntry[Index3].Bits.AddressLo,
> Lvl3PtEntry[Index3].Bits.AddressHi);
>        for (Index2 = 0; Index2 <
> SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); Index2++) {
>          Lvl2PtEntry[Index2].Uint64 = BaseAddress;
>          SetSecondLevelPagingEntryAttribute (&Lvl2PtEntry[Index2],
> IoMmuAccess);
> @@ -341,7 +342,7 @@ DumpDmarContextEntryTable (
>      if (RootEntry[Index].Bits.Present == 0) {
>        continue;
>      }
> -    ContextEntry = (VTD_CONTEXT_ENTRY *)(UINTN)LShiftU64
> (RootEntry[Index].Bits.ContextTablePointer, 12);
> +    ContextEntry = (VTD_CONTEXT_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(RootEntry[Index].Bits.ContextTablePointerLo,
> RootEntry[Index].Bits.ContextTablePointerHi);
>      for (Index2 = 0; Index2 < VTD_CONTEXT_ENTRY_NUMBER; Index2++) {
>        if ((ContextEntry[Index2].Uint128.Uint64Lo != 0) ||
> (ContextEntry[Index2].Uint128.Uint64Hi != 0)) {
>          DEBUG ((DEBUG_INFO,"    ContextEntry(0x%02x) D%02xF%02x -
> 0x%016lx %016lx\n",
> @@ -350,7 +351,7 @@ DumpDmarContextEntryTable (
>        if (ContextEntry[Index2].Bits.Present == 0) {
>          continue;
>        }
> -      DumpSecondLevelPagingEntry ((VOID *)(UINTN)LShiftU64
> (ContextEntry[Index2].Bits.SecondLevelPageTranslationPointer, 12));
> +      DumpSecondLevelPagingEntry ((VOID
> *)(UINTN)VTD_64BITS_ADDRESS(ContextEntry[Index2].Bits.SecondLevelPageTra
> nslationPointerLo,
> ContextEntry[Index2].Bits.SecondLevelPageTranslationPointerHi));
>      }
>    }
>    DEBUG ((DEBUG_INFO,"=========================\n"));
> @@ -387,7 +388,7 @@ DumpSecondLevelPagingEntry (
>      if (Lvl4PtEntry[Index4].Uint64 == 0) {
>        continue;
>      }
> -    Lvl3PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64
> (Lvl4PtEntry[Index4].Bits.Address, 12);
> +    Lvl3PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(Lvl4PtEntry[Index4].Bits.AddressLo,
> Lvl4PtEntry[Index4].Bits.AddressHi);
>      for (Index3 = 0; Index3 <
> SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); Index3++) {
>        if (Lvl3PtEntry[Index3].Uint64 != 0) {
>          DEBUG ((DEBUG_VERBOSE,"    Lvl3Pt Entry(0x%03x) - 0x%016lx\n",
> Index3, Lvl3PtEntry[Index3].Uint64));
> @@ -396,7 +397,7 @@ DumpSecondLevelPagingEntry (
>          continue;
>        }
> 
> -      Lvl2PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY *)(UINTN)LShiftU64
> (Lvl3PtEntry[Index3].Bits.Address, 12);
> +      Lvl2PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(Lvl3PtEntry[Index3].Bits.AddressLo,
> Lvl3PtEntry[Index3].Bits.AddressHi);
>        for (Index2 = 0; Index2 <
> SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); Index2++) {
>          if (Lvl2PtEntry[Index2].Uint64 != 0) {
>            DEBUG ((DEBUG_VERBOSE,"      Lvl2Pt Entry(0x%03x) -
> 0x%016lx\n", Index2, Lvl2PtEntry[Index2].Uint64));
> @@ -405,7 +406,7 @@ DumpSecondLevelPagingEntry (
>            continue;
>          }
>          if (Lvl2PtEntry[Index2].Bits.PageSize == 0) {
> -          Lvl1PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY
> *)(UINTN)LShiftU64 (Lvl2PtEntry[Index2].Bits.Address, 12);
> +          Lvl1PtEntry = (VTD_SECOND_LEVEL_PAGING_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(Lvl2PtEntry[Index2].Bits.AddressLo,
> Lvl2PtEntry[Index2].Bits.AddressHi);
>            for (Index1 = 0; Index1 <
> SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY); Index1++) {
>              if (Lvl1PtEntry[Index1].Uint64 != 0) {
>                DEBUG ((DEBUG_VERBOSE,"        Lvl1Pt Entry(0x%03x) -
> 0x%016lx\n", Index1, Lvl1PtEntry[Index1].Uint64));
> @@ -878,12 +879,13 @@ SetAccessAttribute (
>        DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x
> B%02x D%02x F%02x) New\n", SecondLevelPagingEntry, Segment,
> SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
>        Pt = (UINT64)RShiftU64 ((UINT64)(UINTN)SecondLevelPagingEntry, 12);
> 
> -      ExtContextEntry->Bits.SecondLevelPageTranslationPointer = Pt;
> -      ExtContextEntry->Bits.DomainIdentifier = GetPciDescriptor (VtdIndex,
> Segment, SourceId);
> +      ExtContextEntry->Bits.SecondLevelPageTranslationPointerLo = (UINT32)
> Pt;
> +      ExtContextEntry->Bits.SecondLevelPageTranslationPointerHi = (UINT32)
> RShiftU64(Pt, 20);
> +      ExtContextEntry->Bits.DomainIdentifier = (UINT16) GetPciDescriptor
> (VtdIndex, Segment, SourceId);
>        ExtContextEntry->Bits.Present = 1;
>        DumpDmarExtContextEntryTable
> (mVtdUnitInformation[VtdIndex].ExtRootEntryTable);
>      } else {
> -      SecondLevelPagingEntry = (VOID *)(UINTN)LShiftU64
> (ExtContextEntry->Bits.SecondLevelPageTranslationPointer, 12);
> +      SecondLevelPagingEntry = (VOID
> *)(UINTN)VTD_64BITS_ADDRESS(ExtContextEntry->Bits.SecondLevelPageTransla
> tionPointerLo, ExtContextEntry->Bits.SecondLevelPageTranslationPointerHi);
>        DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x
> B%02x D%02x F%02x)\n", SecondLevelPagingEntry, Segment, SourceId.Bits.Bus,
> SourceId.Bits.Device, SourceId.Bits.Function));
>      }
>    } else if (ContextEntry != NULL) {
> @@ -892,12 +894,13 @@ SetAccessAttribute (
>        DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x
> B%02x D%02x F%02x) New\n", SecondLevelPagingEntry, Segment,
> SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
>        Pt = (UINT64)RShiftU64 ((UINT64)(UINTN)SecondLevelPagingEntry, 12);
> 
> -      ContextEntry->Bits.SecondLevelPageTranslationPointer = Pt;
> -      ContextEntry->Bits.DomainIdentifier = GetPciDescriptor (VtdIndex,
> Segment, SourceId);
> +      ContextEntry->Bits.SecondLevelPageTranslationPointerLo = (UINT32) Pt;
> +      ContextEntry->Bits.SecondLevelPageTranslationPointerHi = (UINT32)
> RShiftU64(Pt, 20);
> +      ContextEntry->Bits.DomainIdentifier = (UINT16) GetPciDescriptor
> (VtdIndex, Segment, SourceId);
>        ContextEntry->Bits.Present = 1;
>        DumpDmarContextEntryTable
> (mVtdUnitInformation[VtdIndex].RootEntryTable);
>      } else {
> -      SecondLevelPagingEntry = (VOID *)(UINTN)LShiftU64
> (ContextEntry->Bits.SecondLevelPageTranslationPointer, 12);
> +      SecondLevelPagingEntry = (VOID
> *)(UINTN)VTD_64BITS_ADDRESS(ContextEntry->Bits.SecondLevelPageTranslatio
> nPointerLo, ContextEntry->Bits.SecondLevelPageTranslationPointerHi);
>        DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x
> B%02x D%02x F%02x)\n", SecondLevelPagingEntry, Segment, SourceId.Bits.Bus,
> SourceId.Bits.Device, SourceId.Bits.Function));
>      }
>    }
> @@ -958,11 +961,13 @@ AlwaysEnablePageAttribute (
>    SecondLevelPagingEntry =
> mVtdUnitInformation[VtdIndex].FixedSecondLevelPagingEntry;
>    Pt = (UINT64)RShiftU64 ((UINT64)(UINTN)SecondLevelPagingEntry, 12);
>    if (ExtContextEntry != NULL) {
> -    ExtContextEntry->Bits.SecondLevelPageTranslationPointer = Pt;
> +    ExtContextEntry->Bits.SecondLevelPageTranslationPointerLo = (UINT32)
> Pt;
> +    ExtContextEntry->Bits.SecondLevelPageTranslationPointerHi = (UINT32)
> RShiftU64(Pt, 20);
>      ExtContextEntry->Bits.DomainIdentifier = ((1 <<
> (UINT8)((UINTN)mVtdUnitInformation[VtdIndex].CapReg.Bits.ND * 2 + 4)) - 1);
>      ExtContextEntry->Bits.Present = 1;
>    } else if (ContextEntry != NULL) {
> -    ContextEntry->Bits.SecondLevelPageTranslationPointer = Pt;
> +    ContextEntry->Bits.SecondLevelPageTranslationPointerLo = (UINT32) Pt;
> +    ContextEntry->Bits.SecondLevelPageTranslationPointerHi = (UINT32)
> RShiftU64(Pt, 20);
>      ContextEntry->Bits.DomainIdentifier = ((1 <<
> (UINT8)((UINTN)mVtdUnitInformation[VtdIndex].CapReg.Bits.ND * 2 + 4)) - 1);
>      ContextEntry->Bits.Present = 1;
>    }
> diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c
> b/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c
> index 0f54b97d566c..65ed16ed7b8e 100644
> --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c
> +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTableEx.c
> @@ -67,14 +67,16 @@ CreateExtContextEntry (
> 
>      ExtRootEntry =
> &mVtdUnitInformation[VtdIndex].ExtRootEntryTable[SourceId.Index.RootIndex
> ];
>      if (ExtRootEntry->Bits.LowerPresent == 0) {
> -      ExtRootEntry->Bits.LowerContextTablePointer  = RShiftU64
> ((UINT64)(UINTN)Buffer, 12);
> +      ExtRootEntry->Bits.LowerContextTablePointerLo  = (UINT32) RShiftU64
> ((UINT64)(UINTN)Buffer, 12);
> +      ExtRootEntry->Bits.LowerContextTablePointerHi  = (UINT32) RShiftU64
> ((UINT64)(UINTN)Buffer, 32);
>        ExtRootEntry->Bits.LowerPresent = 1;
> -      ExtRootEntry->Bits.UpperContextTablePointer  = RShiftU64
> ((UINT64)(UINTN)Buffer, 12) + 1;
> +      ExtRootEntry->Bits.UpperContextTablePointerLo  = (UINT32) RShiftU64
> ((UINT64)(UINTN)Buffer, 12) + 1;
> +      ExtRootEntry->Bits.UpperContextTablePointerHi  = (UINT32) RShiftU64
> (RShiftU64 ((UINT64)(UINTN)Buffer, 12) + 1, 20);
>        ExtRootEntry->Bits.UpperPresent = 1;
>        Buffer = (UINT8 *)Buffer + EFI_PAGES_TO_SIZE (ContextPages);
>      }
> 
> -    ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY
> *)(UINTN)LShiftU64(ExtRootEntry->Bits.LowerContextTablePointer, 12) ;
> +    ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry->Bits.LowerContextTablePointerL
> o, ExtRootEntry->Bits.LowerContextTablePointerHi) ;
>      ExtContextEntry = &ExtContextEntryTable[SourceId.Index.ContextIndex];
>      ExtContextEntry->Bits.TranslationType = 0;
>      ExtContextEntry->Bits.FaultProcessingDisable = 0;
> @@ -122,7 +124,7 @@ DumpDmarExtContextEntryTable (
>      if (ExtRootEntry[Index].Bits.LowerPresent == 0) {
>        continue;
>      }
> -    ExtContextEntry = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)LShiftU64
> (ExtRootEntry[Index].Bits.LowerContextTablePointer, 12);
> +    ExtContextEntry = (VTD_EXT_CONTEXT_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry[Index].Bits.LowerContextTableP
> ointerLo, ExtRootEntry[Index].Bits.LowerContextTablePointerHi);
>      for (Index2 = 0; Index2 < VTD_CONTEXT_ENTRY_NUMBER/2; Index2++) {
>        if ((ExtContextEntry[Index2].Uint256.Uint64_1 != 0) ||
> (ExtContextEntry[Index2].Uint256.Uint64_2 != 0) ||
>            (ExtContextEntry[Index2].Uint256.Uint64_3 != 0) ||
> (ExtContextEntry[Index2].Uint256.Uint64_4 != 0)) {
> @@ -137,7 +139,7 @@ DumpDmarExtContextEntryTable (
>      if (ExtRootEntry[Index].Bits.UpperPresent == 0) {
>        continue;
>      }
> -    ExtContextEntry = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)LShiftU64
> (ExtRootEntry[Index].Bits.UpperContextTablePointer, 12);
> +    ExtContextEntry = (VTD_EXT_CONTEXT_ENTRY
> *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry[Index].Bits.UpperContextTableP
> ointerLo, ExtRootEntry[Index].Bits.UpperContextTablePointerHi);
>      for (Index2 = 0; Index2 < VTD_CONTEXT_ENTRY_NUMBER/2; Index2++) {
>        if ((ExtContextEntry[Index2].Uint256.Uint64_1 != 0) ||
> (ExtContextEntry[Index2].Uint256.Uint64_2 != 0) ||
>            (ExtContextEntry[Index2].Uint256.Uint64_3 != 0) ||
> (ExtContextEntry[Index2].Uint256.Uint64_4 != 0)) {
> diff --git a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c
> b/IntelSiliconPkg/IntelVTdDxe/VtdReg.c
> index d19aea2cc184..f36e3dec0671 100644
> --- a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c
> +++ b/IntelSiliconPkg/IntelVTdDxe/VtdReg.c
> @@ -526,7 +526,7 @@ DumpVtdRegs (
>      FrcdReg.Uint64[1] = MmioRead64
> (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16)
> + (Index * 16) + R_FRCD_REG + sizeof(UINT64)));
>      DEBUG((DEBUG_INFO, "  FRCD_REG[%d] - 0x%016lx %016lx\n", Index,
> FrcdReg.Uint64[1], FrcdReg.Uint64[0]));
>      if (FrcdReg.Uint64[1] != 0 || FrcdReg.Uint64[0] != 0) {
> -      DEBUG((DEBUG_INFO, "    Fault Info - 0x%016lx\n",
> LShiftU64(FrcdReg.Bits.FI, 12)));
> +      DEBUG((DEBUG_INFO, "    Fault Info - 0x%016lx\n",
> VTD_64BITS_ADDRESS(FrcdReg.Bits.FILo, FrcdReg.Bits.FIHi)));
>        SourceId.Uint16 = (UINT16)FrcdReg.Bits.SID;
>        DEBUG((DEBUG_INFO, "    Source - B%02x D%02x F%02x\n",
> SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function));
>        DEBUG((DEBUG_INFO, "    Type - %x (%a)\n", FrcdReg.Bits.T,
> FrcdReg.Bits.T ? "read" : "write"));
> --
> 2.7.0.windows.1

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