From nobody Sun May 5 15:14:28 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1499146326719402.7201482448032; Mon, 3 Jul 2017 22:32:06 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 15E5B21CAD9B2; Mon, 3 Jul 2017 22:30:26 -0700 (PDT) Received: from g2t4622.austin.hp.com (g2t4622.austin.hp.com [15.73.212.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 790FF21A00AC2 for ; Mon, 3 Jul 2017 22:30:24 -0700 (PDT) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.158.204]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by g2t4622.austin.hp.com (Postfix) with ESMTPS id F12F537E; Tue, 4 Jul 2017 05:32:00 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org From: Abner Chang To: edk2-devel@lists.01.org Date: Tue, 4 Jul 2017 13:29:21 +0800 Message-Id: <1499146164-26231-2-git-send-email-abner.chang@hpe.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499146164-26231-1-git-send-email-abner.chang@hpe.com> References: <1499146164-26231-1-git-send-email-abner.chang@hpe.com> Subject: [edk2] [staging/branch RISC-V PATCH 1/4] RiscVPkg/Sec: Use MRET in machine trap handler. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Use MRET(Machine Mode Trap-Return) instead of SRET(Supervisor Mode Trap-Return) to return from machine mode trap handler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Abner Chang --- RiscVPkg/Universal/Sec/Riscv64/SecEntry.s | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/RiscVPkg/Universal/Sec/Riscv64/SecEntry.s b/RiscVPkg/Universal= /Sec/Riscv64/SecEntry.s index f13596d..cc4ca6d 100644 --- a/RiscVPkg/Universal/Sec/Riscv64/SecEntry.s +++ b/RiscVPkg/Universal/Sec/Riscv64/SecEntry.s @@ -2,7 +2,7 @@ // // RISC-V Sec module. // -// Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+// Copyright (c) 2016-2017, Hewlett Packard Enterprise Development LP. All= rights reserved.
// // This program and the accompanying materials // are licensed and made available under the terms and conditions of the B= SD License @@ -77,33 +77,33 @@ ASM_PFX(_ModuleEntryPoint): // ASM_PFX(TrapFromUserModeHandler): call RiscVUserModeTrapHandler - eret + mret =20 // //Supervisor mode trap handler. // ASM_PFX(TrapFromSupervisorModeHandler): call RiscVSupervisorModeTrapHandler - eret + mret =20 // // Hypervisor mode trap handler. // ASM_PFX(TrapFromHypervisorModeHandler): call RiscVHypervisorModeTrapHandler - eret + mret =20 // // Machine mode trap handler. // ASM_PFX(TrapFromMachineModeHandler): call RiscVMachineModeTrapHandler - eret + mret =20 // // NMI trap handler. // ASM_PFX(NmiHandler): call RiscVNmiHandler - eret + mret =20 --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sun May 5 15:14:28 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 149914632864239.10395596863464; Mon, 3 Jul 2017 22:32:08 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4ABE021CB74A4; Mon, 3 Jul 2017 22:30:27 -0700 (PDT) Received: from g2t4622.austin.hp.com (g2t4622.austin.hp.com [15.73.212.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D938621CAD99F for ; Mon, 3 Jul 2017 22:30:25 -0700 (PDT) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.158.204]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by g2t4622.austin.hp.com (Postfix) with ESMTPS id 61920379; Tue, 4 Jul 2017 05:32:02 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org From: Abner Chang To: edk2-devel@lists.01.org Date: Tue, 4 Jul 2017 13:29:22 +0800 Message-Id: <1499146164-26231-3-git-send-email-abner.chang@hpe.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499146164-26231-1-git-send-email-abner.chang@hpe.com> References: <1499146164-26231-1-git-send-email-abner.chang@hpe.com> Subject: [edk2] [staging/branch RISC-V PATCH 2/4] BaseTools: Support RISC-V GCC 7.1.1. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add build tool definition for RISC-V GCC 7.1.1. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Abner Chang --- BaseTools/Conf/tools_def.template | 85 +++++++++++++++++++++++++++++++++++= +++- 1 file changed, 84 insertions(+), 1 deletion(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.t= emplate index 2ae009e..682d8b3 100644 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -3,7 +3,7 @@ # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
# Copyright (c) 2015, Hewlett-Packard Development Company, L.P.
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
+# (C) Copyright 2016-2017 Hewlett Packard Enterprise Development LP
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -204,6 +204,8 @@ DEFINE GCC49_X64_PREFIX =3D ENV(GCC49_BIN) # DEFINE GCC53RISCV_RISCV32_PREFIX =3D ~/riscv/bin/ DEFINE GCC53RISCV_RISCV64_PREFIX =3D ~/riscv/bin/ +DEFINE GCC711RISCV_RISCV32_PREFIX =3D ~/riscv/bin/ +DEFINE GCC711RISCV_RISCV64_PREFIX =3D ~/riscv/bin/ =20 DEFINE UNIX_IASL_BIN =3D ENV(IASL_PREFIX)iasl DEFINE WIN_ASL_BIN_DIR =3D C:\ASL @@ -4468,6 +4470,19 @@ DEFINE GCC53RISCV_RISCV64_DLINK_FLAGS =3D DEF(= GCC53RISCV_RISCV32_RISCV64_DLI DEFINE GCC53RISCV_RISCV64_DLINK2_FLAGS =3D DEF(GCC49_X64_DLINK2_FLAGS) DEFINE GCC53RISCV_ASM_FLAGS =3D DEF(GCC49_ASM_FLAGS) =20 +DEFINE GCC711RISCV_RISCV32_ARCH =3D rv32imafd +DEFINE GCC711RISCV_RISCV64_ARCH =3D rv64imafd +DEFINE GCC711RISCV_CC_FLAGS_WARNING_DISABLE =3D -Wno-tautological-compare = -Wno-pointer-compare +DEFINE GCC711RISCV_RISCV32_CC_FLAGS =3D DEF(GCC44_ALL_CC_FLAGS) DEF(GCC7= 11RISCV_CC_FLAGS_WARNING_DISABLE) -march=3DDEF(GCC711RISCV_RISCV32_ARCH) -m= align-double -fno-stack-protector -D EFI32 -fno-asynchronous-unwind-tables = -Wno-address -Wno-unused-but-set-variable -fpack-struct=3D8 +DEFINE GCC711RISCV_RISCV64_CC_FLAGS =3D DEF(GCC44_ALL_CC_FLAGS) DEF(GCC7= 11RISCV_CC_FLAGS_WARNING_DISABLE) -march=3DDEF(GCC711RISCV_RISCV64_ARCH) -f= no-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-async= hronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=3D8 +DEFINE GCC711RISCV_RISCV32_RISCV64_DLINK_COMMON =3D -nostdlib -n -q --gc= -sections -z common-page-size=3D0x40 +DEFINE GCC711RISCV_RISCV32_RISCV64_ASLDLINK_FLAGS =3D DEF(GCC53RISCV_RISCV= 32_RISCV64_DLINK_COMMON) --entry ReferenceAcpiTable -u ReferenceAcpiTable +DEFINE GCC711RISCV_RISCV32_RISCV64_DLINK_FLAGS =3D DEF(GCC53RISCV_RISCV= 32_RISCV64_DLINK_COMMON) --entry $(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POIN= T) -Map $(DEST_DIR_DEBUG)/$(BASE_NAME).map +DEFINE GCC711RISCV_RISCV32_DLINK2_FLAGS =3D DEF(GCC49_IA32_DLINK2_FLA= GS) +DEFINE GCC711RISCV_RISCV64_DLINK_FLAGS =3D DEF(GCC53RISCV_RISCV32_RI= SCV64_DLINK_FLAGS) -melf64lriscv --oformat=3Delf64-littleriscv --no-relax +DEFINE GCC711RISCV_RISCV64_DLINK2_FLAGS =3D DEF(GCC49_X64_DLINK2_FLAGS) +DEFINE GCC711RISCV_ASM_FLAGS =3D DEF(GCC49_ASM_FLAGS) + ##########################################################################= ########## # # Unix GCC And Intel Linux ACPI Compiler @@ -5269,6 +5284,74 @@ RELEASE_GCC49_AARCH64_DLINK_FLAGS =3D DEF(GCC49_AAR= CH64_DLINK_FLAGS) =20 ##########################################################################= ########## # +# GCC 7.1.1 RISC-V This configuration is used to compile under Linux to pr= oduce +# PE/COFF binaries using GCC 7.1.1. +# +##########################################################################= ########## + +*_GCC711RISCV_*_*_FAMILY =3D GCC + +*_GCC711RISCV_*_MAKE_PATH =3D DEF(GCC49_IA32_PREFIX)make +*_GCC711RISCV_*_PP_FLAGS =3D DEF(GCC_PP_FLAGS) +*_GCC711RISCV_*_ASLPP_FLAGS =3D DEF(GCC_ASLPP_FLAGS) +*_GCC711RISCV_*_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) +*_GCC711RISCV_*_VFRPP_FLAGS =3D DEF(GCC_VFRPP_FLAGS) +*_GCC711RISCV_*_APP_FLAGS =3D +*_GCC711RISCV_*_ASL_FLAGS =3D DEF(IASL_FLAGS) +*_GCC711RISCV_*_ASL_OUTFLAGS =3D DEF(IASL_OUTFLAGS) + +################## +# GCC711RISCV RISCV32 definitions +################## + +*_GCC711RISCV_RISCV32_OBJCOPY_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-objcopy +*_GCC711RISCV_RISCV32_SLINK_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-gcc-ar +*_GCC711RISCV_RISCV32_DLINK_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-ld +*_GCC711RISCV_RISCV32_ASLDLINK_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-ld +*_GCC711RISCV_RISCV32_ASM_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV32_PP_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV32_VFRPP_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV32_ASLCC_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV32_ASLPP_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV32_RC_PATH =3D ENV(GCC711RISCV_RISCV32_PRE= FIX)riscv64-unknown-elf-objcopy + +*_GCC711RISCV_RISCV32_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) -m32 +*_GCC711RISCV_RISCV32_ASLDLINK_FLAGS =3D DEF(GCC711RISCV_RISCV32_RIS= CV64_ASLDLINK_FLAGS) -m elf_i386 +*_GCC711RISCV_RISCV32_ASM_FLAGS =3D DEF(GCC711RISCV_ASM_FLAGS) = -m32 -march=3Di386 +*_GCC711RISCV_RISCV32_CC_FLAGS =3D DEF(GCC711RISCV_RISCV32_CC_= FLAGS) -Os +*_GCC711RISCV_RISCV32_DLINK_FLAGS =3D DEF(GCC711RISCV_RISCV32_RIS= CV64_DLINK_FLAGS) -m elf_i386 --oformat=3Delf32-i386 +*_GCC711RISCV_RISCV32_DLINK2_FLAGS =3D DEF(GCC711RISCV_RISCV32_DLI= NK2_FLAGS) +*_GCC711RISCV_RISCV32_RC_FLAGS =3D DEF(GCC_IA32_RC_FLAGS) +*_GCC711RISCV_RISCV32_OBJCOPY_FLAGS =3D +*_GCC711RISCV_RISCV32_NASM_FLAGS =3D -f elf32 + +################## +# GCC711RISCV RISCV64 definitions +################## +*_GCC711RISCV_RISCV64_OBJCOPY_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-objcopy +*_GCC711RISCV_RISCV64_CC_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV64_SLINK_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-gcc-ar +*_GCC711RISCV_RISCV64_DLINK_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-ld +*_GCC711RISCV_RISCV64_ASLDLINK_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-ld +*_GCC711RISCV_RISCV64_ASM_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV64_PP_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV64_VFRPP_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV64_ASLCC_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV64_ASLPP_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-gcc +*_GCC711RISCV_RISCV64_RC_PATH =3D ENV(GCC711RISCV_RISCV64_PRE= FIX)riscv64-unknown-elf-objcopy + +*_GCC711RISCV_RISCV64_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) -m64 +*_GCC711RISCV_RISCV64_ASLDLINK_FLAGS =3D DEF(GCC711RISCV_RISCV32_RIS= CV64_ASLDLINK_FLAGS) -m elf_x86_64 +*_GCC711RISCV_RISCV64_ASM_FLAGS =3D DEF(GCC711RISCV_ASM_FLAGS)=20 +*_GCC711RISCV_RISCV64_CC_FLAGS =3D DEF(GCC711RISCV_RISCV64_CC_= FLAGS) -save-temps +*_GCC711RISCV_RISCV64_DLINK_FLAGS =3D DEF(GCC711RISCV_RISCV64_DLI= NK_FLAGS) +*_GCC711RISCV_RISCV64_DLINK2_FLAGS =3D DEF(GCC711RISCV_RISCV64_DLI= NK2_FLAGS) +*_GCC711RISCV_RISCV64_RC_FLAGS =3D DEF(GCC_IA32_RC_FLAGS) +*_GCC711RISCV_RISCV64_OBJCOPY_FLAGS =3D +*_GCC711RISCV_RISCV64_NASM_FLAGS =3D -f elf64 + +##########################################################################= ########## +# # CLANG35 - This configuration is used to compile under Linux to produce # PE/COFF binaries using the clang compiler and assembler (v3.= 5 and up) # and GNU linker --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sun May 5 15:14:28 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1499146331179655.2477139877545; Mon, 3 Jul 2017 22:32:11 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8393A21CB74B7; Mon, 3 Jul 2017 22:30:28 -0700 (PDT) Received: from g2t4622.austin.hp.com (g2t4622.austin.hp.com [15.73.212.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5154F21CB74B5 for ; Mon, 3 Jul 2017 22:30:27 -0700 (PDT) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.158.204]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by g2t4622.austin.hp.com (Postfix) with ESMTPS id C6BAE374; Tue, 4 Jul 2017 05:32:03 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org From: Abner Chang To: edk2-devel@lists.01.org Date: Tue, 4 Jul 2017 13:29:23 +0800 Message-Id: <1499146164-26231-4-git-send-email-abner.chang@hpe.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499146164-26231-1-git-send-email-abner.chang@hpe.com> References: <1499146164-26231-1-git-send-email-abner.chang@hpe.com> Subject: [edk2] [staging/branch RISC-V PATCH 3/4] BaseTools: Add more RISC-V relocation types. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add more RISC-V relocation types to prevent from errors happen when build RISC-V edk2 port by RISC-V gcc 7.1.1. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Abner Chang --- BaseTools/Source/C/GenFw/Elf64Convert.c | 18 +++++++++++++++++- BaseTools/Source/C/GenFw/elf_common.h | 10 +++++++++- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/G= enFw/Elf64Convert.c index 9deb846..4857485 100644 --- a/BaseTools/Source/C/GenFw/Elf64Convert.c +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c @@ -3,7 +3,7 @@ Elf64 convert solution =20 Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.
Portions copyright (c) 2013-2014, ARM Ltd. All rights reserved.
-Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights = reserved.
+Copyright (c) 2016-2017, Hewlett Packard Enterprise Development LP. All ri= ghts reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this @@ -953,6 +953,14 @@ WriteSections64 ( case R_RISCV_GPREL_I: case R_RISCV_GPREL_S: case R_RISCV_CALL: + case R_RISCV_RVC_BRANCH: + case R_RISCV_RVC_JUMP: + case R_RISCV_RELAX: + case R_RISCV_SUB6: + case R_RISCV_SET6: + case R_RISCV_SET8: + case R_RISCV_SET16: + case R_RISCV_SET32: break; =20 default: @@ -1129,6 +1137,14 @@ WriteRelocations64 ( case R_RISCV_GPREL_I: case R_RISCV_GPREL_S: case R_RISCV_CALL: + case R_RISCV_RVC_BRANCH: + case R_RISCV_RVC_JUMP: + case R_RISCV_RELAX: + case R_RISCV_SUB6: + case R_RISCV_SET6: + case R_RISCV_SET8: + case R_RISCV_SET16: + case R_RISCV_SET32: break; =20 default: diff --git a/BaseTools/Source/C/GenFw/elf_common.h b/BaseTools/Source/C/Gen= Fw/elf_common.h index 0ff9720..65ec5f7 100644 --- a/BaseTools/Source/C/GenFw/elf_common.h +++ b/BaseTools/Source/C/GenFw/elf_common.h @@ -3,7 +3,7 @@ Ported ELF include files from FreeBSD =20 Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
-Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights = reserved.
+Copyright (c) 2016-2017, Hewlett Packard Enterprise Development LP. All ri= ghts reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -1109,4 +1109,12 @@ typedef struct { #define R_RISCV_RVC_LUI 46 #define R_RISCV_GPREL_I 47 #define R_RISCV_GPREL_S 48 +#define R_RISCV_TPREL_I 49 +#define R_RISCV_TPREL_S 50 +#define R_RISCV_RELAX 51 +#define R_RISCV_SUB6 52 +#define R_RISCV_SET6 53 +#define R_RISCV_SET8 54 +#define R_RISCV_SET16 55 +#define R_RISCV_SET32 56 #endif /* !_SYS_ELF_COMMON_H_ */ --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sun May 5 15:14:28 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1499146333813162.28380666590135; Mon, 3 Jul 2017 22:32:13 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C253E21CB74C8; Mon, 3 Jul 2017 22:30:29 -0700 (PDT) Received: from g2t4622.austin.hp.com (g2t4622.austin.hp.com [15.73.212.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B4C3421CB74C1 for ; Mon, 3 Jul 2017 22:30:28 -0700 (PDT) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.158.204]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by g2t4622.austin.hp.com (Postfix) with ESMTPS id 39181376; Tue, 4 Jul 2017 05:32:04 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org From: Abner Chang To: edk2-devel@lists.01.org Date: Tue, 4 Jul 2017 13:29:24 +0800 Message-Id: <1499146164-26231-5-git-send-email-abner.chang@hpe.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499146164-26231-1-git-send-email-abner.chang@hpe.com> References: <1499146164-26231-1-git-send-email-abner.chang@hpe.com> Subject: [edk2] [staging/branch RISC-V PATCH 4/4] RiscVVirtPkg: Update README file X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Update README for supporting RISC-V gcc 7.1.1. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Abner Chang --- RiscVVirtPkg/README | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/RiscVVirtPkg/README b/RiscVVirtPkg/README index 64611ad..ff48f62 100644 --- a/RiscVVirtPkg/README +++ b/RiscVVirtPkg/README @@ -1,7 +1,7 @@ ## @file # Readme of how to build and launch RiscVVirtPkg on QEMU. # -# Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# Copyright (c) 2016-2017, Hewlett Packard Enterprise Development LP. All= rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -40,19 +40,23 @@ Current capabilities: =20 =3D=3D=3D Get source code =3D=3D=3D * QEMU RISC-V PC/AT port. - git clone https://github.com/AbnerChang/RiscVQemuPcat.git + git clone https://github.com/AbnerChang/RiscVQemuPcat.git (Latest commit = SHA 9992f910 07/03/2017) =20 -* RISC-V tools - $git clone https://github.com/riscv/riscv-tools.git (Lastest commit 419f1= b5 2016/4/1) +* RISC-V tools (RISC-V GCC 7.1.1) + $git clone https://github.com/riscv/riscv-tools.git (Lastest commit SHA 7= cd1d105 06/22/2017) =20 * EDK2 open source =20 =3D=3D=3D Build RISC-V tool chain =3D=3D=3D Before you build RISC-V tool chain, you need below packages. -*sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libm= pfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libtool pa= tchutils bc +*sudo apt-get install autoconf automake autotools-dev curl device-tree-com= piler libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex tex= info gperf libtool patchutils bc zlib1g-dev *Change directory to riscv-tools git submodule update --init --recursive export RISCV=3D~/riscv +*In build.sh, add build option "--with-arch=3Drv64g" to "build_project" as= below, +build_project riscv-gnu-toolchain --prefix=3D$RISCV --with-arch=3Drv64g +This builds RISC-V tool chain to use RISC-V "G" varient. +*Build RISC-V tool chain ./build.sh =20 The binaries needed for building EDK2 open source to RISC-V ISA are built = in to ~/riscv @@ -80,7 +84,7 @@ Before you build QEMU RISC-V EDK2, you need belwo package. *Conf/target.txt ACTIVE_PLATFORM =3D RiscVVirtPkg/RiscVVirt64.dsc TARGET_ARCH =3D RISCV64 -TOOL_CHAIN_TAG =3D GCC53RISCV +TOOL_CHAIN_TAG =3D GCC711RISCV =20 *$export PATH=3D$PATH:~/riscv/bin *$make -C BaseTools --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel