From nobody Sat Nov 2 14:32:26 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1488553908138884.1681769643221; Fri, 3 Mar 2017 07:11:48 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D0BF78221C; Fri, 3 Mar 2017 07:11:44 -0800 (PST) Received: from mail-wm0-x234.google.com (mail-wm0-x234.google.com [IPv6:2a00:1450:400c:c09::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AF9118221C for ; Fri, 3 Mar 2017 07:11:43 -0800 (PST) Received: by mail-wm0-x234.google.com with SMTP id v186so17651443wmd.0 for ; Fri, 03 Mar 2017 07:11:43 -0800 (PST) Received: from localhost.localdomain ([105.147.1.203]) by smtp.gmail.com with ESMTPSA id w207sm3428523wmw.1.2017.03.03.07.11.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Mar 2017 07:11:41 -0800 (PST) X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gT9IGtM1KAhH7ZBcgDogZGUmWAKOutcUW0r/NV6u8hg=; b=cUj237GQzPgV4n27MkwBqitIJYU3XvnUpJ/V2k22rzOxqkG5mOfqJzkbPpuAKmxdxU 61ZipZjRPCR+1RvksHL6h6K3Omtkx5kewkVuCLwtRO+oOA7bPhcPpXXGfmgLx6VvodiQ +POhTBrCtXschkEVjoDouq8lbMq/94lsmxVlA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gT9IGtM1KAhH7ZBcgDogZGUmWAKOutcUW0r/NV6u8hg=; b=kKtGx47UAjDe+Pu+g7Pa5yIl31noREbcEk/P9GFvRZMm/c+xpwBiJy9VQami+lECU5 gtCTGyRnQYaaiIx/kk2klpAAayy8hqpDEF9z21mmiuKBDc0LiCfJ0OeDlgq0RiEcaytJ ga1BnkPpc2IOitkrPWH0DhQOoTRX23hYPLH+roZm8fK/NAr/dBF3PSGrVvltxcIF4fdB T2dpgdOTBo72vXqYor1RU021haiUuqDQWa6qxBLLS3MWW6oTmzKYBEpVk7P16N93TJy5 qHtEFNFNvk6uz/nxSmIWRFKr/XlCFEvbfVvqBoss0BwiwPb7rzlvkZVE9Un+Y80L9799 JqlA== X-Gm-Message-State: AMke39me3oT8diBBDMlSNjsEo2lFOBcLbiT5jTUCsjMGglRrmi0q4Fyb3ShDoqmJlbyu6Jwv X-Received: by 10.28.111.151 with SMTP id c23mr3514679wmi.17.1488553901823; Fri, 03 Mar 2017 07:11:41 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, liming.gao@intel.com, michael.d.kinney@intel.com Date: Fri, 3 Mar 2017 15:11:31 +0000 Message-Id: <1488553894-3520-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488553894-3520-1-git-send-email-ard.biesheuvel@linaro.org> References: <1488553894-3520-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v4 1/4] MdePkg/ProcessorBind: add defines for page allocation granularity X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jiewen.yao@intel.com, star.zeng@intel.com, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The UEFI spec differs between architectures in the minimum alignment and granularity of page allocations that are visible to the OS as EFI_MEMORY_RUNTIME regions. So define macros that carry these values to the respective ProcessorBind.h header files. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdePkg/Include/AArch64/ProcessorBind.h | 6 ++++++ MdePkg/Include/Arm/ProcessorBind.h | 6 ++++++ MdePkg/Include/Ebc/ProcessorBind.h | 6 ++++++ MdePkg/Include/Ia32/ProcessorBind.h | 6 ++++++ MdePkg/Include/Ipf/ProcessorBind.h | 6 ++++++ MdePkg/Include/X64/ProcessorBind.h | 6 ++++++ 6 files changed, 36 insertions(+) diff --git a/MdePkg/Include/AArch64/ProcessorBind.h b/MdePkg/Include/AArch6= 4/ProcessorBind.h index f100d96be079..775e7498c5c9 100644 --- a/MdePkg/Include/AArch64/ProcessorBind.h +++ b/MdePkg/Include/AArch64/ProcessorBind.h @@ -104,6 +104,12 @@ typedef INT64 INTN; /// #define CPU_STACK_ALIGNMENT 16 =20 +/// +/// Page allocation granularity for AARCH64 +/// +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000) + // // Modifier to ensure that all protocol member functions and EFI intrinsics // use the correct C calling convention. All protocol member functions and diff --git a/MdePkg/Include/Arm/ProcessorBind.h b/MdePkg/Include/Arm/Proces= sorBind.h index a543687e57fd..dde1fd1152ba 100644 --- a/MdePkg/Include/Arm/ProcessorBind.h +++ b/MdePkg/Include/Arm/ProcessorBind.h @@ -110,6 +110,12 @@ typedef INT32 INTN; /// #define CPU_STACK_ALIGNMENT sizeof(UINT64) =20 +/// +/// Page allocation granularity for ARM +/// +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000) + // // Modifier to ensure that all protocol member functions and EFI intrinsics // use the correct C calling convention. All protocol member functions and diff --git a/MdePkg/Include/Ebc/ProcessorBind.h b/MdePkg/Include/Ebc/Proces= sorBind.h index 075f768c7691..da8b1a6d802a 100644 --- a/MdePkg/Include/Ebc/ProcessorBind.h +++ b/MdePkg/Include/Ebc/ProcessorBind.h @@ -115,6 +115,12 @@ typedef unsigned long UINTN; #define CPU_STACK_ALIGNMENT sizeof(UINTN) =20 /// +/// Page allocation granularity for EBC +/// +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000) + +/// /// Modifier to ensure that all protocol member functions and EFI intrinsi= cs /// use the correct C calling convention. All protocol member functions and /// EFI intrinsics are required to modify their member functions with EFIA= PI. diff --git a/MdePkg/Include/Ia32/ProcessorBind.h b/MdePkg/Include/Ia32/Proc= essorBind.h index 086b1ff7b1b3..8ba2348261a2 100644 --- a/MdePkg/Include/Ia32/ProcessorBind.h +++ b/MdePkg/Include/Ia32/ProcessorBind.h @@ -257,6 +257,12 @@ typedef INT32 INTN; /// #define CPU_STACK_ALIGNMENT sizeof(UINTN) =20 +/// +/// Page allocation granularity for IA-32. +/// +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000) + // // Modifier to ensure that all protocol member functions and EFI intrinsics // use the correct C calling convention. All protocol member functions and diff --git a/MdePkg/Include/Ipf/ProcessorBind.h b/MdePkg/Include/Ipf/Proces= sorBind.h index c19e47d8f3ca..51885ca61359 100644 --- a/MdePkg/Include/Ipf/ProcessorBind.h +++ b/MdePkg/Include/Ipf/ProcessorBind.h @@ -248,6 +248,12 @@ typedef INT64 INTN; /// #define CPU_STACK_ALIGNMENT 16 =20 +/// +/// Page allocation granularity for Itanium +/// +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x2000) + // // Modifier to ensure that all protocol member functions and EFI intrinsics // use the correct C calling convention. All protocol member functions and diff --git a/MdePkg/Include/X64/ProcessorBind.h b/MdePkg/Include/X64/Proces= sorBind.h index 23e6e55abff6..72cc85151cba 100644 --- a/MdePkg/Include/X64/ProcessorBind.h +++ b/MdePkg/Include/X64/ProcessorBind.h @@ -271,6 +271,12 @@ typedef INT64 INTN; /// #define CPU_STACK_ALIGNMENT 16 =20 +/// +/// Page allocation granularity for x64 +/// +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000) +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x1000) + // // Modifier to ensure that all protocol member functions and EFI intrinsics // use the correct C calling convention. All protocol member functions and --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel