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Wed, 01 Mar 2017 08:31:51 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, lersek@redhat.com Date: Wed, 1 Mar 2017 16:31:39 +0000 Message-Id: <1488385903-30267-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488385903-30267-1-git-send-email-ard.biesheuvel@linaro.org> References: <1488385903-30267-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 1/5] ArmPkg/ArmMmuLib AARCH64: use correct return type for exported functions X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The routines ArmConfigureMmu() and SetMemoryAttributes() [*] are declared as returning EFI_STATUS in the respective header files, so align the definitions with that. * SetMemoryAttributes() is declared in the wrong header (and defined in ArmMmuLib for AARCH64 and in CpuDxe for ARM) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 52 ++++++++++---------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Libr= ary/ArmMmuLib/AArch64/ArmMmuLibCore.c index 2f8f99d44a31..df170d20a2c2 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -329,7 +329,7 @@ GetBlockEntryListFromAddress ( } =20 STATIC -RETURN_STATUS +EFI_STATUS UpdateRegionMapping ( IN UINT64 *RootTable, IN UINT64 RegionStart, @@ -347,7 +347,7 @@ UpdateRegionMapping ( // Ensure the Length is aligned on 4KB boundary if ((RegionLength =3D=3D 0) || ((RegionLength & (SIZE_4KB - 1)) !=3D 0))= { ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER); - return RETURN_INVALID_PARAMETER; + return EFI_INVALID_PARAMETER; } =20 do { @@ -357,7 +357,7 @@ UpdateRegionMapping ( BlockEntry =3D GetBlockEntryListFromAddress (RootTable, RegionStart, &= TableLevel, &BlockEntrySize, &LastBlockEntry); if (BlockEntry =3D=3D NULL) { // GetBlockEntryListFromAddress() return NULL when it fails to alloc= ate new pages from the Translation Tables - return RETURN_OUT_OF_RESOURCES; + return EFI_OUT_OF_RESOURCES; } =20 if (TableLevel !=3D 3) { @@ -385,11 +385,11 @@ UpdateRegionMapping ( } while ((RegionLength >=3D BlockEntrySize) && (BlockEntry <=3D LastBl= ockEntry)); } while (RegionLength !=3D 0); =20 - return RETURN_SUCCESS; + return EFI_SUCCESS; } =20 STATIC -RETURN_STATUS +EFI_STATUS FillTranslationTable ( IN UINT64 *RootTable, IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryRegion @@ -446,7 +446,7 @@ GcdAttributeToPageAttribute ( return PageAttributes | TT_AF; } =20 -RETURN_STATUS +EFI_STATUS SetMemoryAttributes ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, @@ -454,7 +454,7 @@ SetMemoryAttributes ( IN EFI_PHYSICAL_ADDRESS VirtualMask ) { - RETURN_STATUS Status; + EFI_STATUS Status; UINT64 *TranslationTable; UINT64 PageAttributes; UINT64 PageAttributeMask; @@ -480,18 +480,18 @@ SetMemoryAttributes ( Length, PageAttributes, PageAttributeMask); - if (RETURN_ERROR (Status)) { + if (EFI_ERROR (Status)) { return Status; } =20 // Invalidate all TLB entries so changes are synced ArmInvalidateTlb (); =20 - return RETURN_SUCCESS; + return EFI_SUCCESS; } =20 STATIC -RETURN_STATUS +EFI_STATUS SetMemoryRegionAttribute ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, @@ -499,23 +499,23 @@ SetMemoryRegionAttribute ( IN UINT64 BlockEntryMask ) { - RETURN_STATUS Status; + EFI_STATUS Status; UINT64 *RootTable; =20 RootTable =3D ArmGetTTBR0BaseAddress (); =20 Status =3D UpdateRegionMapping (RootTable, BaseAddress, Length, Attribut= es, BlockEntryMask); - if (RETURN_ERROR (Status)) { + if (EFI_ERROR (Status)) { return Status; } =20 // Invalidate all TLB entries so changes are synced ArmInvalidateTlb (); =20 - return RETURN_SUCCESS; + return EFI_SUCCESS; } =20 -RETURN_STATUS +EFI_STATUS ArmSetMemoryRegionNoExec ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length @@ -536,7 +536,7 @@ ArmSetMemoryRegionNoExec ( ~TT_ADDRESS_MASK_BLOCK_ENTRY); } =20 -RETURN_STATUS +EFI_STATUS ArmClearMemoryRegionNoExec ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length @@ -554,7 +554,7 @@ ArmClearMemoryRegionNoExec ( Mask); } =20 -RETURN_STATUS +EFI_STATUS ArmSetMemoryRegionReadOnly ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length @@ -567,7 +567,7 @@ ArmSetMemoryRegionReadOnly ( ~TT_ADDRESS_MASK_BLOCK_ENTRY); } =20 -RETURN_STATUS +EFI_STATUS ArmClearMemoryRegionReadOnly ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length @@ -580,7 +580,7 @@ ArmClearMemoryRegionReadOnly ( ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK)); } =20 -RETURN_STATUS +EFI_STATUS EFIAPI ArmConfigureMmu ( IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable, @@ -594,11 +594,11 @@ ArmConfigureMmu ( UINTN T0SZ; UINTN RootTableEntryCount; UINT64 TCR; - RETURN_STATUS Status; + EFI_STATUS Status; =20 if(MemoryTable =3D=3D NULL) { ASSERT (MemoryTable !=3D NULL); - return RETURN_INVALID_PARAMETER; + return EFI_INVALID_PARAMETER; } =20 // Cover the entire GCD memory space @@ -632,7 +632,7 @@ ArmConfigureMmu ( } else { DEBUG ((EFI_D_ERROR, "ArmConfigureMmu: The MaxAddress 0x%lX is not s= upported by this MMU configuration.\n", MaxAddress)); ASSERT (0); // Bigger than 48-bit memory space are not supported - return RETURN_UNSUPPORTED; + return EFI_UNSUPPORTED; } } else if (ArmReadCurrentEL () =3D=3D AARCH64_EL1) { // Due to Cortex-A57 erratum #822227 we must set TG1[1] =3D=3D 1, rega= rdless of EPD1. @@ -654,11 +654,11 @@ ArmConfigureMmu ( } else { DEBUG ((EFI_D_ERROR, "ArmConfigureMmu: The MaxAddress 0x%lX is not s= upported by this MMU configuration.\n", MaxAddress)); ASSERT (0); // Bigger than 48-bit memory space are not supported - return RETURN_UNSUPPORTED; + return EFI_UNSUPPORTED; } } else { ASSERT (0); // UEFI is only expected to run at EL2 and EL1, not EL3. - return RETURN_UNSUPPORTED; + return EFI_UNSUPPORTED; } =20 // @@ -680,7 +680,7 @@ ArmConfigureMmu ( // Allocate pages for translation table TranslationTable =3D AllocatePages (1); if (TranslationTable =3D=3D NULL) { - return RETURN_OUT_OF_RESOURCES; + return EFI_OUT_OF_RESOURCES; } // We set TTBR0 just after allocating the table to retrieve its location= from the subsequent // functions without needing to pass this value across the functions. Th= e MMU is only enabled @@ -719,7 +719,7 @@ ArmConfigureMmu ( DEBUG_CODE_END (); =20 Status =3D FillTranslationTable (TranslationTable, MemoryTable); - if (RETURN_ERROR (Status)) { + if (EFI_ERROR (Status)) { goto FREE_TRANSLATION_TABLE; } MemoryTable++; @@ -739,7 +739,7 @@ ArmConfigureMmu ( ArmEnableDataCache (); =20 ArmEnableMmu (); - return RETURN_SUCCESS; + return EFI_SUCCESS; =20 FREE_TRANSLATION_TABLE: FreePages (TranslationTable, 1); --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel