From nobody Tue Apr 23 18:23:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487756315474465.20684731320057; Wed, 22 Feb 2017 01:38:35 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 50DA682242; Wed, 22 Feb 2017 01:38:33 -0800 (PST) Received: from mail-wm0-x230.google.com (mail-wm0-x230.google.com [IPv6:2a00:1450:400c:c09::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A305282242 for ; Wed, 22 Feb 2017 01:38:31 -0800 (PST) Received: by mail-wm0-x230.google.com with SMTP id r141so6491370wmg.1 for ; Wed, 22 Feb 2017 01:38:31 -0800 (PST) Received: from localhost.localdomain ([160.163.32.105]) by smtp.gmail.com with ESMTPSA id c36sm976544wrc.49.2017.02.22.01.38.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 22 Feb 2017 01:38:29 -0800 (PST) X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZUw2/P7GBxsGNHcylEHCoxJ0hXc3n8xyehM+TZlTXCM=; b=WGalF2qu4mWagZSXt84lGwk6wKv6mYotUo+ViKm1DOXdXP2CcSaykog+C6sX7Ww8i/ O6PSwZUXbdbyBWLFrlfOcCRBMP2BRNFttJVBWQqobdyj1Ratv+MuYZxPkC53nX21+FJE KGgXuVnQpKIHAtaf1/sMCEMlVqDQu41AGfuD4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZUw2/P7GBxsGNHcylEHCoxJ0hXc3n8xyehM+TZlTXCM=; b=SR1TwgLkT+F4SERWU3J1IujJAlQ38tTEpTUaBw2lzpXWVcdUeK0OSYNGVe5OZyzeP5 raFiGu8T2gRYfgSHddpCWOAWcYPok93IRi3j4PILweWECJxntDJkVmCS+TRmekEJFVy7 bAkOKFRh2s2DjUJbSOh7bDuFIcfCuubrskSfbpE3+5mbE0oMvYCK+29Rh99K+IbtGymS qTB4Ky5egn7EQZe31XAt+bp59I7rUEeoEOJH/IrgNQSWVE3cESvK63y0HQx8M50FK2Sj xNT91V+nm787AasjWl2hdt9QSMgj6CepdD/DUj12VCTFtEyyAuUdIn/Fp/M40KedYZfO vYfA== X-Gm-Message-State: AMke39konextWjDuWSQxMO4QD3TSdJ8NeLUcmCGuuDgvCuwbUhoYvI+nD41AQ8R7s5OHIwi0 X-Received: by 10.28.61.136 with SMTP id k130mr1481020wma.128.1487756310057; Wed, 22 Feb 2017 01:38:30 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Wed, 22 Feb 2017 09:38:18 +0000 Message-Id: <1487756301-15646-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 1/4] ArmPlatformPkg/ArmPlatformStackLib: use callee preserved registers X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: heyi.guo@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The entry code in ArmPlatformStackSet () is a 1:1 transliteration of the ARM version, which uses the callee preserved registers r3 - r7 (*) to preserve the function arguments and the link register across a call to ArmPlatformIsPrimaryCore (). However, x4 - x7 are not callee preserved on AARCH64, and so we should use registers >=3D x18 instead. While we're at it, drop an unnecessary preserve of the link register, and simplify/deobfuscate the calculation of the secondary stack position. (*) On ARM, r3 is not callee preserved either, but this should be addressed in a separate patch. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S |= 43 +++++++++----------- 1 file changed, 19 insertions(+), 24 deletions(-) diff --git a/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatform= StackLib.S b/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatform= StackLib.S index 65d7d6c6d686..e219d53cb71d 100644 --- a/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLi= b.S +++ b/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLi= b.S @@ -22,13 +22,13 @@ // ); ASM_FUNC(ArmPlatformStackSet) // Save parameters - mov x6, x3 - mov x5, x2 - mov x4, x1 - mov x3, x0 + mov x26, x3 + mov x25, x2 + mov x24, x1 + mov x23, x0 =20 // Save the Link register - mov x7, x30 + mov x27, x30 =20 // Identify Stack mov x0, x1 @@ -36,13 +36,13 @@ ASM_FUNC(ArmPlatformStackSet) cmp x0, #1 =20 // Restore parameters - mov x0, x3 - mov x1, x4 - mov x2, x5 - mov x3, x6 + mov x0, x23 + mov x1, x24 + mov x2, x25 + mov x3, x26 =20 // Restore the Link register - mov x30, x7 + mov x30, x27 =20 b.ne 0f =20 @@ -57,10 +57,7 @@ ASM_FUNC(ArmPlatformStackSet) // IN UINTN SecondaryStackSize // ); ASM_FUNC(ArmPlatformStackSetPrimary) - // Save the Link register - mov x4, x30 - - // Add stack of primary stack to StackBase + // Add size of primary stack to StackBase add x0, x0, x2 =20 // Compute SecondaryCoresCount * SecondaryCoreStackSize @@ -70,7 +67,7 @@ ASM_FUNC(ArmPlatformStackSetPrimary) // Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCo= unt * SecondaryCoreStackSize)) add sp, x0, x3 =20 - br x4 + ret =20 //VOID //ArmPlatformStackSetSecondary ( @@ -81,30 +78,28 @@ ASM_FUNC(ArmPlatformStackSetPrimary) // ); ASM_FUNC(ArmPlatformStackSetSecondary) // Save the Link register - mov x4, x30 + mov x24, x30 mov sp, x0 =20 // Get Core Position mov x0, x1 bl ASM_PFX(ArmPlatformGetCorePosition) - mov x5, x0 + mov x25, x0 =20 // Get Primary Core Position bl ASM_PFX(ArmPlatformGetPrimaryCoreMpId) bl ASM_PFX(ArmPlatformGetCorePosition) =20 // Get Secondary Core Position. We should get consecutive secondary stac= k number from 1...(CoreCount-1) - cmp x5, x0 - b.ls 1f + cmp x25, x0 + // Decrement the position if after the primary core - sub x5, x5, #1 -1: - add x5, x5, #1 + cinc x25, x25, ls =20 // Compute top of the secondary stack - mul x3, x3, x5 + mul x3, x3, x25 =20 // Set stack add sp, sp, x3 =20 - br x4 + ret x24 --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Apr 23 18:23:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487756316149383.2541118722612; Wed, 22 Feb 2017 01:38:36 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8944E82248; Wed, 22 Feb 2017 01:38:34 -0800 (PST) Received: from mail-wr0-x230.google.com (mail-wr0-x230.google.com [IPv6:2a00:1450:400c:c0c::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 900CF82247 for ; Wed, 22 Feb 2017 01:38:33 -0800 (PST) Received: by mail-wr0-x230.google.com with SMTP id 89so4119529wrr.3 for ; Wed, 22 Feb 2017 01:38:33 -0800 (PST) Received: from localhost.localdomain ([160.163.32.105]) by smtp.gmail.com with ESMTPSA id c36sm976544wrc.49.2017.02.22.01.38.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 22 Feb 2017 01:38:31 -0800 (PST) X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=j6Bqr71ACfrh7Gt9Os6p9ytfAaqp+QXZOZ2fBsBezgU=; b=VO8u5KZSggDbQ0+CSxtirdaD7uyjAFY7EC6+n8JVwzi6ykL+Nr414Y7XaBTnt4hh7A bcFbrsGdAHKSnomMATEJ7FJj8963cg1uF0knezXukfGlwTJ4Kvw6JENfTFtW6nhC+P/f Su9dZ0cGe0tdLaimgIr4uYobweIAen43bmAz0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=j6Bqr71ACfrh7Gt9Os6p9ytfAaqp+QXZOZ2fBsBezgU=; b=B9t+NHXS8g8JL5WfWzSXR/bG9ck9A3hA/Pfzeg9V7iaR6J8IJ+RskWz3nLxJvyqQ70 8QJzFW4dzIywpY6av26T3XzqJgB9bq9x+CtoQohmuJU43n0XYzov6R7tFQBI57MYZLa/ FLUay1pefsFWeqgQDpkUwukNy7945JpD95Qsm+ouDoCTrb8K0klQ3ojFxawDiPn+ITZj 007+kEvSzuEEYEVZW/FbtYl2pVI8zlUujlDO9+2QFsNrUii1+iZxeZZ4p+Qt+c7pYKHG KWpq84K4Skh40Bn8WOdQrksku1E1/sHDI9Klti6EOAYIpxu+UJbIvtKQcScRAMF4wCjX V9xg== X-Gm-Message-State: AMke39kmOIat61e5Eu5K0xJni+93asPRQtsoChB6KpYU7rMmwK4w1cNck16PRm2kaZ0rXsla X-Received: by 10.223.139.213 with SMTP id w21mr24108939wra.108.1487756312170; Wed, 22 Feb 2017 01:38:32 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Wed, 22 Feb 2017 09:38:19 +0000 Message-Id: <1487756301-15646-3-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 2/4] ArmPkg/ArmLib: AARCH64: set frame pointer in cache maintenance routine X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: heyi.guo@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Stack and unstack the frame pointer according to the AAPCS in AArch64AllDataCachesOperation (). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Librar= y/ArmLib/AArch64/AArch64Support.S index 5cee7c1519c3..c35c05fdf681 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -273,7 +273,7 @@ ASM_FUNC(ArmDisableBranchPrediction) ASM_FUNC(AArch64AllDataCachesOperation) // We can use regs 0-7 and 9-15 without having to save/restore. // Save our link register on the stack. - The stack must always be quad-wo= rd aligned - str x30, [sp, #-16]! + stp x29, x30, [sp, #-16]! mov x1, x0 // Save Function call in x1 mrs x6, clidr_el1 // Read EL1 CLIDR and x3, x6, #0x7000000 // Mask out all but Level of Coherency (Lo= C) @@ -324,7 +324,7 @@ L_Skip: L_Finished: dsb sy isb - ldr x30, [sp], #0x10 + ldp x29, x30, [sp], #0x10 ret =20 =20 --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Apr 23 18:23:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487756318970648.9566595057; Wed, 22 Feb 2017 01:38:38 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id CA33C82247; Wed, 22 Feb 2017 01:38:37 -0800 (PST) Received: from mail-wr0-x22f.google.com (mail-wr0-x22f.google.com [IPv6:2a00:1450:400c:c0c::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E61D98221B for ; Wed, 22 Feb 2017 01:38:35 -0800 (PST) Received: by mail-wr0-x22f.google.com with SMTP id z61so4141648wrc.1 for ; Wed, 22 Feb 2017 01:38:35 -0800 (PST) Received: from localhost.localdomain ([160.163.32.105]) by smtp.gmail.com with ESMTPSA id c36sm976544wrc.49.2017.02.22.01.38.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 22 Feb 2017 01:38:33 -0800 (PST) X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VovwjWH0Hl3ZnSMI3jQVFpr5wy9FuPNZiVU283Mc/7I=; b=aBQeYolgRhV13mMjOYXYCMbUmEx+UBOaQiNS3bgRl2KLbLVEVLppRQYeoaX9MMIdVE LwjuU9A1qLYNtHMJnkJVBlm9og6OpbsXT9h86n97XCC+CvIB1w2MoQcIUGEXsd+nkG/P kYGEzvG1nUkUtb2kolX6owroJg8ABiMINbnjg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VovwjWH0Hl3ZnSMI3jQVFpr5wy9FuPNZiVU283Mc/7I=; b=MQffrYC25O7ysbUqcgHRbLZO4CWlbIEQvkTwljeMJ+yUT6xDSnbmdiHpQtZqf7xUzn c7/fX6FRuY/ErVMEAOdz43VOYxKbVYUuC6C1Sfzuel7TLlzNDozmy0tkvcZyOnFyQkTJ mdVbukDpypZZ1dmCziwACgnDpf3CRicWS/I35mwVy7hY34wMnCS5TQoZdYAt/QawFMvc cdfIYdeJXZrO3OuaMSBWOZSvtJRUsSp5imsSJswNysUDQu6fN9DtZwCez6ianMnXHWvM PoedM1Os7VPqSZJCnxXmZtJLeZp/RFHgqrkM+fXbsavnpABQIcabVxvYHhePot0+u/ev 6M7g== X-Gm-Message-State: AMke39nf7zCEBZk1jUHPZoJvXIdoF8mCm3JcR0lMaH+3SDw0+XMGSEozKrmJeG48X5fqjmih X-Received: by 10.223.131.193 with SMTP id 59mr22373863wre.186.1487756314465; Wed, 22 Feb 2017 01:38:34 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Wed, 22 Feb 2017 09:38:20 +0000 Message-Id: <1487756301-15646-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 3/4] ArmPkg/ArmLib: AARCH64: allow the stack aligment (SA) bit to be managed X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: heyi.guo@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" In preparation of enabling stack alignment checking, which is mandated by the UEFI spec for AARCH64, add the code to manage this bit to ArmLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- ArmPkg/Include/Chipset/AArch64.h | 12 +++++++ ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 34 ++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArc= h64.h index 9aecb1df81e0..cebfc5da426a 100644 --- a/ArmPkg/Include/Chipset/AArch64.h +++ b/ArmPkg/Include/Chipset/AArch64.h @@ -194,6 +194,18 @@ ArmEnableAlignmentCheck ( =20 VOID EFIAPI +ArmDisableStackAlignmentCheck ( + VOID + ); + +VOID +EFIAPI +ArmEnableStackAlignmentCheck ( + VOID + ); + +VOID +EFIAPI ArmDisableAllExceptions ( VOID ); diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Librar= y/ArmLib/AArch64/AArch64Support.S index c35c05fdf681..e53b5fdc5986 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -20,6 +20,7 @@ .set CTRL_M_BIT, (1 << 0) .set CTRL_A_BIT, (1 << 1) .set CTRL_C_BIT, (1 << 2) +.set CTRL_SA_BIT, (1 << 3) .set CTRL_I_BIT, (1 << 12) .set CTRL_V_BIT, (1 << 12) .set CPACR_VFP_BITS, (3 << 20) @@ -259,6 +260,39 @@ ASM_FUNC(ArmDisableAlignmentCheck) isb ret =20 +ASM_FUNC(ArmEnableStackAlignmentCheck) + EL1_OR_EL2(x1) +1: mrs x0, sctlr_el1 // Get control register EL1 + b 3f +2: mrs x0, sctlr_el2 // Get control register EL2 +3: orr x0, x0, #CTRL_SA_BIT // Set SA (stack alignment check) bit + EL1_OR_EL2(x1) +1: msr sctlr_el1, x0 // Write back control register + b 3f +2: msr sctlr_el2, x0 // Write back control register +3: dsb sy + isb + ret + + +ASM_FUNC(ArmDisableStackAlignmentCheck) + EL1_OR_EL2_OR_EL3(x1) +1: mrs x0, sctlr_el1 // Get control register EL1 + b 4f +2: mrs x0, sctlr_el2 // Get control register EL2 + b 4f +3: mrs x0, sctlr_el3 // Get control register EL3 +4: bic x0, x0, #CTRL_SA_BIT // Clear SA (stack alignment check) bit + EL1_OR_EL2_OR_EL3(x1) +1: msr sctlr_el1, x0 // Write back control register + b 4f +2: msr sctlr_el2, x0 // Write back control register + b 4f +3: msr sctlr_el3, x0 // Write back control register +4: dsb sy + isb + ret + =20 // Always turned on in AArch64. Else implementation specific. Leave in for= C compatibility for now ASM_FUNC(ArmEnableBranchPrediction) --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Apr 23 18:23:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487756321182667.4802147252032; Wed, 22 Feb 2017 01:38:41 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 167768224C; Wed, 22 Feb 2017 01:38:40 -0800 (PST) Received: from mail-wm0-x232.google.com (mail-wm0-x232.google.com [IPv6:2a00:1450:400c:c09::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 059B08224C for ; Wed, 22 Feb 2017 01:38:38 -0800 (PST) Received: by mail-wm0-x232.google.com with SMTP id r141so6493762wmg.1 for ; Wed, 22 Feb 2017 01:38:37 -0800 (PST) Received: from localhost.localdomain ([160.163.32.105]) by smtp.gmail.com with ESMTPSA id c36sm976544wrc.49.2017.02.22.01.38.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 22 Feb 2017 01:38:35 -0800 (PST) X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dB2/gmjxDiXfuhv7aqOGbB2K+a1YBbFPm48PkW26zaY=; b=eJGK0XX+fjfVFoxNtbSLNvD19yAr+aR8OFmj69GIOzn23h2xPKnzzyNEwvZkuW8s4T sNl9gCreZjbGs/9viFhC02IwhC93tN6iOmZ4myBRZG9dWEw3hr6500IkzXftw/BacFrO IFGZyqzpb9WYDl5W07wj6iouGOwTtc+nP9XAc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dB2/gmjxDiXfuhv7aqOGbB2K+a1YBbFPm48PkW26zaY=; b=Alq2pCjCpHJfDq2JKnuKFyEHWAPknooqjkKbgqk57flc6rHm2pEiQaf+npRVgiwqGk krrcdRsXNXoVL7MjzUtCaNWZXBNfJZNBukKxsU2bF1VuPKFerB4LQNEEPVbErzsBfUEq 4Fdp0nc6f3S6kqjDwp3MmyepKy19Xjnl68RBf1Rl6P8WM8I4/e7ZmerNYSIh+MVR1NpJ 9yjzSnRI+kCgQlITV/QgXVcLPcrIsdLkbiwPlEFhuhMmhAzdQAw+/Fu9GiL5ns6B0HNG lu/M263NgTSQyZCZc1uWTyKXD95WF5C4HCiMa4cFZZbZDpQbPieUNsB3YK2fA5ojDeiL ShOQ== X-Gm-Message-State: AMke39ndTiuyf8UX168i8c69qA02bR9iPYI7N1qLvm9zlSUiqydn96rIJmo+FqwFUVnJ89LN X-Received: by 10.28.35.142 with SMTP id j136mr1448401wmj.11.1487756316618; Wed, 22 Feb 2017 01:38:36 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Wed, 22 Feb 2017 09:38:21 +0000 Message-Id: <1487756301-15646-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> References: <1487756301-15646-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 4/4] ArmPkg/ArmMmuLib: AARCH64: enable stack alignment checking X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: heyi.guo@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Enable the hardware stack alignment check, as mandated by the UEFI spec. This ensures that the stack pointer is 16 byte aligned at each instance where it is used as the base address in a load/store operation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 1 + 1 file changed, 1 insertion(+) diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Libr= ary/ArmMmuLib/AArch64/ArmMmuLibCore.c index 9e0593ce598b..2f8f99d44a31 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -734,6 +734,7 @@ ArmConfigureMmu ( MAIR_ATTR(TT_ATTR_INDX_MEMORY_WRITE_BACK, MAIR_ATTR_NORMAL_M= EMORY_WRITE_BACK)); // mapped to EFI_MEMORY_WB =20 ArmDisableAlignmentCheck (); + ArmEnableStackAlignmentCheck (); ArmEnableInstructionCache (); ArmEnableDataCache (); =20 --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel