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20:yvgFNlpls9b1tSvsF7Msb1UzJJ+kCQAkUjXpQTfER/UZstntStVQ3AUqHvIGlDgsdx4SCQ3DTz+9JfHdFJ2rsD9MXL4fkACHtXCEFaipnu1ecwLDTvY+lPproRKhwsttxuPs4kkUzErlSPKrZrIhWpTK0RMT/CClL+rxAOtNEV+YjCYw9LC7XYR/p3n/kasKMc63qnFu/FIovSHOHKTjTCoV73Ou4xuZFUfvqPrYDqR5P+B+Ghmg0HmsEG6aX/2j X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2017 21:13:26.0760 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1247 Subject: [edk2] [PATCH 2/3] MdeModulePkg/Universal/CapsulePei: Add support for PCD PcdPteMemoryEncryptionAddressOrMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laszlo Ersek , Feng Tian , Leo Duran , Brijesh Singh , Star Zeng Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This PCD holds the address mask for page table entries when memory encryption is enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. The mask is applied when 4GB tables are created (UefiCapsule.c), and when the tables are expanded on-demand by page-faults above 4GB's (X64Entry.c). Cc: Feng Tian Cc: Star Zeng Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh Signed-off-by: Leo Duran --- MdeModulePkg/Universal/CapsulePei/CapsulePei.inf | 2 ++ MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf | 4 ++++ MdeModulePkg/Universal/CapsulePei/UefiCapsule.c | 9 +++++---- MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c | 10 ++++++---- 4 files changed, 17 insertions(+), 8 deletions(-) diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf b/MdeModulePk= g/Universal/CapsulePei/CapsulePei.inf index d2ca0d0..c54bc21 100644 --- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf +++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf @@ -7,6 +7,7 @@ # buffer overflow, integer overflow. # # Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions @@ -76,6 +77,7 @@ [Ppis.IA32] [Pcd.IA32] gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleCoalesceFile ## SOMETIMES_C= ONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIMES_C= ONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ##= CONSUMES =20 [FeaturePcd.IA32] gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## CONSUMES diff --git a/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf b/MdeModulePk= g/Universal/CapsulePei/CapsuleX64.inf index 8318eaa..cf8543b 100644 --- a/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf +++ b/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf @@ -10,6 +10,7 @@ # buffer overflow, integer overflow. # # Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions @@ -53,6 +54,9 @@ [LibraryClasses] CpuExceptionHandlerLib DebugAgentLib =20 +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ##= CONSUMES + [Depex] FALSE =20 diff --git a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c b/MdeModulePkg= /Universal/CapsulePei/UefiCapsule.c index 9ac9d22..77bc68c 100644 --- a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c +++ b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c @@ -2,6 +2,7 @@ Capsule update PEIM for UEFI2.0 =20 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions @@ -187,7 +188,7 @@ Create4GPageTables ( // // Make a PML4 Entry // - PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEntr= y; + PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEntr= y | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); PageMapLevel4Entry->Bits.ReadWrite =3D 1; PageMapLevel4Entry->Bits.Present =3D 1; =20 @@ -198,7 +199,7 @@ Create4GPageTables ( // // Fill in the Page Directory entries // - PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64 (P= cdPteMemoryEncryptionAddressOrMask); PageDirectory1GEntry->Bits.ReadWrite =3D 1; PageDirectory1GEntry->Bits.Present =3D 1; PageDirectory1GEntry->Bits.MustBe1 =3D 1; @@ -215,7 +216,7 @@ Create4GPageTables ( // // Fill in a Page Directory Pointer Entries // - PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirectory= Entry; + PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirectory= Entry | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryPointerEntry->Bits.ReadWrite =3D 1; PageDirectoryPointerEntry->Bits.Present =3D 1; =20 @@ -223,7 +224,7 @@ Create4GPageTables ( // // Fill in the Page Directory entries // - PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64 (P= cdPteMemoryEncryptionAddressOrMask); PageDirectoryEntry->Bits.ReadWrite =3D 1; PageDirectoryEntry->Bits.Present =3D 1; PageDirectoryEntry->Bits.MustBe1 =3D 1; diff --git a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c b/MdeModulePk= g/Universal/CapsulePei/X64/X64Entry.c index 5ad95d2..f3f68ee 100644 --- a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c +++ b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c @@ -2,6 +2,8 @@ The X64 entrypoint is used to process capsule in long mode. =20 Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -128,7 +130,7 @@ AcquirePage ( // // Link & Record the current uplink. // - *Uplink =3D Address | IA32_PG_P | IA32_PG_RW; + *Uplink =3D Address | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) | I= A32_PG_P | IA32_PG_RW; PageFaultContext->PageFaultUplink[PageFaultContext->PageFaultIndex] =3D = Uplink; =20 PageFaultContext->PageFaultIndex =3D (PageFaultContext->PageFaultIndex += 1) % EXTRA_PAGE_TABLE_PAGES; @@ -183,7 +185,7 @@ PageFaultHandler ( PTIndex =3D BitFieldRead64 (PFAddress, 30, 38); // PDPTE if (PageFaultContext->Page1GSupport) { - PageTable[PTIndex] =3D (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P |= IA32_PG_RW | IA32_PG_PS; + PageTable[PTIndex] =3D (PFAddress & ~((1ull << 30) - 1)) | PcdGet64 (P= cdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; } else { if ((PageTable[PTIndex] & IA32_PG_P) =3D=3D 0) { AcquirePage (PageFaultContext, &PageTable[PTIndex]); @@ -191,7 +193,7 @@ PageFaultHandler ( PageTable =3D (UINT64*)(UINTN)(PageTable[PTIndex] & PhyMask); PTIndex =3D BitFieldRead64 (PFAddress, 21, 29); // PD - PageTable[PTIndex] =3D (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P |= IA32_PG_RW | IA32_PG_PS; + PageTable[PTIndex] =3D (PFAddress & ~((1ull << 21) - 1)) | PcdGet64 (P= cdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; } =20 return NULL; @@ -298,4 +300,4 @@ _ModuleEntryPoint ( // ASSERT (FALSE); return EFI_SUCCESS; -} \ No newline at end of file +} --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel