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20:jUTDSDBnEnUFzh7KR79h/3Ja0x4HK4PJtc7k3s6PY3Nkj9tlKvvEUedU+yC3Mjij0HkDA9/U5L8cgNQnPYLzKvETWNXOMjmXcybXjDelc07E/Hsv7b49TA1ndvcs0lN36L5H9qy8fZ9D9a2ooik3/0J6lQ1Z2xThSK6umGpNHmTu73uLE7r2HYTY6l3P1VJvuyMmzsGFkMQveL9xAROmwGAPNolkxzRc97cRD4YLv7LnHmciamOJyf8WsgkkEtZ4 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2017 21:13:24.1334 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1247 Subject: [edk2] [PATCH 1/3] MdeModulePkg: Add PCD PcdPteMemoryEncryptionAddressOrMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laszlo Ersek , Feng Tian , Brijesh Singh , Star Zeng , Leo Duran Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Brijesh Singh This PCD holds the address mask for page table entries when memory encryption is enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. Cc: Feng Tian Cc: Star Zeng Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran Reviewed-by: Star Zeng --- MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 5 ++++- MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 18 ++++++++++-------- MdeModulePkg/MdeModulePkg.dec | 8 ++++++++ 3 files changed, 22 insertions(+), 9 deletions(-) diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/Dx= eIplPeim/DxeIpl.inf index 2bc41be..d62bd9b 100644 --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf @@ -6,6 +6,8 @@ # needed to run the DXE Foundation. # # Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
+# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License # which accompanies this distribution. The full text of the license may = be found at @@ -111,7 +113,8 @@ [FeaturePcd] gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress ## CONSUMES =20 [Pcd.IA32,Pcd.X64] - gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIM= ES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ##= SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ##= CONSUMES =20 [Pcd.IA32,Pcd.X64,Pcd.ARM,Pcd.AARCH64] gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## SOMETIM= ES_CONSUMES diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePk= g/Core/DxeIplPeim/X64/VirtualMemory.c index 790f6ab..2c52389 100644 --- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c +++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c @@ -16,6 +16,8 @@ 3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:Sy= stem Programmer's Guide, Intel =20 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -71,14 +73,14 @@ Split2MPageTo4K ( // // Fill in 2M page entry. // - *PageEntry2M =3D (UINT64) (UINTN) PageTableEntry | IA32_PG_P | IA32_PG_R= W; + *PageEntry2M =3D (UINT64) (UINTN) PageTableEntry | PcdGet64 (PcdPteMemor= yEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW; =20 PhysicalAddress4K =3D PhysicalAddress; for (IndexOfPageTableEntries =3D 0; IndexOfPageTableEntries < 512; Index= OfPageTableEntries++, PageTableEntry++, PhysicalAddress4K +=3D SIZE_4KB) { // // Fill in the Page Table entries // - PageTableEntry->Uint64 =3D (UINT64) PhysicalAddress4K; + PageTableEntry->Uint64 =3D (UINT64) PhysicalAddress4K | PcdGet64 (PcdP= teMemoryEncryptionAddressOrMask); PageTableEntry->Bits.ReadWrite =3D 1; PageTableEntry->Bits.Present =3D 1; if ((PhysicalAddress4K >=3D StackBase) && (PhysicalAddress4K < StackBa= se + StackSize)) { @@ -116,7 +118,7 @@ Split1GPageTo2M ( // // Fill in 1G page entry. // - *PageEntry1G =3D (UINT64) (UINTN) PageDirectoryEntry | IA32_PG_P | IA32_= PG_RW; + *PageEntry1G =3D (UINT64) (UINTN) PageDirectoryEntry | PcdGet64 (PcdPteM= emoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW; =20 PhysicalAddress2M =3D PhysicalAddress; for (IndexOfPageDirectoryEntries =3D 0; IndexOfPageDirectoryEntries < 51= 2; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += =3D SIZE_2MB) { @@ -129,7 +131,7 @@ Split1GPageTo2M ( // // Fill in the Page Directory entries // - PageDirectoryEntry->Uint64 =3D (UINT64) PhysicalAddress2M; + PageDirectoryEntry->Uint64 =3D (UINT64) PhysicalAddress2M | PcdGet64= (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryEntry->Bits.ReadWrite =3D 1; PageDirectoryEntry->Bits.Present =3D 1; PageDirectoryEntry->Bits.MustBe1 =3D 1; @@ -248,7 +250,7 @@ CreateIdentityMappingPageTables ( // // Make a PML4 Entry // - PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEntr= y; + PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEntr= y | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); PageMapLevel4Entry->Bits.ReadWrite =3D 1; PageMapLevel4Entry->Bits.Present =3D 1; =20 @@ -262,7 +264,7 @@ CreateIdentityMappingPageTables ( // // Fill in the Page Directory entries // - PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64 = (PcdPteMemoryEncryptionAddressOrMask); PageDirectory1GEntry->Bits.ReadWrite =3D 1; PageDirectory1GEntry->Bits.Present =3D 1; PageDirectory1GEntry->Bits.MustBe1 =3D 1; @@ -280,7 +282,7 @@ CreateIdentityMappingPageTables ( // // Fill in a Page Directory Pointer Entries // - PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirectory= Entry; + PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirectory= Entry | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryPointerEntry->Bits.ReadWrite =3D 1; PageDirectoryPointerEntry->Bits.Present =3D 1; =20 @@ -294,7 +296,7 @@ CreateIdentityMappingPageTables ( // // Fill in the Page Directory entries // - PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64 = (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryEntry->Bits.ReadWrite =3D 1; PageDirectoryEntry->Bits.Present =3D 1; PageDirectoryEntry->Bits.MustBe1 =3D 1; diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 273cd7e..15119d0 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -6,6 +6,8 @@ # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
# Copyright (c) 2016, Linaro Ltd. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
+# # This program and the accompanying materials are licensed and made availa= ble under # the terms and conditions of the BSD License that accompanies this distri= bution. # The full text of the license may be found at @@ -1682,6 +1684,12 @@ [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynami= c, PcdsDynamicEx] # @Prompt A list of system FMP ImageTypeId GUIDs gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x0}|= VOID*|0x30001046 =20 + ## This PCD holds the address mask for page table entries when memory en= cryption is + # enabled on AMD processors supporting the Secure Encrypted Virtualizat= ion (SEV) feature. + # This mask should be applied when creating 1:1 virtual to physical map= ping tables. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0|U= INT64|0x30001047 + [PcdsPatchableInModule] ## Specify memory size with page number for PEI code when # Loading Module at Fixed Address feature is enabled. --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Nov 2 14:32:56 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zoho.com; 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20:yvgFNlpls9b1tSvsF7Msb1UzJJ+kCQAkUjXpQTfER/UZstntStVQ3AUqHvIGlDgsdx4SCQ3DTz+9JfHdFJ2rsD9MXL4fkACHtXCEFaipnu1ecwLDTvY+lPproRKhwsttxuPs4kkUzErlSPKrZrIhWpTK0RMT/CClL+rxAOtNEV+YjCYw9LC7XYR/p3n/kasKMc63qnFu/FIovSHOHKTjTCoV73Ou4xuZFUfvqPrYDqR5P+B+Ghmg0HmsEG6aX/2j X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2017 21:13:26.0760 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1247 Subject: [edk2] [PATCH 2/3] MdeModulePkg/Universal/CapsulePei: Add support for PCD PcdPteMemoryEncryptionAddressOrMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laszlo Ersek , Feng Tian , Leo Duran , Brijesh Singh , Star Zeng Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This PCD holds the address mask for page table entries when memory encryption is enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. The mask is applied when 4GB tables are created (UefiCapsule.c), and when the tables are expanded on-demand by page-faults above 4GB's (X64Entry.c). Cc: Feng Tian Cc: Star Zeng Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh Signed-off-by: Leo Duran --- MdeModulePkg/Universal/CapsulePei/CapsulePei.inf | 2 ++ MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf | 4 ++++ MdeModulePkg/Universal/CapsulePei/UefiCapsule.c | 9 +++++---- MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c | 10 ++++++---- 4 files changed, 17 insertions(+), 8 deletions(-) diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf b/MdeModulePk= g/Universal/CapsulePei/CapsulePei.inf index d2ca0d0..c54bc21 100644 --- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf +++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf @@ -7,6 +7,7 @@ # buffer overflow, integer overflow. # # Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions @@ -76,6 +77,7 @@ [Ppis.IA32] [Pcd.IA32] gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleCoalesceFile ## SOMETIMES_C= ONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIMES_C= ONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ##= CONSUMES =20 [FeaturePcd.IA32] gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## CONSUMES diff --git a/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf b/MdeModulePk= g/Universal/CapsulePei/CapsuleX64.inf index 8318eaa..cf8543b 100644 --- a/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf +++ b/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf @@ -10,6 +10,7 @@ # buffer overflow, integer overflow. # # Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions @@ -53,6 +54,9 @@ [LibraryClasses] CpuExceptionHandlerLib DebugAgentLib =20 +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ##= CONSUMES + [Depex] FALSE =20 diff --git a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c b/MdeModulePkg= /Universal/CapsulePei/UefiCapsule.c index 9ac9d22..77bc68c 100644 --- a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c +++ b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c @@ -2,6 +2,7 @@ Capsule update PEIM for UEFI2.0 =20 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions @@ -187,7 +188,7 @@ Create4GPageTables ( // // Make a PML4 Entry // - PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEntr= y; + PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEntr= y | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); PageMapLevel4Entry->Bits.ReadWrite =3D 1; PageMapLevel4Entry->Bits.Present =3D 1; =20 @@ -198,7 +199,7 @@ Create4GPageTables ( // // Fill in the Page Directory entries // - PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64 (P= cdPteMemoryEncryptionAddressOrMask); PageDirectory1GEntry->Bits.ReadWrite =3D 1; PageDirectory1GEntry->Bits.Present =3D 1; PageDirectory1GEntry->Bits.MustBe1 =3D 1; @@ -215,7 +216,7 @@ Create4GPageTables ( // // Fill in a Page Directory Pointer Entries // - PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirectory= Entry; + PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirectory= Entry | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryPointerEntry->Bits.ReadWrite =3D 1; PageDirectoryPointerEntry->Bits.Present =3D 1; =20 @@ -223,7 +224,7 @@ Create4GPageTables ( // // Fill in the Page Directory entries // - PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64 (P= cdPteMemoryEncryptionAddressOrMask); PageDirectoryEntry->Bits.ReadWrite =3D 1; PageDirectoryEntry->Bits.Present =3D 1; PageDirectoryEntry->Bits.MustBe1 =3D 1; diff --git a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c b/MdeModulePk= g/Universal/CapsulePei/X64/X64Entry.c index 5ad95d2..f3f68ee 100644 --- a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c +++ b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c @@ -2,6 +2,8 @@ The X64 entrypoint is used to process capsule in long mode. =20 Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -128,7 +130,7 @@ AcquirePage ( // // Link & Record the current uplink. // - *Uplink =3D Address | IA32_PG_P | IA32_PG_RW; + *Uplink =3D Address | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) | I= A32_PG_P | IA32_PG_RW; PageFaultContext->PageFaultUplink[PageFaultContext->PageFaultIndex] =3D = Uplink; =20 PageFaultContext->PageFaultIndex =3D (PageFaultContext->PageFaultIndex += 1) % EXTRA_PAGE_TABLE_PAGES; @@ -183,7 +185,7 @@ PageFaultHandler ( PTIndex =3D BitFieldRead64 (PFAddress, 30, 38); // PDPTE if (PageFaultContext->Page1GSupport) { - PageTable[PTIndex] =3D (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P |= IA32_PG_RW | IA32_PG_PS; + PageTable[PTIndex] =3D (PFAddress & ~((1ull << 30) - 1)) | PcdGet64 (P= cdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; } else { if ((PageTable[PTIndex] & IA32_PG_P) =3D=3D 0) { AcquirePage (PageFaultContext, &PageTable[PTIndex]); @@ -191,7 +193,7 @@ PageFaultHandler ( PageTable =3D (UINT64*)(UINTN)(PageTable[PTIndex] & PhyMask); PTIndex =3D BitFieldRead64 (PFAddress, 21, 29); // PD - PageTable[PTIndex] =3D (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P |= IA32_PG_RW | IA32_PG_PS; + PageTable[PTIndex] =3D (PFAddress & ~((1ull << 21) - 1)) | PcdGet64 (P= cdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS; } =20 return NULL; @@ -298,4 +300,4 @@ _ModuleEntryPoint ( // ASSERT (FALSE); return EFI_SUCCESS; -} \ No newline at end of file +} --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Nov 2 14:32:56 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1486588413812238.8855350876114; Wed, 8 Feb 2017 13:13:33 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 81C74820B9; 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20:mfQ8gw9Ayl2uKWABU02RIMaEFccK4BwEERgz+lfEgF/gHujLYLnuc++qmnCq7zelnvoqy+rYLTRu602vQ77kvg+6t+mz4MfuLq58UpvYhJp6x4wFHXZzdEBT3gBfm+sygVwcdTGGmaugusW3lENMxNmpCqnp6SWAeemFoCQKsuofI3qRuW0cyePGv+vHHGJ06dnUbmVPnyaJo9wGT+21LokF8pLL8PCEFpYC8aiPXh+hTczuvHuxe/y2FeoAiznE X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2017 21:13:27.8485 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1247 Subject: [edk2] [PATCH 3/3] UefiCpuPkg/Universal/Acpi/S3Resume2Pei: Add support for PCD PcdPteMemoryEncryptionAddressOrMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Feng Tian , Brijesh Singh , Leo Duran , Laszlo Ersek , Jeff Fan , Star Zeng Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This PCD holds the address mask for page table entries when memory encryption is enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. The mask is applied when page tables are created (S3Resume.c). CC: Jeff Fan Cc: Feng Tian Cc: Star Zeng Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh Signed-off-by: Leo Duran --- UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c | 9 +++++---- UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf | 2 ++ 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg= /Universal/Acpi/S3Resume2Pei/S3Resume.c index d306fba..ee1e2cd 100644 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c @@ -5,6 +5,7 @@ control is passed to OS waking up handler. =20 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions @@ -696,7 +697,7 @@ RestoreS3PageTables ( // // Make a PML4 Entry // - PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEn= try; + PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEn= try | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); PageMapLevel4Entry->Bits.ReadWrite =3D 1; PageMapLevel4Entry->Bits.Present =3D 1; =20 @@ -707,7 +708,7 @@ RestoreS3PageTables ( // // Fill in the Page Directory entries // - PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64 = (PcdPteMemoryEncryptionAddressOrMask); PageDirectory1GEntry->Bits.ReadWrite =3D 1; PageDirectory1GEntry->Bits.Present =3D 1; PageDirectory1GEntry->Bits.MustBe1 =3D 1; @@ -724,7 +725,7 @@ RestoreS3PageTables ( // // Fill in a Page Directory Pointer Entries // - PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirecto= ryEntry; + PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirecto= ryEntry | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryPointerEntry->Bits.ReadWrite =3D 1; PageDirectoryPointerEntry->Bits.Present =3D 1; =20 @@ -732,7 +733,7 @@ RestoreS3PageTables ( // // Fill in the Page Directory entries // - PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64 = (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryEntry->Bits.ReadWrite =3D 1; PageDirectoryEntry->Bits.Present =3D 1; PageDirectoryEntry->Bits.MustBe1 =3D 1; diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf b/Uefi= CpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf index 73aeca3..d514523 100644 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf @@ -6,6 +6,7 @@ # control is passed to OS waking up handler. # # Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials are # licensed and made available under the terms and conditions of the BSD Li= cense @@ -91,6 +92,7 @@ [FeaturePcd] =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ##= CONSUMES =20 [Depex] TRUE --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel