From nobody Mon Feb 9 01:48:28 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+86426+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+86426+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1644260578; cv=none; d=zohomail.com; s=zohoarc; b=FLmfBIq2nyRzPNA/i5yFDWUKTGvOauni3ym/NCl3XRm2pUc6sLz1YvZgX7BASSCNkCPgddpJq1uQ/+4Gfzhs0dWPTA6g57qyYDmRHopxt+9bekdRKOg9N43n30Ucv8uYQN54e8SyTeL8bU0QVNhxDiHH2YjPGvQ41s/T1NO6ZIY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1644260578; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=nzFePGx+bQQ8sz100bNxtXjDkiu1eCk5nchwaLPDC9M=; b=kZes4AOAAf/SZ50GJxYlQmIV5edmRC1bEAe1MOAH9rWVUcAuAdKHKs67TxobBwPRZ8szoZwCCCRJSb7J9k8kw1Vo1uyG/3u3G2CRQ7UYbel3JkpaE3NfsuSVyiQgR8j9xQ/gUjzE2f+EX1k+Wu1qRzoHttsdFKsjuQ7JLbLfPPg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+86426+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1644260578340697.4853840910117; Mon, 7 Feb 2022 11:02:58 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 4AfMYY1788612xby6G9W6OaJ; Mon, 07 Feb 2022 11:02:57 -0800 X-Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web11.435.1644260572851807004 for ; Mon, 07 Feb 2022 11:02:53 -0800 X-IronPort-AV: E=McAfee;i="6200,9189,10250"; a="309532838" X-IronPort-AV: E=Sophos;i="5.88,350,1635231600"; d="scan'208";a="309532838" X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Feb 2022 11:02:51 -0800 X-IronPort-AV: E=Sophos;i="5.88,350,1635231600"; d="scan'208";a="567583947" X-Received: from iworam-desk.amr.corp.intel.com ([10.7.150.79]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Feb 2022 11:02:50 -0800 From: "Oram, Isaac W" To: devel@edk2.groups.io Cc: Nate DeSimone , Chasel Chiu Subject: [edk2-devel][edk2-platforms][PATCH V1 4/8] WhitleyOpenBoardPkg/AcpiTables10nm: Add Static ACPI tables Date: Mon, 7 Feb 2022 11:02:41 -0800 Message-Id: <058b4b5cc0ef5eeb3e4a53ebae58768f94766976.1644259969.git.isaac.w.oram@intel.com> In-Reply-To: References: MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,isaac.w.oram@intel.com X-Gm-Message-State: 60Kym3zgkmDtrLcJtQIqJGrkx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1644260577; bh=Dt3p/Ry5w4N2p73aWPIFZvGLgA2sptlHgrI/1ib3caQ=; h=Cc:Date:From:Reply-To:Subject:To; b=idJh3EePNF6bnOLD5OSgCn8uN6rZZsePn6GLf2/LwoFuEXxRt6n1dNsMS0/tW4LUFU4 oiFo+wbf12qlJbjgHLtqoiR0a8V7qb2oZb0624ra8RCQZlzDqAyapIC55TZJwFb+D/y5N xhJKZtWdUqEVWUkg6P0VgfOcYrqfA8L6Z6g= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1644260579894100015 Content-Type: text/plain; charset="utf-8" Static ACPI tables for WilsonCityRvp Cc: Nate DeSimone Cc: Chasel Chiu Signed-off-by: Isaac Oram Reviewed-by: Nate DeSimone --- Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Bdat/Bdat.aslc= | 54 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/DBG2/DBG2.aslc= | 81 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Facs/Facs62.as= lc | 72 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Fadt/Fadt62.as= lc | 171 ++++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Hmat/Hmat.aslc= | 972 ++++++++++++++++++++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Hpet/Hpet.aslc= | 61 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Mcfg/Mcfg.aslc= | 74 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Migt/Migt.aslc= | 68 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Msct/Msct.aslc= | 137 +++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/NFIT/Nfit.aslc= | 48 + Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/PCAT/Pcat.aslc= | 44 + Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Pmtt/Pmtt10nm.= aslc | 136 +++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/SPCR/Spcr.aslc= | 89 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Spmi/Spmi.aslc= | 53 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Wddt/Wddt1.0.a= slc | 74 ++ Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Wsmt/Wsmt.aslc= | 74 ++ 16 files changed, 2208 insertions(+) diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Bd= at/Bdat.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= Bdat/Bdat.aslc new file mode 100644 index 0000000000..734f11200f --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Bdat/Bdat= .aslc @@ -0,0 +1,54 @@ +/** @file + + @copyright + Copyright 2005 - 2012 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// Bdat Access Handler instance data structure +// +STATIC +EFI_BDAT_ACPI_DESCRIPTION_TABLE mBdatAcpiTable =3D \ +{ + {EFI_BDAT_TABLE_SIGNATURE, // Signature + sizeof (EFI_BDAT_ACPI_DESCRIPTION_TABLE), // Length + 0x01, // Revision [01] + // + // Checksum will be updated during boot + // + 0, // Checksum + {' ', // OEM ID + ' ', + ' ', + ' ', + ' ', + ' '}, + 0, // OEM Table ID + 0, // OEM Revision [0x00000000] + 0, // Creator ID + 0}, // Creator Revision + {0, // System Memory Address Sp= ace ID + 0, + 0, + 0, + // + // Pointer will be updated during boot + // + EFI_BDAT_ACPI_POINTER} +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + return (VOID*)&mBdatAcpiTable; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/DB= G2/DBG2.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= DBG2/DBG2.aslc new file mode 100644 index 0000000000..dcad37ac05 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/DBG2/DBG2= .aslc @@ -0,0 +1,81 @@ +/** @file + + @copyright + Copyright 1999 - 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// + +#include +#include + + +DBG2_DEBUG_TABLE DBG2 =3D +{ + { + {EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE, + sizeof (DBG2_DEBUG_TABLE), + 0, + + // + // Checksum will be updated at runtime + // + 0x00, + + // + // It is expected that these values will be programmed at runtime + // + {' ', ' ', ' ', ' ', ' ', ' '}, + + 0, + 0, + 0, + 0 + }, + // + // Beginning of DBG2 specific fields + // + sizeof(EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE), + 1 + }, + { + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, + sizeof(EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT), + 1, + 2, + sizeof(EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT) + sizeof(EFI_ACP= I_6_2_GENERIC_ADDRESS_STRUCTURE) + 4, + 0, + 0, + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550, + {0, 0}, + sizeof(EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT), + sizeof(EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT) + sizeof(EFI_ACP= I_6_2_GENERIC_ADDRESS_STRUCTURE) + }, + { + EFI_ACPI_6_2_SYSTEM_IO, + 16, + 0, + EFI_ACPI_6_2_BYTE, + 0x3F8 + }, + 4, + "." +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the exeutable + // + return (VOID*)&DBG2; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Fa= cs/Facs62.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTable= s/Facs/Facs62.aslc new file mode 100644 index 0000000000..48753f7939 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Facs/Facs= 62.aslc @@ -0,0 +1,72 @@ +/** @file + + @copyright + Copyright 1996 - 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// Firmware ACPI Control Structure +// Please modify all values in Facs.h only. +// +EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs =3D { + EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE, + sizeof (EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE), + // + // Hardware Signature will be updated at runtime + // + 0x00000000, + + EFI_ACPI_FIRMWARE_WAKING_VECTOR, + EFI_ACPI_GLOBAL_LOCK, + EFI_ACPI_FIRMWARE_CONTROL_STRUCTURE_FLAGS, + EFI_ACPI_X_FIRMWARE_WAKING_VECTOR, + EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION, + {EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE}, + EFI_ACPI_OSPM_FLAGS, + {EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE} +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the exeutable + // + return (VOID*)&Facs; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Fa= dt/Fadt62.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTable= s/Fadt/Fadt62.aslc new file mode 100644 index 0000000000..f37cf0a508 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Fadt/Fadt= 62.aslc @@ -0,0 +1,171 @@ +/** @file + + @copyright + Copyright 1999 - 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// + +#include + +// +// Fixed ACPI Description Table +// Please modify all values in Fadt.h only. +// +EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE Fadt =3D { + {EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + sizeof (EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE), + EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, + // + // Checksum will be updated at runtime + // + 0x00, + // + // It is expected that these values will be updated at runtime + // + {' ', ' ', ' ', ' ', ' ', ' '}, // OEMID + 0, // OEM Table ID + EFI_ACPI_OEM_FADT_REVISION, + 0, // Creator ID + 0}, // Creator Revision + // + // These addresses will be updated at runtime + // + 0x00000000, // FIRMWARE_CTRL + 0x00000000, // DSDT + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_PREFERRED_PM_PROFILE, + EFI_ACPI_SCI_INT, + EFI_ACPI_SMI_CMD, + EFI_ACPI_ACPI_ENABLE, + EFI_ACPI_ACPI_DISABLE, + EFI_ACPI_S4_BIOS_REQ, + EFI_ACPI_PSTATE_CNT, + + EFI_ACPI_PM1A_EVT_BLK_ADDRESS, + EFI_ACPI_PM1B_EVT_BLK_ADDRESS, + EFI_ACPI_PM1A_CNT_BLK_ADDRESS, + EFI_ACPI_PM1B_CNT_BLK_ADDRESS, + EFI_ACPI_PM2_CNT_BLK_ADDRESS, + EFI_ACPI_PM_TMR_BLK_ADDRESS, + EFI_ACPI_GPE0_BLK_ADDRESS, + EFI_ACPI_GPE1_BLK_ADDRESS, + EFI_ACPI_PM1_EVT_LEN, + EFI_ACPI_PM1_CNT_LEN, + EFI_ACPI_PM2_CNT_LEN, + EFI_ACPI_PM_TMR_LEN, + EFI_ACPI_GPE0_BLK_LEN, + EFI_ACPI_GPE1_BLK_LEN, + EFI_ACPI_GPE1_BASE, + + EFI_ACPI_CST_CNT, + EFI_ACPI_P_LVL2_LAT, + EFI_ACPI_P_LVL3_LAT, + EFI_ACPI_FLUSH_SIZE, + EFI_ACPI_FLUSH_STRIDE, + EFI_ACPI_DUTY_OFFSET, + EFI_ACPI_DUTY_WIDTH, + EFI_ACPI_DAY_ALRM, + EFI_ACPI_MON_ALRM, + EFI_ACPI_CENTURY, + EFI_ACPI_IAPC_BOOT_ARCH, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_FIXED_FEATURE_FLAGS | EFI_ACPI_6_2_SLP_BUTTON, + // + // Reset Register Block + // + {EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID, + EFI_ACPI_RESET_REG_BIT_WIDTH, + EFI_ACPI_RESET_REG_BIT_OFFSET, + EFI_ACPI_6_2_BYTE, + EFI_ACPI_RESET_REG_ADDRESS}, + + EFI_ACPI_RESET_VALUE, + EFI_ACPI_RESERVED_WORD, // EFI_ACPI_6_2_ARM_BOOT_ARCH + EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, + // + // These addresses will be updated at runtime + // + 0x0000000000000000, // X_FIRMWARE_CTRL + 0x0000000000000000, // X_DSDT + // + // X_PM1a Event Register Block + // + {EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID, + EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH, + EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET, + EFI_ACPI_6_2_WORD, + EFI_ACPI_PM1A_EVT_BLK_ADDRESS}, + // + // X_PM1b Event Register Block + // + {EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID, + EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH, + EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET, + EFI_ACPI_6_2_UNDEFINED, + EFI_ACPI_PM1B_EVT_BLK_ADDRESS}, + // + // X_PM1a Control Register Block + // + {EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID, + EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH, + EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET, + EFI_ACPI_6_2_WORD, + EFI_ACPI_PM1A_CNT_BLK_ADDRESS}, + // + // X_PM1b Control Register Block + // + {EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID, + EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH, + EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET, + EFI_ACPI_6_2_UNDEFINED, + EFI_ACPI_PM1B_CNT_BLK_ADDRESS}, + // + // X_PM2 Control Register Block + // + {EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID, + EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH, + EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET, + EFI_ACPI_6_2_UNDEFINED, + EFI_ACPI_PM2_CNT_BLK_ADDRESS}, + // + // X_PM Timer Control Register Block + // + {EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID, + EFI_ACPI_PM_TMR_BLK_BIT_WIDTH, + EFI_ACPI_PM_TMR_BLK_BIT_OFFSET, + EFI_ACPI_6_2_DWORD, + EFI_ACPI_PM_TMR_BLK_ADDRESS}, + // + // X_General Purpose Event 0 Register Block + // + {EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID, + EFI_ACPI_GPE0_BLK_BIT_WIDTH, + EFI_ACPI_GPE0_BLK_BIT_OFFSET, + EFI_ACPI_6_2_BYTE, + EFI_ACPI_GPE0_BLK_ADDRESS}, + // + // X_General Purpose Event 1 Register Block + // + {EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID, + EFI_ACPI_GPE1_BLK_BIT_WIDTH, + EFI_ACPI_GPE1_BLK_BIT_OFFSET, + EFI_ACPI_6_2_UNDEFINED, + EFI_ACPI_GPE1_BLK_ADDRESS} +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the executable. + // + return (VOID*)&Fadt; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Hm= at/Hmat.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= Hmat/Hmat.aslc new file mode 100644 index 0000000000..ae6efeaee5 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Hmat/Hmat= .aslc @@ -0,0 +1,972 @@ +/** @file + + @copyright + Copyright 2016 - 2018 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include "Acpi/Hmat.h" + +EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE Hmat =3D { + // EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER + { + // EFI_ACPI_DESCRIPTION_HEADER + { + EFI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE, + sizeof (EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE), + EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION, + 0x00, // Checksum, updated at runtime + {' ', ' ', ' ', ' ', ' ', ' '}, // OEM ID, programmed at runtime + 0, + EFI_ACPI_OEM_HMAT_REVISION, + 0, + 0 + }, // EFI_ACPI_DESCRIPTION_HEADER + (UINT32) 0 + }, // EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER + + // Beginning of HMAT substructures +#if EFI_ACPI_HMAT_MSARS_COUNT > 0 + { // MEMORY_SUBSYSTEM_ADDRESS_RANGE_STRUCTURE[EFI_ACPI_HMAT_MSARS_COUNT] + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#if MC_MAX_NODE > 1 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 2 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 3 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 4 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 5 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 6 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 7 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 8 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 9 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 10 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 11 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 12 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 13 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 14 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif +#if MC_MAX_NODE > 15 + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() + MSARS_INIT() +#endif + }, // MEMORY_SUBSYSTEM_ADDRESS_RANGE_STRUCTURE[EFI_ACPI_HMAT_MSARS_COUNT] +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 0 + { // LATENCY_BANDWIDTH_INFO_STRUCTURE Lbis[EFI_ACPI_HMAT_LBIS_COUNT] + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#if EFI_ACPI_HMAT_LBIS_COUNT > 1 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 2 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 3 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 4 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 5 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 6 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 7 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 8 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 9 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 10 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif +#if EFI_ACPI_HMAT_LBIS_COUNT > 11 + LBIS_START() + RELATIVE_DISTANCE() +#if MC_MAX_NODE > 1 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 2 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 3 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 4 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 5 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 6 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 7 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 8 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 9 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 10 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 11 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 12 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 13 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 14 + RELATIVE_DISTANCE() +#endif +#if MC_MAX_NODE > 15 + RELATIVE_DISTANCE() +#endif + LBIS_END() +#endif + }, // LATENCY_BANDWIDTH_INFO_STRUCTURE Lbis[EFI_ACPI_HMAT_LBIS_COUNT] +#endif +#if EFI_ACPI_HMAT_MSCIS_COUNT > 0 + { // MEMORY_SIDE_CACHE_INFORMATION_STRUCTURE MemSideCache[EFI_ACPI_HMAT_= MSCIS_COUNT] + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#if MC_MAX_NODE > 1 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 2 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 3 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 4 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 5 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 6 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 7 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 8 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 9 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 10 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 11 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 12 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 13 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 14 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif +#if MC_MAX_NODE > 15 + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() + MSCIS_INIT() +#endif + }, // MEMORY_SIDE_CACHE_INFORMATION_STRUCTURE MemSideCache[EFI_ACPI_HMAT= _MSCIS_COUNT] +#endif +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the executable + // + return (VOID*)&Hmat; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Hp= et/Hpet.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= Hpet/Hpet.aslc new file mode 100644 index 0000000000..37b680ad6b --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Hpet/Hpet= .aslc @@ -0,0 +1,61 @@ +/** @file + + @copyright + Copyright 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// High Precision Event Timer Table +// Please modify all values in Hpet.h only. +// +EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER Hpet =3D { + {EFI_ACPI_6_2_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE, // Signature + sizeof (EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER), // Length + EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_REVISION, // Revision = [01] + // + // Checksum will be updated at runtime + // + 0x00, // Checksum + // + // It is expected that these values will be updated at runtime + // + {' ', + ' ', + ' ', + ' ', + ' ', + ' '}, + 0, + EFI_ACPI_OEM_HPET_REVISION, // OEM Revis= ion [0x00000001] + 0, // Creator ID + 0}, // Creator R= evision + EFI_ACPI_EVENT_TIMER_BLOCK_ID, // Event Tim= er Block ID (4B) [0x8086A201] + {EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS_SPACE_ID, // 2 [EFI_AC= PI_6_2_SYSTEM_MEMORY] + EFI_ACPI_EVENT_TIMER_BLOCK_BIT_WIDTH, // 3 [0x00] + EFI_ACPI_EVENT_TIMER_BLOCK_BIT_OFFSET, // 4 [0x00] + EFI_ACPI_EVENT_TIMER_ACCESS_SIZE, // [0x00] + EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS}, // HPET Bloc= k BASE_ADDRESS (12B) [0x00000000FED00000] + EFI_ACPI_HPET_NUMBER, // HPET Numb= er [00] + EFI_ACPI_MIN_CLOCK_TICK, // Main Coun= ter Minimum Clock tick [0x0080] + EFI_ACPI_HPET_ATTRIBUTES // Page Prot= ection & OEM attribute [0x00] +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the exeutable + // + return (VOID*)&Hpet; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Mc= fg/Mcfg.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= Mcfg/Mcfg.aslc new file mode 100644 index 0000000000..6e9a84aa49 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Mcfg/Mcfg= .aslc @@ -0,0 +1,74 @@ +/** @file + + @copyright + Copyright 1999 - 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// MCFG Table definition +// +EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE Mcfg =3D { + {{EFI_ACPI_6_2_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE, + sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE), + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION, + // + // Checksum will be updated at runtime + // + 0x00, + // + // It is expected that these values will be programmed at runtime + // + {' ', + ' ', + ' ', + ' ', + ' ', + ' '}, + + 0, + EFI_ACPI_OEM_MCFG_REVISION, + 0, + 0}, + // + // Beginning of MCFG specific fields + // + EFI_ACPI_RESERVED_QWORD}, + // + // Sample Memory Mapped Configuration Space Base Address Structure + // + // 0x0, // = Base Address + // 0x0, // = PCI Segment Group Number + // 0x0, // = Start Bus Number + // 0x0, // = End Bus Number + // EFI_ACPI_RESERVED_DWORD, // = Reserved + // + // Memory Mapped Configuration Space Base Address Structure + // +#if EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_BASE_ADDRESS_STRUCTURE_C= OUNT > 0 + {{0x0, // Base Address, will be updated by AcpiPlatfo= rm + 0x0, // PCI Segment Group Number + 0x0, // Start Bus Number + 0xff, // End Bus Number + EFI_ACPI_RESERVED_DWORD}} // Reserved +#endif // EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_BASE_ADDRESS_STRUC= TURE_COUNT +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the exeutable + // + return (VOID*)&Mcfg; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Mi= gt/Migt.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= Migt/Migt.aslc new file mode 100644 index 0000000000..5efe5afee1 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Migt/Migt= .aslc @@ -0,0 +1,68 @@ +/** @file + + @copyright + Copyright 2005 - 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// Please modify all values in Migt.h only. +// +EFI_MIGT_ACPI_DESCRIPTION_TABLE Migt =3D { + {EFI_MIGT_ACPI_TABLE_SIGNATURE, // Signature + sizeof (EFI_MIGT_ACPI_DESCRIPTION_TABLE), // Length + EFI_MIGT_ACPI_DESCRIPTION_TABLE_REVISION, // Revision + // + // Checksum will be updated at runtime + // + 0x00, // Checksum + // + // It is expected that these values will be updated at runtime + // + {' ', + ' ', + ' ', + ' ', + ' ', + ' '}, + 0, + EFI_MIGT_ACPI_OEM_REVISION, // OEM Revision + 0, // Creator ID + 0}, // Creator Revision + // + // MIGT Speicific Entries + // Control Register GAS structure + // + {EFI_MIGT_CR_ACPI_ADDRESS_SPACE_ID, // IO Type ID. + EFI_MIGT_CR_ACPI_REGISTER_BIT_WIDTH, + EFI_MIGT_CR_ACPI_REGISTER_BIT_OFFSET, + EFI_ACPI_RESERVED_BYTE, + EFI_MIGT_CR_ACPI_SMI_ADDRESS}, + + MIGT_SMI_SERVICE_ID, // SMI Door Bell + + // + // Action Region GAS structure + // + {EFI_MIGT_AR_ACPI_ADDRESS_SPACE_ID, // Memory Type ID + EFI_MIGT_AR_ACPI_REGISTER_BIT_WIDTH, + EFI_MIGT_AR_ACPI_REGISTER_BIT_OFFSET, + EFI_ACPI_RESERVED_BYTE, + // update during boot + EFI_MIGT_AR_ACPI_MEMORY_ADDRESS} +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + return (VOID*)&Migt; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Ms= ct/Msct.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= Msct/Msct.aslc new file mode 100644 index 0000000000..e0e1bebd0a --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Msct/Msct= .aslc @@ -0,0 +1,137 @@ +/** @file + + @copyright + Copyright 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// Maximum System Characteristics Table definition +// +EFI_ACPI_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE Msct =3D { + {EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE, + sizeof (EFI_ACPI_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE), // Length + EFI_ACPI_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION, // Revision + 0x00, // Checksum wil= l be updated at runtime + {'I', 'N', 'T', 'E', 'L', ' '}, // OemId + 0, // OemTableId + EFI_ACPI_OEM_MSCT_REVISION, // OemRevision + EFI_ACPI_CREATOR_ID, // CreaterId + EFI_ACPI_CREATOR_REVISION}, // CreaterRevis= ion + // + // Beginning of MSCT specific fields + // + 0x00000038, // OffsetProxDo= mInfo + MAX_SOCKET - 1, // MaxNumProxDom + 0x00000000, // MaxNumClockD= om + 0x0000000000000000, // MaxPhysicalA= ddress + // + // Proximity Domain Information Structure 0 + // + {{EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE_REVISION, // = Revision + sizeof (EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE), // = Length + 0x00000000, // = ProxDomRangeLow + 0x00000000, // = ProxDomRangeHigh + 0x00000000, // = MaxProcessorCapacity + 0x0000000000000000} // = MaxMemoryCapacity + +#if MAX_SOCKET > 1 + // + // Proximity Domain Information Structure 1 + // + ,{EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE_REVISION, //= Revision + sizeof (EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE), // = Length + 0x00000000, // = ProxDomRangeLow + 0x00000000, // = ProxDomRangeHigh + 0x00000000, // = MaxProcessorCapacity + 0x0000000000000000} // = MaxMemoryCapacity +#endif + +#if MAX_SOCKET > 2 + // + // Proximity Domain Information Structure 2 + // + ,{EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE_REVISION, // = Revision + sizeof (EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE), // = Length + 0x00000000, // = ProxDomRangeLow + 0x00000000, // = ProxDomRangeHigh + 0x00000000, // = MaxProcessorCapacity + 0x0000000000000000} // = MaxMemoryCapacity +#endif + +#if MAX_SOCKET > 3 + // + // Proximity Domain Information Structure 3 + // + ,{EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE_REVISION, // = Revision + sizeof (EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE), // = Length + 0x00000000, // = ProxDomRangeLow + 0x00000000, // = ProxDomRangeHigh + 0x00000000, // = MaxProcessorCapacity + 0x0000000000000000} // = MaxMemoryCapacity +#endif + +#if MAX_SOCKET > 4 + // + // Proximity Domain Information Structure 4 + // + ,{EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE_REVISION, // = Revision + sizeof (EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE), // = Length + 0x00000000, // = ProxDomRangeLow + 0x00000000, // = ProxDomRangeHigh + 0x00000000, // = MaxProcessorCapacity + 0x0000000000000000} // = MaxMemoryCapacity +#endif + +#if MAX_SOCKET > 5 + // + // Proximity Domain Information Structure 5 + // + ,{EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE_REVISION, // = Revision + sizeof (EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE), // = Length + 0x00000000, // = ProxDomRangeLow + 0x00000000, // = ProxDomRangeHigh + 0x00000000, // = MaxProcessorCapacity + 0x0000000000000000} // = MaxMemoryCapacity +#endif + +#if MAX_SOCKET > 6 + // + // Proximity Domain Information Structure 6 + // + ,{EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE_REVISION, // = Revision + sizeof (EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE), // = Length + 0x00000000, // = ProxDomRangeLow + 0x00000000, // = ProxDomRangeHigh + 0x00000000, // = MaxProcessorCapacity + 0x0000000000000000} // = MaxMemoryCapacity +#endif + +#if MAX_SOCKET > 7 + // + // Proximity Domain Information Structure 7 + // + ,{EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE_REVISION, // = Revision + sizeof (EFI_ACPI_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE), // = Length + 0x00000000, // = ProxDomRangeLow + 0x00000000, // = ProxDomRangeHigh + 0x00000000, // = MaxProcessorCapacity + 0x0000000000000000} // = MaxMemoryCapacity +#endif + } +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + return (VOID*)&Msct; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/NF= IT/Nfit.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= NFIT/Nfit.aslc new file mode 100644 index 0000000000..389c43ce3c --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/NFIT/Nfit= .aslc @@ -0,0 +1,48 @@ +/** @file + + @copyright + Copyright 2015 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// NFIT Table +// Please modify all values in Nfit.h only. +// +NVDIMM_FW_INTERFACE_TABLE Nfit =3D { + NVDIMM_FW_INTERFACE_TABLE_SIGNATURE, // Signature + sizeof (NVDIMM_FW_INTERFACE_TABLE), // Length + NVDIMM_FW_INTERFACE_TABLE_REVISION, // Revision [01] + // + // Checksum will be updated at runtime + // + 0x00, // Checksum + // + // It is expected that these values will be updated at runtime + // + {' ', // TODO any other static values to be filled in? + ' ', + ' ', + ' ', + ' ', + ' '} +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the exeutable + // + return (VOID*)&Nfit; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/PC= AT/Pcat.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= PCAT/Pcat.aslc new file mode 100644 index 0000000000..e43c865c64 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/PCAT/Pcat= .aslc @@ -0,0 +1,44 @@ +/** @file + + @copyright + Copyright 2015 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// PCAT Table +// Please modify all values in Pcat.h only. +// +NVDIMM_PLATFORM_CONFIG_ATTRIBUTE_TABLE Pcat =3D { + NVDIMM_PLATFORM_CONFIG_ATTRIBUTE_TABLE_SIGNATURE, // Signature + sizeof (NVDIMM_PLATFORM_CONFIG_ATTRIBUTE_TABLE), // Length + NVDIMM_PLATFORM_CONFIG_ATTRIBUTE_TABLE_REVISION, // Revision + // + // Checksum will be updated at runtime + // + 0x00, // Checksum + // + // It is expected that these values will be updated at runtime + // + {' '}, // TODO any other static values? + +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the exeutable + // + return (VOID*)&Pcat; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Pm= tt/Pmtt10nm.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTab= les/Pmtt/Pmtt10nm.aslc new file mode 100644 index 0000000000..a0b4dc2756 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Pmtt/Pmtt= 10nm.aslc @@ -0,0 +1,136 @@ +/** @file + + @copyright + Copyright 2016 - 2018 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include +// +// PMTT Table +// +#define PHYSICAL_COMP_IDENTIFIER \ + {PHYSICAL_COMPONENT_IDENTIFIER_TYPE_DIMM, \ + EFI_ACPI_RESERVED_BYTE, \ + sizeof (ACPI_PMTT_DIMM_DEVICE), \ + 0x00000000, \ + EFI_ACPI_RESERVED_BYTE, \ + 0x00000000, \ + 0xFFFFFFFF} + +#define SLOT = \ + {ACPI_TOP_LEVEL_VENDOR_SPECIFIC_DEVICE, = \ + EFI_ACPI_RESERVED_BYTE, = \ + sizeof (ACPI_PMTT_SLOT_DEVICE) - sizeof(ACPI_PMTT_DIMM_DEVICE), = \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + 0x00000000, = \ + PMTT_TYPE_SLOT_GUID, = \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + PHYSICAL_COMP_IDENTIFIER} + +#define CHANNEL = \ + {ACPI_TOP_LEVEL_VENDOR_SPECIFIC_DEVICE, = \ + EFI_ACPI_RESERVED_BYTE, = \ + sizeof (ACPI_PMTT_CHANNEL_DEVICE) - MAX_DIMM * sizeof(ACPI_PMTT_SLOT_DEV= ICE), \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + 0x00000000, = \ + PMTT_TYPE_CHANNEL_GUID, = \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + {SLOT, = \ + SLOT} = \ + } + +#define MEM_IMC = \ + {ACPI_TOP_LEVEL_IMC, = \ + EFI_ACPI_RESERVED_BYTE, = \ + sizeof (ACPI_PMTT_IMC_DEVICE) - MAX_MC_CH * sizeof(ACPI_PMTT_CHANNEL_DEV= ICE), \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + 0x00000000, = \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + {CHANNEL, = \ + CHANNEL} = \ + } + +#define DIE = \ + {ACPI_TOP_LEVEL_VENDOR_SPECIFIC_DEVICE, = \ + EFI_ACPI_RESERVED_BYTE, = \ + sizeof (ACPI_PMTT_DIE_DEVICE) - MAX_IMC * sizeof(ACPI_PMTT_IMC_DEVICE), = \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + 0x00000000, = \ + PMTT_TYPE_DIE_GUID, = \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + {MEM_IMC, = \ + MEM_IMC, = \ + MEM_IMC, = \ + MEM_IMC}} + +#define SKT_LEVEL = \ + {ACPI_TOP_LEVEL_SOCKET, = \ + EFI_ACPI_RESERVED_BYTE, = \ + sizeof (ACPI_PMTT_SOCKET_DEVICE) - sizeof(ACPI_PMTT_DIE_DEVICE), = \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + 0x00000000, = \ + 0x00000000, = \ + EFI_ACPI_RESERVED_BYTE, = \ + {DIE} = \ + }, +#pragma pack(1) + +ACPI_PLATFORM_MEMORY_TOPOLOGY_TABLE mPmttTable =3D { + {ACPI_PMTT_TABLE_SIGNATURE, // Signature 'PMTT' + sizeof (ACPI_PLATFORM_MEMORY_TOPOLOGY_TABLE), // Length + ACPI_PMTT_TABLE_REVISION, // Revision + 0x00, // CheckSum + {'I', 'N', 'T', 'E', 'L', ' '}, // OemId + 0, // OemTableId + ACPI_PMTT_OEM_REVISION, // OemRevision + EFI_ACPI_CREATOR_ID, // CreaterId + EFI_ACPI_CREATOR_REVISION}, // CreaterRevision + 0, // NumOfMemoryDevices + { SKT_LEVEL +#if MAX_SOCKET > 1 + SKT_LEVEL +#endif +#if MAX_SOCKET > 2 + SKT_LEVEL +#endif +#if MAX_SOCKET > 3 + SKT_LEVEL +#endif +#if MAX_SOCKET > 4 + SKT_LEVEL +#endif +#if MAX_SOCKET > 5 + SKT_LEVEL +#endif +#if MAX_SOCKET > 6 + SKT_LEVEL +#endif +#if MAX_SOCKET > 7 + SKT_LEVEL +#endif + } +}; + +#pragma pack() + +VOID* +ReferenceAcpiTable ( + VOID + ) +{ + return (VOID*)&mPmttTable; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/SP= CR/Spcr.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= SPCR/Spcr.aslc new file mode 100644 index 0000000000..26603102a2 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/SPCR/Spcr= .aslc @@ -0,0 +1,89 @@ +/** @file + + @copyright + Copyright 1999 - 2002 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// + +#include +#include +#include + +// +// Serial Port Console Redirection Table +// Please modify all values in Spcr.h only. +// + +EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr =3D { + {EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, + sizeof (EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE), + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION, + + // + // Checksum will be updated at runtime + // + 0x00, + + // + // It is expected that these values will be programmed at runtime + // + {' ', ' ', ' ', ' ', ' ', ' '}, + + 0, + EFI_ACPI_OEM_SPCR_REVISION, + 0, + 0}, + + // + // Beginning of SPCR specific fields + // + EFI_ACPI_INTERFACE_TYPE, + {EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE}, + + // + // Base Address Block + // + {EFI_ACPI_BASE_ADDRESS_ADDRESS_SPACE_ID, + EFI_ACPI_BASE_ADDRESS_BIT_WIDTH, + EFI_ACPI_BASE_ADDRESS_BIT_OFFSET, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_BASE_ADDRESS_ADDRESS}, + + EFI_ACPI_INTERRUPT_TYPE, + EFI_ACPI_IRQ, + EFI_ACPI_GLOBAL_SYSTEM_INTERRUPT, + EFI_ACPI_BAUD_RATE, + EFI_ACPI_PARITY, + EFI_ACPI_STOP_BITS, + EFI_ACPI_FLOW_CONTROL, + EFI_ACPI_TERMINAL_TYPE, + EFI_ACPI_LANGUAGE, + EFI_ACPI_PCI_DEVICE_ID, + EFI_ACPI_PCI_VENDOR_ID, + EFI_ACPI_PCI_BUS_NUMBER, + EFI_ACPI_PCI_DEVICE_NUMBER, + EFI_ACPI_PCI_FUNCTION_NUMBER, + EFI_ACPI_PCI_FLAGS, + EFI_ACPI_PCI_SEGMENT, + EFI_ACPI_RESERVED_DWORD +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from rem= oving the + // data structure from the exeutable + // + return (VOID*)&Spcr; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Sp= mi/Spmi.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= Spmi/Spmi.aslc new file mode 100644 index 0000000000..74855daee4 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Spmi/Spmi= .aslc @@ -0,0 +1,53 @@ +/** @file + + @copyright + Copyright 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include + +// +// Server processor management interface table definition +// +EFI_ACPI_SERVER_PROCESSOR_MANAGEMENT_INTERFACE_TABLE Spmi =3D { + {EFI_ACPI_6_2_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE, + sizeof (EFI_ACPI_SERVER_PROCESSOR_MANAGEMENT_INTERFACE_TABLE), = // Length + EFI_ACPI_SERVER_PROCESSOR_MANAGEMENT_INTERFACE_TABLE_REVISION, = // Revision + 0x00, = // Checksum will be updated at runtime + {'I', 'N', 'T', 'E', 'L', ' '}, = // OemId + 0, = // OemTableId + EFI_ACPI_OEM_SPMI_REVISION, = // OemRevision + 0, = // CreaterId + 0}, = // CreaterRevision + // + // Beginning of Spmi specific fields + // + 0x00, = // InterfaceType + 0x01, = // Reserved37, always 1 + EFI_ACPI_SPMI_SPECIFICATION_REVISION, = // SpecificationRevision + 0x00, = // InterruptType + 0x00, = // GPE + 0x00, = // Reserved42 + 0x00, = // PciDeviceFlag + 0x00000000, = // GlobalSystemInterrupt + {0x00, 0x00, 0x00, 0x00, 0x00}, = // GAS + 0x00, = // UidByte1 + 0x00, = // UidByte2 + 0x00, = // UidByte3 + 0x00, = // UidByte4 + 0x00 = // Reserved64 +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + return (VOID*)&Spmi; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Wd= dt/Wddt1.0.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTabl= es/Wddt/Wddt1.0.aslc new file mode 100644 index 0000000000..fe0db504fd --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Wddt/Wddt= 1.0.aslc @@ -0,0 +1,74 @@ +/** @file + + @copyright + Copyright 1999 - 2019 Intel Corporation.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +// +// Statements that include other files +// +#include +#include + +// +// Watchdog Description Table , ACPI 6.2 compliant +// +EFI_ACPI_WATCH_DOG_DESCRIPTION_TABLE Wddt =3D { + {EFI_ACPI_WDDT_SIGNATURE, + sizeof (EFI_ACPI_WATCH_DOG_DESCRIPTION_TABLE), + EFI_ACPI_WDDT_DESCRIPTION_TABLE_REVISION, + // + // Checksum will be updated at runtime + // + 0x00, + // + // It is expected that these values will be programmed at runtime + // + {' ', + ' ', + ' ', + ' ', + ' ', + ' '}, + 0, + 0, + 0, + 0}, + // + // WDDT specific fields + // + // + // This is LPC bridge VID it must be patched in + // + 0, + EFI_ACPI_WDDT_SPEC_VERSION, + EFI_ACPI_WDDT_TABLE_VERSION, + // + // Base Address + // + {0x01, + 0xff, + 0x00, + 0x00, + // + // This is AcpiBase(PmBase)+60 and must be patched in + // + 0000}, + EFI_ACPI_WDDT_TIMER_MAX_COUNT, + EFI_ACPI_WDDT_TIMER_MIN_VALUE, + EFI_ACPI_WDDT_TIMER_PERIOD_COUNT, + EFI_ACPI_WDDT_STATUS_AVAILABLE, + 00 + +}; + +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + return (VOID*)&Wddt; +} diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Ws= mt/Wsmt.aslc b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/= Wsmt/Wsmt.aslc new file mode 100644 index 0000000000..83484b7cd7 --- /dev/null +++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Wsmt/Wsmt= .aslc @@ -0,0 +1,74 @@ +/** @file + + @copyright + Copyright 2017 - 2020 Intel Corporation. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + + + // + // Statements that include other files + // + +#include + + // + // Windows SMM Security Mitigations Table + // Please modify all values in Wsmt.h only. + // + +ACPI_WINDOWS_SMM_SECURITY_MITIGATIONS_TABLE Wsmt =3D { + // + // Header + // + { + ACPI_WSMT_SIGNATURE, + ACPI_WSMT_LENGTH, + EFI_ACPI_WSMT_REVISION, + + // + // Checksum will be updated at runtime + // + 0x00, + + // + // It is expected that these values will be updated at runtime + // + { ' ', ' ', ' ', ' ', ' ', ' ' }, + 0, + ACPI_OEM_WSMT_REVISION, + 0, + 0 + }, + // + // Protection Flags + // + { + { 0 } + } + +}; + +#if defined (__GNUC__) +VOID* +ReferenceAcpiTable ( + VOID + ) + +{ + // + // Reference the table being generated to prevent the optimizer from remo= ving the + // data structure from the executable + // + return (VOID*)&Wsmt; +} +#else +VOID +main ( + VOID + ) + +{ +} +#endif --=20 2.27.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#86426): https://edk2.groups.io/g/devel/message/86426 Mute This Topic: https://groups.io/mt/88979439/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-