From nobody Sat May 4 20:38:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+72204+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72204+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=nvidia.com ARC-Seal: i=1; a=rsa-sha256; t=1614273591; cv=none; d=zohomail.com; s=zohoarc; b=e6EAJy4JkZtGgesFG/RlrYip+v4aNu5OoPSUhMQsWC7FBw8IJw6muuRxnpbUDlu1WIxiQ4SaAT9EIjZgDEMv3m5jxHtkssdH4jJzbNDT3VlfOYx6bCR/PMoe2874ywlNiEgCROp6yvJsgOkZF7WZ6cJ3zYqeYFGCoXcuPvJ7Y2E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614273591; h=Content-Type:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=j6tjP0OWImFu6nEKEaT+sjeokLfkrz66NKBoUPYaqus=; b=gpcCzfgaAQEvPrRZymVuEqC/G7LTJO/fmR8rk8TQtt3m9nb8+ofiiUAfkHDfc/yTNgDtLQ1dVooJ+4Z9rSrLhrS4dPqqnZ0MHFdiYR3gcN1TnPA6SrABKt4vcnQfqCLfnpOLY/Or6kTVBD1NzqFkGVEAfYU5J7d21etkWCjHH9Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72204+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 161427359098362.687358937457816; Thu, 25 Feb 2021 09:19:50 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id MJ05YY1788612xxuQO8GD7an; Thu, 25 Feb 2021 09:19:50 -0800 X-Received: from hqnvemgate25.nvidia.com (hqnvemgate25.nvidia.com [216.228.121.64]) by mx.groups.io with SMTP id smtpd.web10.468.1614273590094406927 for ; Thu, 25 Feb 2021 09:19:50 -0800 X-Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Thu, 25 Feb 2021 09:19:49 -0800 X-Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 25 Feb 2021 17:19:49 +0000 X-Received: from ashishsingha-lnx.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 25 Feb 2021 17:19:48 +0000 From: "Ashish Singhal" To: , , CC: Ashish Singhal Subject: [edk2-devel] [PATCH] ArmPkg/ArmGicLib: Fix setting GICv3 Interrupt Priority Date: Thu, 25 Feb 2021 10:19:46 -0700 Message-ID: <0284001c888f058e59853e725d4f02a00840506a.1614273201.git.ashishsingha@nvidia.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ashishsingha@nvidia.com X-Gm-Message-State: rGOKaWwanKpfez8BUpTi45Abx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1614273590; bh=halne6a9l16HSvhwruZKgjabXCXsnVVEzH5lYdNLSeo=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=a6nSIqHWiTqlYbGPjpJLy8x7e8Cxbx0dDz0Lnq9UrMVjnDgPTLUjIq3Js6znU7rZlfM MU/Ae91vltIsbSiGvhB2gUfLefbuyvRTAmgqBRcPexixIuVjdVoR5Sr6DyjiptoCLR0y7 pWIoNMEsHp9vtWGhJp/NJI4lYJ8DJhlqnx8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Incorrect register is being set for configuring interrupt priority. Correct register is located in SGI space and not in RD space. Signed-off-by: Ashish Singhal --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index 8ef32b3..3c0bee6 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -236,7 +236,7 @@ ArmGicSetInterruptPriority ( } =20 MmioAndThenOr32 ( - GicCpuRedistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), + GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDIPR = + (4 * RegOffset), ~(0xff << RegShift), Priority << RegShift ); --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#72204): https://edk2.groups.io/g/devel/message/72204 Mute This Topic: https://groups.io/mt/80907153/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-