From nobody Wed May 15 01:36:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+112728+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+112728+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1702991247; cv=none; d=zohomail.com; s=zohoarc; b=RhLTZcz805NKMMLKze3FawGR1h43WiuKhOrHetU4/Wuei7iAJDge/vbQvp8WSpj/x3bp8bQCVl1eIogskEJXG298lGB1FIJBbqNPbSOD5Gly/dS7JSCUJnoKtU1/lFVDc+I3aGEFhomwvJcOn4yOfTDupIEY9Fs1pxl4gBdG87Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1702991247; h=Content-Type:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=uwwytOlARTmZKYc9jDTrJqEL6mE73m0BbKOMmoYLawg=; b=VTtL3eReBjqFxB9Yr9XfUV4sDr/CrvdsZHZeC3pGfYXso7ojIcpf+To1xxetl+rZ40MxSU74UC+1l7nC8zG1h/wdxaaS1qHpCKkR0Ur+eqhKRi8xrZSPPsHARX3c1rCQ9Ru0jlNo7G1jl+A8cjz3iC+gCl9mJG21pSCN4gKqHWA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+112728+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1702991247173284.4285614156822; Tue, 19 Dec 2023 05:07:27 -0800 (PST) Return-Path: DKIM-Signature: a=rsa-sha256; bh=IyiURAc7058T2kkmQ1tAwl2HaKx6zNuZL4MMuzgpEc0=; c=relaxed/simple; d=groups.io; h=From:To:Cc:References:In-Reply-To:Subject:Date:Message-ID:MIME-Version:Thread-Index:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Language; s=20140610; t=1702991246; v=1; b=FQGif41GmYH6BRq/lKDANo8P57/ykYWEn2Pd/uGkySzQufX7aPyscF0zXFvdvnvImxBUpjGW Od3SyRN3TnM9Sf4UgpMFyJklwpfo03dpFd8TywS4Yfctl+pJ26Mdgdfu/lmhP6lYthogrZZT59w VMQUYwcEBkk+wp0wf+E0qAr4= X-Received: by 127.0.0.2 with SMTP id WyY9YY1788612x1l6D3E1zwB; Tue, 19 Dec 2023 05:07:26 -0800 X-Received: from zrleap.intel-email.com (zrleap.intel-email.com [114.80.218.36]) by mx.groups.io with SMTP id smtpd.web10.11640.1702991245461922295 for ; Tue, 19 Dec 2023 05:07:26 -0800 X-Received: from zrleap.intel-email.com (localhost [127.0.0.1]) by zrleap.intel-email.com (Postfix) with ESMTP id A86C7A32DFDE for ; Tue, 19 Dec 2023 21:07:22 +0800 (CST) X-Received: from localhost (localhost [127.0.0.1]) by zrleap.intel-email.com (Postfix) with ESMTP id 8E50AA32DFD9 for ; Tue, 19 Dec 2023 21:07:22 +0800 (CST) X-Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by zrleap.intel-email.com (Postfix) with SMTP id B5D5DA32DFCF for ; Tue, 19 Dec 2023 21:07:19 +0800 (CST) X-Received: from DESKTOPS6D0PVI ([114.93.194.54]) (envelope-sender ) by 192.168.6.13 with ESMTP(SSL) for ; Tue, 19 Dec 2023 21:07:18 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 114.93.194.54 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming via groups.io" To: , , "'Michael D Kinney'" Cc: "'Zhiguang Liu'" , "'Laszlo Ersek'" References: <20231212130932.2467028-1-lichao@loongson.cn> <17A017B459AD36A8.31409@groups.io> In-Reply-To: Subject: =?UTF-8?B?5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIIHY0IDA5LzM3XSBNZGVQa2c6IEFkZCBhIG5ldyBsaWJyYXJ5IG5hbWVkIFBlaVNlcnZpY2VzVGFibGVQb2ludGVyTGliS3Mw?= Date: Tue, 19 Dec 2023 21:07:19 +0800 Message-ID: <00f401da327c$4c735010$e559f030$@byosoft.com.cn> MIME-Version: 1.0 Thread-Index: AQCEYG8EQWgyRBqnKjP2eTsQI6iJCAOQYeSQAxrmPF+zJt1HwA== Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,gaoliming@byosoft.com.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Jt20cVi86ARTihgfy1hrGdU2x1787277AA= Content-Type: multipart/alternative; boundary="----=_NextPart_000_00F5_01DA32BF.5A990110" Content-Language: zh-cn X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1702991249382100003 ------=_NextPart_000_00F5_01DA32BF.5A990110 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Chao: Is there a branch or pull request for this patch set? I would like to chec= k how this new library instance be used. =20 Thanks Liming =E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io = =E4=BB=A3=E8=A1=A8 Chao Li =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2023=E5=B9=B412=E6=9C=8819=E6=97=A5 2= 1:01 =E6=94=B6=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io; Michael D Kinney ; Liming Gao =E6=8A=84=E9=80=81: Zhiguang Liu ; Laszlo Ersek =E4=B8=BB=E9=A2=98: Re: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new lib= rary named PeiServicesTablePointerLibKs0 =20 Hi Mike and Liming, Can you please review this patch? Thank you!=20 =20 Thanks, Chao On 2023/12/12 21:11, Chao Li wrote: Adding PeiServicesTablePointerLibKs0 for LoongArch64, which provides setting and getting the PEI service table pointer through the CSR KS0 register. =20 The idea of this library is derived from ArmPkg/Library/PeiServicesTablePointerLib/ =20 BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4584 =20 Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Laszlo Ersek Signed-off-by: Chao Li --- .../Library/PeiServicesTablePointerLib.h | 9 +- .../PeiServicesTablePointer.c | 87 +++++++++++++++++++ .../PeiServicesTablePointerLibKs0.inf | 37 ++++++++ .../PeiServicesTablePointerLibKs0.uni | 20 +++++ MdePkg/MdePkg.dsc | 3 + 5 files changed, 152 insertions(+), 4 deletions(-) create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService= sTablePointer.c create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService= sTablePointerLibKs0.inf create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService= sTablePointerLibKs0.uni =20 diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/I= nclude/Library/PeiServicesTablePointerLib.h index 61635eff00..f85c38363c 100644 --- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h +++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h @@ -52,10 +52,11 @@ SetPeiServicesTablePointer ( immediately preceding the Interrupt Descriptor Table (IDT) in memory. For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes immediately preceding the Interrupt Descriptor Table (IDT) in memory. - For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in - a dedicated CPU register. This means that there is no memory storage - associated with storing the PEI Services Table pointer, so no additional - migration actions are required for Itanium or ARM CPUs. + For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer + is stored in a dedicated CPU register. This means that there is no + memory storage associated with storing the PEI Services Table pointer, + so no additional migration actions are required for Itanium, ARM and + LoongArch CPUs. =20 **/ VOID diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP= ointer.c b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePoi= nter.c new file mode 100644 index 0000000000..2560b232f9 --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c @@ -0,0 +1,87 @@ +/** @file + PEI Services Table Pointer Library For Reigseter Mechanism. + + This library is used for PEIM which does executed from flash device dire= ctly but + executed in memory. + + Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.
+ Copyright (c) 2023 Loongson Technology Corporation Limited. All rights r= eserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include + +/** + Caches a pointer PEI Services Table. + + Caches the pointer to the PEI Services Table specified by PeiServicesTab= lePointer + in a platform specific manner. + + If PeiServicesTablePointer is NULL, then ASSERT(). + + @param PeiServicesTablePointer The address of PeiServices pointer. +**/ +VOID +EFIAPI +SetPeiServicesTablePointer ( + IN CONST EFI_PEI_SERVICES **PeiServicesTablePointer + ) +{ + ASSERT (PeiServicesTablePointer !=3D NULL); + CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer); +} + +/** + Retrieves the cached value of the PEI Services Table pointer. + + Returns the cached value of the PEI Services Table pointer in a CPU spec= ific manner + as specified in the CPU binding section of the Platform Initialization P= re-EFI + Initialization Core Interface Specification. + + If the cached PEI Services Table pointer is NULL, then ASSERT(). + + @return The pointer to PeiServices. + +**/ +CONST EFI_PEI_SERVICES ** +EFIAPI +GetPeiServicesTablePointer ( + VOID + ) +{ + CONST EFI_PEI_SERVICES **PeiServices; + + PeiServices =3D (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CSR_KS0)); + ASSERT (PeiServices !=3D NULL); + return PeiServices; +} + +/** + Perform CPU specific actions required to migrate the PEI Services Table + pointer from temporary RAM to permanent RAM. + + For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes + immediately preceding the Interrupt Descriptor Table (IDT) in memory. + For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes + immediately preceding the Interrupt Descriptor Table (IDT) in memory. + For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer + is stored in a dedicated CPU register. This means that there is no + memory storage associated with storing the PEI Services Table pointer, + so no additional migration actions are required for Itanium, ARM and + LoongArch CPUs. + +**/ +VOID +EFIAPI +MigratePeiServicesTablePointer ( + VOID + ) +{ + return; +} diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP= ointerLibKs0.inf b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServices= TablePointerLibKs0.inf new file mode 100644 index 0000000000..e8ecd4616d --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerL= ibKs0.inf @@ -0,0 +1,37 @@ +## @file +# Instance of PEI Services Table Pointer Library using register CSR KS0 fo= r the table pointer. +# +# PEI Services Table Pointer Library implementation that retrieves a point= er to the +# PEI Services Table from a CPU register. Applies to modules that execute = from +# read-only memory. +# +# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.
+# Copyright (c) 2023 Loongson Technology Corporation Limited. All rights r= eserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +# +## + +[Defines] + INF_VERSION =3D 1.29 + BASE_NAME =3D PeiServicesTablePointerLib + MODULE_UNI_FILE =3D PeiServicesTablePointerLibKs0.uni + FILE_GUID =3D 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7 + MODULE_TYPE =3D PEIM + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PeiServicesTablePointerLib|PEIM PEI_C= ORE SEC + +# +# VALID_ARCHITECTURES =3D LOONGARCH64 +# + +[Sources] + PeiServicesTablePointer.c + +[Packages] + MdePkg/MdePkg.dec + +[LibraryClasses] + DebugLib diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP= ointerLibKs0.uni b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServices= TablePointerLibKs0.uni new file mode 100644 index 0000000000..2539448ce5 --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerL= ibKs0.uni @@ -0,0 +1,20 @@ +// /** @file +// Instance of PEI Services Table Pointer Library using register CSR KS0 f= or the table pointer. +// +// PEI Services Table Pointer Library implementation that retrieves a poin= ter to the +// PEI Services Table from a CPU register. Applies to modules that execute= from +// read-only memory. +// +// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+// Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.
+// Copyright (c) 2023 Loongson Technology Corporation Limited. All rights = reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + + +#string STR_MODULE_ABSTRACT #language en-US "Instance of PEI S= ervices Table Pointer Library using CPU register for the table pointer" + +#string STR_MODULE_DESCRIPTION #language en-US "The PEI Services = Table Pointer Library implementation that retrieves a pointer to the PEI Se= rvices Table from a CPU register. Applies to modules that execute from read= -only memory." + diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc index 3abd1a1e23..109224c527 100644 --- a/MdePkg/MdePkg.dsc +++ b/MdePkg/MdePkg.dsc @@ -200,4 +200,7 @@ MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib= .inf MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib= Ram.inf =20 +[Components.LOONGARCH64] + MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibK= s0.inf + [BuildOptions] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112728): https://edk2.groups.io/g/devel/message/112728 Mute This Topic: https://groups.io/mt/103261739/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- ------=_NextPart_000_00F5_01DA32BF.5A990110 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Chao:

=C2=A0I= s there a branch or pull request for this patch set? I would like to check = how this new library instance be used.

 

Thanks

Liming

=E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io <devel@edk2.groups.io> =E4=BB=A3=E8= =A1=A8 Chao Li
=E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2023=E5=B9=B412=E6=9C= =8819=E6=97=A5 21:01
=E6=94=B6=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io; Michael D Kinney <michael.d.kinney@intel.co= m>; Liming Gao <gaoliming@byosoft.com.cn>
=E6=8A=84= =E9=80=81: Zhiguang Liu &l= t;zhiguang.liu@intel.com>; Laszlo Ersek <lersek@redhat.com>
=E4=B8=BB=E9=A2=98:= Re: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library named PeiServi= cesTablePointerLibKs0

 

Hi Mike and Liming,<= o:p>

Can you please review this patch? Thank you!

 

Thanks,
Chao

=

On 2023/12/12 21:11, Chao Li w= rote:

Adding PeiServicesTablePointerLibK=
s0 for LoongArch64, which provides
setting and getting the PEI service table pointer through the CSR =
KS0
register.
 
The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/
 
=
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4584
 
<=
pre>Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
=
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Laszlo Ersek <lersek@=
redhat.com>
Signed-of=
f-by: Chao Li <lichao@loongson.cn&=
gt;
---
 .../Library/PeiServicesTablePointerLib.h=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 9 +-
 .../PeiServicesTablePointer.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 87 +++=
++++++++++++++++
 .../PeiSer=
vicesTablePointerLibKs0.inf=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
 | 37 ++++++++
 .../PeiServi=
cesTablePointerLibKs0.uni=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=
 20 +++++
 MdePkg/MdePkg.dsc=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0 |=C2=A0 3 +
 5 files changed, 152 insertions(+), 4 deletions(-)
 create mode 100644 MdePkg/Library/PeiServicesTa=
blePointerLibKs0/PeiServicesTablePointer.c
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLi=
bKs0/PeiServicesTablePointerLibKs0.inf
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0=
/PeiServicesTablePointerLibKs0.uni
 
diff --git a=
/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/Include/Libra=
ry/PeiServicesTablePointerLib.h
index 61635eff00..f85c38363c 100644
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h<=
/o:p>
+++ b/MdePkg/Include/Library/PeiS=
ervicesTablePointerLib.h
@@ =
-52,10 +52,11 @@ SetPeiServicesTablePointer (
<=
span lang=3DEN-US>=C2=A0=C2=A0 immediately preceding the Interrupt Descript=
or Table (IDT) in memory.
=
=C2=A0=C2=A0 For X64 CPUs, the PEI Services Table pointer is stored in the =
8 bytes
=C2=A0=C2=A0 immedia=
tely preceding the Interrupt Descriptor Table (IDT) in memory.
-=C2=A0 For Itanium and ARM CPUs, a the =
PEI Services Table Pointer is stored in
-=C2=A0 a dedicated CPU register.=C2=A0 This means that there i=
s no memory storage
-=C2=A0 =
associated with storing the PEI Services Table pointer, so no additional
-=C2=A0 migration actions are =
required for Itanium or ARM CPUs.
+=C2=A0 For Itanium, ARM and LoongArch CPUs, a the PEI Services Table=
 Pointer
+=C2=A0 is stored i=
n a dedicated CPU register.=C2=A0 This means that there is no
+=C2=A0 memory storage associated with st=
oring the PEI Services Table pointer,
+=C2=A0 so no additional migration actions are required for Itani=
um, ARM and
+=C2=A0 LoongArc=
h CPUs.
 <=
/pre>
=C2=A0**/
 VOID
diff --git =
a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c b/=
MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c=

new file mode 100644<=
/span>
index 0000000000..2560b232f9=

--- /dev/null
<=
pre>+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/P=
eiServicesTablePointer.c
@@ =
-0,0 +1,87 @@
+/** @file
+=C2=A0 PEI Services Table Poin=
ter Library For Reigseter Mechanism.
+
+=C2=A0 This libr=
ary is used for PEIM which does executed from flash device directly but
+=C2=A0 executed in memory.
+
<=
span lang=3DEN-US>+=C2=A0 Copyright (c) 2006 - 2010, Intel Corporation. All=
 rights reserved.<BR>
=
+=C2=A0 Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved=
.<BR>
+=C2=A0 Copyrigh=
t (c) 2023 Loongson Technology Corporation Limited. All rights reserved.<=
;BR>
+<=
/pre>
+=C2=A0 SPDX-License-Identifier: BSD-2-Clause-=
Patent
+
+**/
+
+#include <PiPei.h=
>
+#include <Library/D=
ebugLib.h>
+#include <=
Library/PeiServicesTablePointerLib.h>
+#include <Register/LoongArch64/Csr.h>=

+
+/**
+=C2=A0 Caches a po=
inter PEI Services Table.
+<=
o:p>
+=C2=A0 Caches the pointer t=
o the PEI Services Table specified by PeiServicesTablePointer
+=C2=A0 in a platform specific manner.
+
=
+=C2=A0 If PeiServicesTablePointer is NULL, then ASSERT(=
).
+
=

+=C2=A0 @param=C2=A0=C2=A0=C2=A0 PeiServicesTablePo=
inter=C2=A0=C2=A0 The address of PeiServices pointer.
+**/
+VOID
+EFIAPI<=
/span>
+SetPeiServicesTablePointer (
+=C2=A0 IN CONST EFI_PEI_SERVICES=C2=
=A0 **PeiServicesTablePointer
+=C2=A0 )
+{
+=C2=A0 ASSERT (PeiServicesTablePointer !=
=3D NULL);
+=C2=A0 CsrWrite =
(LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer);
+}
=
+
+/**
+=C2=A0 Retrieves the cached value of the PEI Ser=
vices Table pointer.
+<=
/o:p>
+=C2=A0 Returns the cached value =
of the PEI Services Table pointer in a CPU specific manner
+=C2=A0 as specified in the CPU binding sect=
ion of the Platform Initialization Pre-EFI
+=C2=A0 Initialization Core Interface Specification.
+
+=C2=A0 If the cached PEI Services Table pointer is NULL, the=
n ASSERT().
+
+=C2=A0 @return=C2=A0 The pointer to PeiSe=
rvices.
+<=
/pre>
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServices=
TablePointer (
+=C2=A0 VOID<=
o:p>
+=C2=A0 )<=
/pre>
+{
+=C2=A0 CONST EFI_PEI_SERVICES=C2=A0 **PeiServices;
+
+=C2=A0 PeiServices =3D (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CS=
R_KS0));
+=C2=A0 ASSERT (Pei=
Services !=3D NULL);
+=C2=A0=
 return PeiServices;
+}=

+
+/**
+=C2=
=A0 Perform CPU specific actions required to migrate the PEI Services Table=

+=C2=A0 pointer from tempor=
ary RAM to permanent RAM.
+<=
o:p>
+=C2=A0 For IA32 CPUs, the P=
EI Services Table pointer is stored in the 4 bytes
<=
pre>+=C2=A0 immediately preceding the Interrupt Descript=
or Table (IDT) in memory.
+=
=C2=A0 For X64 CPUs, the PEI Services Table pointer is stored in the 8 byte=
s
+=C2=A0 immediately preced=
ing the Interrupt Descriptor Table (IDT) in memory.
=

+=C2=A0 For Itanium, ARM and LoongArch CPUs, a the =
PEI Services Table Pointer
+=
=C2=A0 is stored in a dedicated CPU register.=C2=A0 This means that there i=
s no
+=C2=A0 memory storage =
associated with storing the PEI Services Table pointer,
+=C2=A0 so no additional migration actions are =
required for Itanium, ARM and
+=C2=A0 LoongArch CPUs.
+<=
o:p>
+**/
=

+VOID
+EFIAPI
+MigratePeiService=
sTablePointer (
+=C2=A0 VOID=

+=C2=A0 )=

+{
+=C2=A0 return;
+}=

diff --git a/MdePkg/Library/PeiS=
ervicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf b/MdePkg/Librar=
y/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
new file mode 100644
index 0000000000..e8ecd4616d
--- /dev/null
<=
span lang=3DEN-US>+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiSer=
vicesTablePointerLibKs0.inf
=
@@ -0,0 +1,37 @@
+## @file
+# Instance of PEI Services T=
able Pointer Library using register CSR KS0 for the table pointer.
+#
+# PEI Services Table Pointer Library implementation that ret=
rieves a pointer to the
+# P=
EI Services Table from a CPU register. Applies to modules that execute from=

+# read-only memory.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights=
 reserved.<BR>
+# Copy=
right (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR><=
o:p>
+# Copyright (c) 2023 Loongs=
on Technology Corporation Limited. All rights reserved.<BR>
+#
+#=C2=A0 SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+=
=C2=A0 INF_VERSION=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D 1.29
+=C2=A0 BASE_NAME=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D PeiServicesTablePointerLib=

+=C2=A0 MODULE_UNI_FILE=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
 =3D PeiServicesTablePointerLibKs0.uni
+=C2=A0 FILE_GUID=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0 =3D 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7
+=C2=A0 MODULE_TYPE=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0 =3D PEIM
+=C2=A0 VERSION=
_STRING=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D 1.0
+=C2=A0 LIBRARY_CLASS=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D PeiService=
sTablePointerLib|PEIM PEI_CORE SEC
+
+#
+#=C2=A0 VALID_ARCHITECTURES=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D LOONGARCH64=

+#
+
+[Sources]
+=C2=A0 PeiServicesTablePointer=
.c
+
=

+[Packages]
+=C2=A0 MdePkg/MdePkg.dec
+
+[LibraryClasses]=

+=C2=A0 DebugLib=

diff --git a/MdePkg/Library/PeiService=
sTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni b/MdePkg/Library/PeiS=
ervicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
new file mode 100644
index 0000000000..2539448ce5
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesT=
ablePointerLibKs0.uni
@@ -0,=
0 +1,20 @@
+// /** @file
+// Instance of PEI Services Ta=
ble Pointer Library using register CSR KS0 for the table pointer.
+//
+// PEI Services Table Pointer Library implementation that re=
trieves a pointer to the
+//=
 PEI Services Table from a CPU register. Applies to modules that execute fr=
om
+// read-only memory.
+//
+// Copyright (c) 2007 - 2018, Intel Corporation. All r=
ights reserved.<BR>
+/=
/ Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<B=
R>
+// Copyright (c) 2023=
 Loongson Technology Corporation Limited. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent<=
/o:p>
+//
<=
span lang=3DEN-US>+// **/
+<=
o:p>
+
+#string STR_MODULE_ABSTRACT=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #language en-US "Inst=
ance of PEI Services Table Pointer Library using CPU register for the table=
 pointer"
+<=
/span>
+#string STR_MODULE_DESCRIPTION=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #language en-US "The =
PEI Services Table Pointer Library implementation that retrieves a pointer =
to the PEI Services Table from a CPU register. Applies to modules that exec=
ute from read-only memory."
+
diff --git a/MdePkg/M=
dePkg.dsc b/MdePkg/MdePkg.dsc
index 3abd1a1e23..109224c527 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -200,4 +200,7 @@
=C2=A0=
=C2=A0 MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSb=
iLib.inf
=C2=A0=C2=A0 MdePkg=
/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLibRam.inf
 
+[Components.LOONGARCH64]
<=
span lang=3DEN-US>+=C2=A0 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiS=
ervicesTablePointerLibKs0.inf
+
 [BuildOptions]

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