From nobody Mon Apr 29 02:54:48 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) client-ip=80.81.252.135; envelope-from=seabios-bounces@seabios.org; helo=mail.coreboot.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org; Return-Path: Received: from mail.coreboot.org (mail.coreboot.org [80.81.252.135]) by mx.zohomail.com with SMTPS id 1486314625237746.8683494346474; Sun, 5 Feb 2017 09:10:25 -0800 (PST) Received: from [127.0.0.1] (helo=ra.coresystems.de) by mail.coreboot.org with esmtp (Exim 4.86_2) (envelope-from ) id 1caQK6-0000uO-F6; Sun, 05 Feb 2017 18:09:58 +0100 Received: from mail-it0-f50.google.com ([209.85.214.50]) by mail.coreboot.org with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86_2) (envelope-from ) id 1caQJx-0000pi-EU for seabios@seabios.org; Sun, 05 Feb 2017 18:09:56 +0100 Received: by mail-it0-f50.google.com with SMTP id c7so43566311itd.1 for ; Sun, 05 Feb 2017 09:09:49 -0800 (PST) Received: from Arrow.corp.skyportsystems.com (76-236-31-201.lightspeed.sntcca.sbcglobal.net. [76.236.31.201]) by smtp.gmail.com with ESMTPSA id c100sm2776135itd.20.2017.02.05.09.09.46 (version=TLS1 cipher=AES128-SHA bits=128/128); Sun, 05 Feb 2017 09:09:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=skyportsystems.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=9rAsWfryfiRutXxYuyuMn4dQH7nkYZ5S1Rehhi8cUZw=; b=duAHa2vORSj8NXAWYBsRo7uAeNjZMOxkbm3B+Ql3ccS1t9m8VLJmaGiUu5VCz3XlqF NW+9KhPwALp4uqJkfcDbLNrVO5/2CT4+tlggRC4wj4nzJIiaDXrrxMfFgMTD8KAlHPGi tG0zHHJYuvmecsLAs3KcWOuzWBAaPUALmGXSE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=9rAsWfryfiRutXxYuyuMn4dQH7nkYZ5S1Rehhi8cUZw=; b=NOUOMb5bDkfM11+1iJU9Jr37tqP7WyO6mMLyDMg3K6X5jh7WM8k7wxQuSq4yrsySBG RSZfSZ1HkqNP8waq6RFKcJDBxt2vGMELM/LhthRfywXkEMbnb80mWkV1cYVs2+iy9l0T L/bJw31cKIycFjIpu6QWO4U3J90Nv7v/pQcAx1MW0FsApygTpEGZCH02L9FNGMkK1rth qkXzeuvhJDCpCnvs4BE4wdCPEqhyJmibYYoMN4R6lE74+yXICEqVTJxbaNwJWTzkzeJi qOK4J+a8qUKJ/J5Qf4lHae76j5+lq05/WoZxP26w6bqR8ClgZK+uPJ9k4os6LoOcbsF3 5NEQ== X-Gm-Message-State: AIkVDXLlx7+n8B1fcH/HROAzBtbxy1iNYtuTyPh94l+AgOb3Umf+nPluExMiDzRVRvJ4F9th X-Received: by 10.36.68.17 with SMTP id o17mr4398752ita.62.1486314587209; Sun, 05 Feb 2017 09:09:47 -0800 (PST) From: ben@skyportsystems.com To: seabios@seabios.org Date: Sun, 5 Feb 2017 09:09:29 -0800 Message-Id: X-Mailer: git-send-email 2.10.1 (Apple Git-78) In-Reply-To: References: In-Reply-To: References: X-Spam-Score: -1.0 (-) Subject: [SeaBIOS] [PATCH v3 1/2] QEMU DMA: Add DMA write capability X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Ben Warren This allows BIOS to write data back to QEMU using the DMA interface and provides a higher-level abstraction to write to a fw_cfg file Signed-off-by: Ben Warren --- src/fw/paravirt.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ src/fw/paravirt.h | 3 +++ 2 files changed, 52 insertions(+) diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c index 6de70f6..75cb992 100644 --- a/src/fw/paravirt.c +++ b/src/fw/paravirt.c @@ -253,6 +253,20 @@ qemu_cfg_read(void *buf, int len) } =20 static void +qemu_cfg_write(void *buf, int len) +{ + if (len =3D=3D 0) { + return; + } + + if (qemu_cfg_dma_enabled()) { + qemu_cfg_dma_transfer(buf, len, QEMU_CFG_DMA_CTL_WRITE); + } else { + warn_internalerror(); + } +} + +static void qemu_cfg_skip(int len) { if (len =3D=3D 0) { @@ -280,6 +294,18 @@ qemu_cfg_read_entry(void *buf, int e, int len) } } =20 +static void +qemu_cfg_write_entry(void *buf, int e, int len) +{ + if (qemu_cfg_dma_enabled()) { + u32 control =3D (e << 16) | QEMU_CFG_DMA_CTL_SELECT + | QEMU_CFG_DMA_CTL_WRITE; + qemu_cfg_dma_transfer(buf, len, control); + } else { + warn_internalerror(); + } +} + struct qemu_romfile_s { struct romfile_s file; int select, skip; @@ -303,6 +329,29 @@ qemu_cfg_read_file(struct romfile_s *file, void *dst, = u32 maxlen) return file->size; } =20 +int +qemu_cfg_write_file(void *src, struct romfile_s *file, u32 offset, u32 len) +{ + if ((file->size + offset) < len) + return -1; + + if (!qemu_cfg_dma_enabled() || (file->copy !=3D qemu_cfg_read_file)) { + warn_internalerror(); + return -1; + } + struct qemu_romfile_s *qfile; + qfile =3D container_of(file, struct qemu_romfile_s, file); + if (offset =3D=3D 0) { + /* Do it in one transfer */ + qemu_cfg_write_entry(src, qfile->select, len); + } else { + qemu_cfg_select(qfile->select); + qemu_cfg_skip(offset); + qemu_cfg_write(src, len); + } + return len; +} + static void qemu_romfile_add(char *name, int select, int skip, int size) { diff --git a/src/fw/paravirt.h b/src/fw/paravirt.h index d8eb7c4..fb220d8 100644 --- a/src/fw/paravirt.h +++ b/src/fw/paravirt.h @@ -3,6 +3,7 @@ =20 #include "config.h" // CONFIG_* #include "biosvar.h" // GET_GLOBAL +#include "romfile.h" // struct romfile_s =20 // Types of paravirtualized platforms. #define PF_QEMU (1<<0) @@ -43,6 +44,7 @@ static inline int runningOnKVM(void) { #define QEMU_CFG_DMA_CTL_READ 0x02 #define QEMU_CFG_DMA_CTL_SKIP 0x04 #define QEMU_CFG_DMA_CTL_SELECT 0x08 +#define QEMU_CFG_DMA_CTL_WRITE 0x10 =20 // QEMU_CFG_DMA ID bit #define QEMU_CFG_VERSION_DMA 2 @@ -53,5 +55,6 @@ void qemu_platform_setup(void); void qemu_cfg_init(void); =20 u16 qemu_get_present_cpus_count(void); +int qemu_cfg_write_file(void *src, struct romfile_s *file, u32 offset, u32= len); =20 #endif --=20 2.7.4 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://www.coreboot.org/mailman/listinfo/seabios From nobody Mon Apr 29 02:54:48 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) client-ip=80.81.252.135; envelope-from=seabios-bounces@seabios.org; helo=mail.coreboot.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org; Return-Path: Received: from mail.coreboot.org (mail.coreboot.org [80.81.252.135]) by mx.zohomail.com with SMTPS id 1486314627313603.7252375051656; Sun, 5 Feb 2017 09:10:27 -0800 (PST) Received: from [127.0.0.1] (helo=ra.coresystems.de) by mail.coreboot.org with esmtp (Exim 4.86_2) (envelope-from ) id 1caQKC-0000vs-2J; Sun, 05 Feb 2017 18:10:04 +0100 Received: from mail-it0-f48.google.com ([209.85.214.48]) by mail.coreboot.org with esmtps (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.86_2) (envelope-from ) id 1caQJy-0000tt-PN for seabios@seabios.org; Sun, 05 Feb 2017 18:10:02 +0100 Received: by mail-it0-f48.google.com with SMTP id k200so17342328itb.1 for ; Sun, 05 Feb 2017 09:09:50 -0800 (PST) Received: from Arrow.corp.skyportsystems.com (76-236-31-201.lightspeed.sntcca.sbcglobal.net. [76.236.31.201]) by smtp.gmail.com with ESMTPSA id c100sm2776135itd.20.2017.02.05.09.09.47 (version=TLS1 cipher=AES128-SHA bits=128/128); Sun, 05 Feb 2017 09:09:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=skyportsystems.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=DKjgMH4ecN3008ln7kBPUMuWI2bwG4OasWzQlbYM/L0=; b=RTj5JcRaQWeFu6ud/hCwg8l8BjHlbNgBw+HEQeP8Um1DNvzT26MSRgKo/P1fW2jEsP 4eZ1ahcXtTIyuRL9IcBkW7TaKa2qAKQg5xcb5wH9uJRp6beFj/EgrNxZgKKAlj+akixL blgc7XWkUTxcTFwAOreGJUcbUo8hhuIFS9CIw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=DKjgMH4ecN3008ln7kBPUMuWI2bwG4OasWzQlbYM/L0=; b=ezxkhrXlmzw2QeNhtirNTExZ0kBLF7cp7PyVKL/jW9vWWDE4WriJRO8DM7oz/rJ9TN bXYjSZ662tJRFHrxBOtrstPKIPMamzBQRsADG2r8Ot+Ujww23cDdQi0tui7K1O1hQFs1 aMOSpWu5R7HjHiEENHVLLtvku4oRCXswqO6VqqU8XSvJYZZ2ZfP7aFyNzNuV5duySDDj IPgqKcmmnBCPj+TPSS8B0Ya/YxtZ5lTgm74PuDGjV2gTqX1Qi9mpNtybV2SgrB4E8HoZ Rl1iWf7KVfogrxdqxfAepiS2dlpZwgwxPFGbkGKMIgGh5yMZrQNAl/oWgkks0aDZAvgY UjIg== X-Gm-Message-State: AIkVDXJ1oLcfXUdRckQYJMGue4m8V+YKQuNz/SVzBWJwBX+TaFmJa71UfRJrrVxVawXZZQ1o X-Received: by 10.36.217.144 with SMTP id p138mr4322150itg.96.1486314588446; Sun, 05 Feb 2017 09:09:48 -0800 (PST) From: ben@skyportsystems.com To: seabios@seabios.org Date: Sun, 5 Feb 2017 09:09:30 -0800 Message-Id: <20d990d5d24f4ab4c8cdb1808c3f39af6824877a.1486313551.git.ben@skyportsystems.com> X-Mailer: git-send-email 2.10.1 (Apple Git-78) In-Reply-To: References: In-Reply-To: References: X-Spam-Score: -0.3 (/) Subject: [SeaBIOS] [PATCH v3 2/2] QEMU fw_cfg: Add command to write back address of file X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Ben Warren This command is similar to ADD_POINTER, but instead of patching memory, it writes the pointer back to QEMU over the DMA interface. Signed-off-by: Ben Warren --- src/fw/romfile_loader.c | 37 +++++++++++++++++++++++++++++++++++++ src/fw/romfile_loader.h | 16 ++++++++++------ 2 files changed, 47 insertions(+), 6 deletions(-) diff --git a/src/fw/romfile_loader.c b/src/fw/romfile_loader.c index f4b17ff..d0ae42b 100644 --- a/src/fw/romfile_loader.c +++ b/src/fw/romfile_loader.c @@ -5,6 +5,7 @@ #include "romfile.h" // struct romfile_s #include "malloc.h" // Zone*, _malloc #include "output.h" // warn_* +#include "paravirt.h" // qemu_cfg_write_file =20 struct romfile_loader_file { struct romfile_s *file; @@ -98,7 +99,39 @@ static void romfile_loader_add_pointer(struct romfile_lo= ader_entry_s *entry, pointer +=3D (unsigned long)src_file->data; pointer =3D cpu_to_le64(pointer); memcpy(dest_file->data + offset, &pointer, entry->pointer_size); + return; +err: + warn_internalerror(); +} + +static void romfile_loader_write_pointer(struct romfile_loader_entry_s *en= try, + struct romfile_loader_files *files) +{ + struct romfile_s *dest_file; + struct romfile_loader_file *src_file; + unsigned offset =3D le32_to_cpu(entry->pointer_offset); + u64 pointer =3D 0; + + /* Writing back to a file that may not be loaded in RAM */ + dest_file =3D romfile_find(entry->pointer_dest_file); + src_file =3D romfile_loader_find(entry->pointer_src_file, files); =20 + if (!dest_file || !src_file || !src_file->data || + offset + entry->pointer_size < offset || + offset + entry->pointer_size > dest_file->size || + entry->pointer_size < 1 || entry->pointer_size > 8 || + entry->pointer_size & (entry->pointer_size - 1)) { + goto err; + } + + pointer =3D (unsigned long)src_file->data; + pointer =3D cpu_to_le64(pointer); + + /* Only supported on QEMU */ + if (qemu_cfg_write_file(&pointer, dest_file, offset, + entry->pointer_size) !=3D entry->pointer_size)= { + goto err; + } return; err: warn_internalerror(); @@ -161,6 +194,10 @@ int romfile_loader_execute(const char *name) break; case ROMFILE_LOADER_COMMAND_ADD_CHECKSUM: romfile_loader_add_checksum(entry, files); + break; + case ROMFILE_LOADER_COMMAND_WRITE_POINTER: + romfile_loader_write_pointer(entry, files); + break; default: /* Skip commands that we don't recognize. */ break; diff --git a/src/fw/romfile_loader.h b/src/fw/romfile_loader.h index 15eab2a..0c0782c 100644 --- a/src/fw/romfile_loader.h +++ b/src/fw/romfile_loader.h @@ -25,10 +25,13 @@ struct romfile_loader_entry_s { }; =20 /* - * COMMAND_ADD_POINTER - patch the table (originating from - * @dest_file) at @pointer_offset, by adding a pointer to the table + * COMMAND_ADD_POINTER & + * COMMAND_WRITE_POINTER - patch memory (originating from + * @dest_file) at @pointer.offset, by adding a pointer to the memo= ry * originating from @src_file. 1,2,4 or 8 byte unsigned - * addition is used depending on @pointer_size. + * addition is used depending on @pointer.size. + * Instead of patching memory, COMMAND_WRITE_POINTER writes the ch= anges + * to @dest_file back to the host via DMA */ struct { char pointer_dest_file[ROMFILE_LOADER_FILESZ]; @@ -57,9 +60,10 @@ struct romfile_loader_entry_s { }; =20 enum { - ROMFILE_LOADER_COMMAND_ALLOCATE =3D 0x1, - ROMFILE_LOADER_COMMAND_ADD_POINTER =3D 0x2, - ROMFILE_LOADER_COMMAND_ADD_CHECKSUM =3D 0x3, + ROMFILE_LOADER_COMMAND_ALLOCATE =3D 0x1, + ROMFILE_LOADER_COMMAND_ADD_POINTER =3D 0x2, + ROMFILE_LOADER_COMMAND_ADD_CHECKSUM =3D 0x3, + ROMFILE_LOADER_COMMAND_WRITE_POINTER =3D 0x4, }; =20 enum { --=20 2.7.4 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://www.coreboot.org/mailman/listinfo/seabios