From nobody Tue May 14 18:37:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) client-ip=78.46.105.101; envelope-from=seabios-bounces@seabios.org; helo=coreboot.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail(p=none dis=none) header.from=koconnor.net Return-Path: Received: from coreboot.org (coreboot.org [78.46.105.101]) by mx.zohomail.com with SMTPS id 1699635927738918.4309504838081; Fri, 10 Nov 2023 09:05:27 -0800 (PST) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTPA id 453F524094; Fri, 10 Nov 2023 17:05:23 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTP id 5676124058 for ; Fri, 10 Nov 2023 17:05:06 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) for ; Fri, 10 Nov 2023 09:05:06 -0800 (PST) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by smtp.gmail.com with ESMTPSA id h6-20020ac85686000000b0041818df8a0dsm2909785qta.36.2023.11.10.09.05.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Nov 2023 09:05:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=koconnor.net; s=google; t=1699635905; x=1700240705; darn=seabios.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=Bwh3BGIGBAH45Tbe+acgCu7li5SjWHmyNADyZQRg2mQ=; b=T69eFn1VZDjLZRD8D0IDCrEuYto/5GC84OIekLiExWBX5WTzVNq6/QkXx0YSiU0d6P xgytC8od9W8b2EZSoNZffB71nMMOkjd+2Oi/DlTh+tZ7BKU9u0nz/cdmKbyfY/KIk4Sm 6s4wVpERPhNsK4LWQL/+Jzoxvrd9MFT8rCd8k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699635905; x=1700240705; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=Bwh3BGIGBAH45Tbe+acgCu7li5SjWHmyNADyZQRg2mQ=; b=UIx1Q7AF1D8A2c6Jc5KiGExHi7PPyPqG+4H5JrRCVMbAUKfjqR8UV+47eRPtz/x8Fq NWLEaL0zjLiYMxEPS89nD9mrQ/PmW7IYi6+IUApxGvHWo4NPwtPdzegzz/zde/1p67R/ Xu/YzWp35veHs7WCOCQezu2x8VQEgbv/2Cnmt8lvAQI4hPrAWCkutliomahvQkX++d88 qpkbAXVfmkNVbJ+AjW5cqoovD5D/M5FWPdcNisx+5jCjkpKg2w69WonJZEKPG1GLAPxy NNXlsnvRoqSWqvz+2TfIRd2e/uxIc4CZpyuKEybY3T6TA0DMyJiNBCQdTMppBSx6Ce3p qdhw== X-Gm-Message-State: AOJu0YwlvcyVYXmarjP5enxJSzDEEpbxns3SoWqnxRrNJduG5Wtu8qES m4cPVfkXx8S5qqpApdS43s9DNQ== X-Google-Smtp-Source: AGHT+IG8/chLjso3Q+5AiZ2LJUiTtOrTNGdxuP4MAAJtYdkPLOaI51QRJAP8s98OcCamYclwzyVmvg== X-Received: by 2002:a05:622a:6:b0:421:bbb8:e70b with SMTP id x6-20020a05622a000600b00421bbb8e70bmr749858qtw.27.1699635905025; Fri, 10 Nov 2023 09:05:05 -0800 (PST) Date: Fri, 10 Nov 2023 12:05:03 -0500 From: Kevin O'Connor To: Gerd Hoffmann Message-ID: References: <20231107130309.3257776-1-kraxel@redhat.com> <59437ef3-7b94-2aa4-31b4-012412ce160b@suse.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Message-ID-Hash: 5T4XY4HV4SSRXWGKSMRIEEO5U6O7IYRJ X-Message-ID-Hash: 5T4XY4HV4SSRXWGKSMRIEEO5U6O7IYRJ X-MailFrom: kevin@koconnor.net X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Claudio Fontana , Peter Maydell , Paolo Bonzini , seabios@seabios.org, qemu-devel@nongnu.org X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [SeaBIOS] Re: [PATCH v5] limit physical address space size List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-Spamd-Bar: --- X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1699635928486100001 Content-Type: text/plain; charset="utf-8" On Fri, Nov 10, 2023 at 11:44:48AM -0500, Kevin O'Connor wrote: > On Fri, Nov 10, 2023 at 12:04:24PM +0100, Gerd Hoffmann wrote: > > - if (CPUPhysBits) { > > - u64 top =3D 1LL << CPUPhysBits; > > + if (pci_phys_bits) { >=20 > FYI, this is a change in behavior - previously this condition would > have been taken even if CPULongMode or RamSizeOver4G is false. I'm > not sure if this change is intentional. (My example patch below > follows your lead here.) >=20 On closer inspection, I think this change in behavior was not intended. How about variable names like the below instead. -Kevin diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index c7084f5..6b13cd5 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -46,12 +46,16 @@ static const char *region_type_name[] =3D { [ PCI_REGION_TYPE_PREFMEM ] =3D "prefmem", }; =20 +// Memory ranges exported to legacy ACPI type table generation u64 pcimem_start =3D BUILD_PCIMEM_START; u64 pcimem_end =3D BUILD_PCIMEM_END; u64 pcimem64_start =3D BUILD_PCIMEM64_START; u64 pcimem64_end =3D BUILD_PCIMEM64_END; -u64 pci_io_low_end =3D 0xa000; -u32 pci_use_64bit =3D 0; + +// Resource allocation limits +static u64 pci_io_low_end =3D 0xa000; +static u64 pci_mem64_top =3D 0; +static u32 pci_pad_mem64 =3D 0; =20 struct pci_region_entry { struct pci_device *dev; @@ -966,8 +970,9 @@ static int pci_bios_check_devices(struct pci_bus *busse= s) int resource_optional =3D 0; if (hotplug_support =3D=3D HOTPLUG_PCIE) resource_optional =3D pcie_cap && (type =3D=3D PCI_REGION_= TYPE_IO); - if (hotplug_support && pci_use_64bit && is64 && (type =3D=3D P= CI_REGION_TYPE_PREFMEM)) - align =3D (u64)1 << (CPUPhysBits - 11); + if (hotplug_support && pci_pad_mem64 && is64 + && (type =3D=3D PCI_REGION_TYPE_PREFMEM)) + align =3D pci_mem64_top >> 11; if (align > sum && hotplug_support && !resource_optional) sum =3D align; /* reserve min size for hot-plug */ if (size > sum) { @@ -1111,7 +1116,7 @@ static void pci_bios_map_devices(struct pci_bus *buss= es) panic("PCI: out of I/O address space\n"); =20 dprintf(1, "PCI: 32: %016llx - %016llx\n", pcimem_start, pcimem_end); - if (pci_use_64bit || pci_bios_init_root_regions_mem(busses)) { + if (pci_pad_mem64 || pci_bios_init_root_regions_mem(busses)) { struct pci_region r64_mem, r64_pref; r64_mem.list.first =3D NULL; r64_pref.list.first =3D NULL; @@ -1131,14 +1136,13 @@ static void pci_bios_map_devices(struct pci_bus *bu= sses) r64_mem.base =3D le64_to_cpu(romfile_loadint("etc/reserved-memory-= end", 0)); if (r64_mem.base < 0x100000000LL + RamSizeOver4G) r64_mem.base =3D 0x100000000LL + RamSizeOver4G; - if (CPUPhysBits) { - u64 top =3D 1LL << CPUPhysBits; + if (pci_mem64_top) { u64 size =3D (ALIGN(sum_mem, (1LL<<30)) + ALIGN(sum_pref, (1LL<<30))); - if (pci_use_64bit) - size =3D ALIGN(size, (1LL<<(CPUPhysBits-3))); - if (r64_mem.base < top - size) { - r64_mem.base =3D top - size; + if (pci_pad_mem64) + size =3D ALIGN(size, pci_mem64_top >> 3); + if (r64_mem.base < pci_mem64_top - size) { + r64_mem.base =3D pci_mem64_top - size; } if (e820_is_used(r64_mem.base, size)) r64_mem.base -=3D size; @@ -1181,8 +1185,18 @@ pci_setup(void) =20 dprintf(3, "pci setup\n"); =20 + if (CPUPhysBits) { + pci_mem64_top =3D 1LL << CPUPhysBits; + if (CPUPhysBits > 46) { + // Old linux kernels have trouble dealing with more than 46 + // phys-bits, so avoid that for now. Seems to be a bug in the + // virtio-pci driver. Reported: centos-7, ubuntu-18.04 + pci_mem64_top =3D 1LL << 46; + } + } + if (CPUPhysBits >=3D 36 && CPULongMode && RamSizeOver4G) - pci_use_64bit =3D 1; + pci_pad_mem64 =3D 1; =20 dprintf(1, "=3D=3D=3D PCI bus & bridge init =3D=3D=3D\n"); if (pci_probe_host() !=3D 0) { _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org