From nobody Tue May 14 10:44:33 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) client-ip=78.46.105.101; envelope-from=seabios-bounces@seabios.org; helo=coreboot.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail(p=none dis=none) header.from=koconnor.net Return-Path: Received: from coreboot.org (coreboot.org [78.46.105.101]) by mx.zohomail.com with SMTPS id 1699634713537959.5058801881856; Fri, 10 Nov 2023 08:45:13 -0800 (PST) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTPA id 1450624091; Fri, 10 Nov 2023 16:45:07 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTP id 4050B2224E for ; Fri, 10 Nov 2023 16:44:51 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) for ; Fri, 10 Nov 2023 08:44:50 -0800 (PST) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by smtp.gmail.com with ESMTPSA id i4-20020a05620a0a0400b007757eddae8bsm803819qka.62.2023.11.10.08.44.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Nov 2023 08:44:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=koconnor.net; s=google; t=1699634689; x=1700239489; darn=seabios.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=zP7UhUYM+EQAVfTXC+oVS+BsNjuyUvHvyNAGZvlBBYM=; b=Nm2NNWf0r3kP8AjdMJAVvA6pHb1nxRMfH8eHcL1V8SlCX9Rwh3CQ3j0gC3VZRgCeWg NlHf/2Q+82KSuINm57ECN/ZsiYurhvpGNfNyilqfzprx/Y8JhsyZyobipJv+CjOTjAag fSqrvmS8W4+iPeMlob3nsNBUbvJnDPrlbmO0Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699634689; x=1700239489; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=zP7UhUYM+EQAVfTXC+oVS+BsNjuyUvHvyNAGZvlBBYM=; b=PYP2Rr0rm4GI8AEJVPyzMmS0hCv9d2iWHrP/yEjT71ERiBawqLaEd+hPzCCGH59o2F aJIqnZOZ4V6bXRnYj9Ig6K/BJ3D/VRafrkltQ0MvKjXxDJ0ifwjFwT/kW8HO4YVSDDqv xMbJjxVkUI2Nj7BSrek/ESO/a5L/09jFoBtjAM4at0NHHS1Wfh/joFCv7+ay2YF265um jiPA5P/snHrog1phBJx8/h9VXe0GZQVi6MFMa5/CZOEsIT7rPEl988XritWOu/MNY1jM ekDAbmRB5WTlbCl4227eAOs3yoiMoakIEvPeAvNAxpPHpxGCwCD5QMaTFZmj9QQameF7 6N0w== X-Gm-Message-State: AOJu0Yz+dVmm9h8IE3l8XsVNty8cwGgUdZv3/J6isRwkmEZBECPoQ10O 6HO4OBSPoAhJ070bj0hwVBBHxQ== X-Google-Smtp-Source: AGHT+IF6xIniB2kufPUdqOFVM6bLSEIVxzr/Noui/NMAQxmFb0SuapcxlD9V+oAWxVzfjp6ANgIbrA== X-Received: by 2002:a05:6871:4a02:b0:1bb:509a:824f with SMTP id tz2-20020a0568714a0200b001bb509a824fmr7313875oab.55.1699634689691; Fri, 10 Nov 2023 08:44:49 -0800 (PST) Date: Fri, 10 Nov 2023 11:44:48 -0500 From: Kevin O'Connor To: Gerd Hoffmann Message-ID: References: <20231107130309.3257776-1-kraxel@redhat.com> <59437ef3-7b94-2aa4-31b4-012412ce160b@suse.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Message-ID-Hash: PEKKI3GB5VPTKJO74IZNUZW3JJAKHCYV X-Message-ID-Hash: PEKKI3GB5VPTKJO74IZNUZW3JJAKHCYV X-MailFrom: kevin@koconnor.net X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Claudio Fontana , Peter Maydell , Paolo Bonzini , seabios@seabios.org, qemu-devel@nongnu.org X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [SeaBIOS] Re: [PATCH v5] limit physical address space size List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-Spamd-Bar: --- X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1699634714293100001 Content-Type: text/plain; charset="utf-8" On Fri, Nov 10, 2023 at 12:04:24PM +0100, Gerd Hoffmann wrote: > Hi, >=20 > > This only changes the placement of the PCI bars. The pci setup code is > > the only consumer of that variable, guess it makes sense to move the > > quirk to the pci code (as suggested by Kevin) to clarify this. >=20 > i.e. like this: >=20 > From d538dc7d4316e557ae302464252444d09de0681d Mon Sep 17 00:00:00 2001 > From: Gerd Hoffmann > Date: Tue, 7 Nov 2023 13:49:31 +0100 > Subject: [PATCH] limit physical address space size >=20 > For better compatibility with old linux kernels, > see source code comment. >=20 > Related (same problem in ovmf): > https://github.com/tianocore/edk2/commit/c1e853769046 >=20 > Reported-by: Claudio Fontana > Signed-off-by: Gerd Hoffmann > --- > src/fw/pciinit.c | 19 ++++++++++++++----- > 1 file changed, 14 insertions(+), 5 deletions(-) >=20 > diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c > index c7084f5e397e..7aeea61bfd05 100644 > --- a/src/fw/pciinit.c > +++ b/src/fw/pciinit.c > @@ -52,6 +52,7 @@ u64 pcimem64_start =3D BUILD_PCIMEM64_START; > u64 pcimem64_end =3D BUILD_PCIMEM64_END; > u64 pci_io_low_end =3D 0xa000; > u32 pci_use_64bit =3D 0; > +u32 pci_phys_bits =3D 0; FWIW, all these flags are getting a bit confusing. Maybe do something like the patch below. > =20 > struct pci_region_entry { > struct pci_device *dev; > @@ -967,7 +968,7 @@ static int pci_bios_check_devices(struct pci_bus *bus= ses) > if (hotplug_support =3D=3D HOTPLUG_PCIE) > resource_optional =3D pcie_cap && (type =3D=3D PCI_REGIO= N_TYPE_IO); > if (hotplug_support && pci_use_64bit && is64 && (type =3D=3D= PCI_REGION_TYPE_PREFMEM)) > - align =3D (u64)1 << (CPUPhysBits - 11); > + align =3D (u64)1 << (pci_phys_bits - 11); > if (align > sum && hotplug_support && !resource_optional) > sum =3D align; /* reserve min size for hot-plug */ > if (size > sum) { > @@ -1131,12 +1132,12 @@ static void pci_bios_map_devices(struct pci_bus *= busses) > r64_mem.base =3D le64_to_cpu(romfile_loadint("etc/reserved-memor= y-end", 0)); > if (r64_mem.base < 0x100000000LL + RamSizeOver4G) > r64_mem.base =3D 0x100000000LL + RamSizeOver4G; > - if (CPUPhysBits) { > - u64 top =3D 1LL << CPUPhysBits; > + if (pci_phys_bits) { FYI, this is a change in behavior - previously this condition would have been taken even if CPULongMode or RamSizeOver4G is false. I'm not sure if this change is intentional. (My example patch below follows your lead here.) > + u64 top =3D 1LL << pci_phys_bits; > u64 size =3D (ALIGN(sum_mem, (1LL<<30)) + > ALIGN(sum_pref, (1LL<<30))); > if (pci_use_64bit) > - size =3D ALIGN(size, (1LL<<(CPUPhysBits-3))); > + size =3D ALIGN(size, (1LL<<(pci_phys_bits-3))); > if (r64_mem.base < top - size) { > r64_mem.base =3D top - size; > } > @@ -1181,8 +1182,16 @@ pci_setup(void) > =20 > dprintf(3, "pci setup\n"); > =20 > - if (CPUPhysBits >=3D 36 && CPULongMode && RamSizeOver4G) > + if (CPUPhysBits >=3D 36 && CPULongMode && RamSizeOver4G) { > pci_use_64bit =3D 1; > + pci_phys_bits =3D CPUPhysBits; > + if (pci_phys_bits > 46) { > + // Old linux kernels have trouble dealing with more than 46 > + // phys-bits, so avoid that for now. Seems to be a bug in t= he > + // virtio-pci driver. Reported: centos-7, ubuntu-18.04 > + pci_phys_bits =3D 46; > + } > + } > =20 > dprintf(1, "=3D=3D=3D PCI bus & bridge init =3D=3D=3D\n"); > if (pci_probe_host() !=3D 0) { > --=20 > 2.41.0 > Possible alternate variable naming: diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index c7084f5..cd64d6e 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -46,12 +46,16 @@ static const char *region_type_name[] =3D { [ PCI_REGION_TYPE_PREFMEM ] =3D "prefmem", }; =20 +// Memory ranges exported to legacy ACPI type table generation u64 pcimem_start =3D BUILD_PCIMEM_START; u64 pcimem_end =3D BUILD_PCIMEM_END; u64 pcimem64_start =3D BUILD_PCIMEM64_START; u64 pcimem64_end =3D BUILD_PCIMEM64_END; -u64 pci_io_low_end =3D 0xa000; -u32 pci_use_64bit =3D 0; + +// Memory resource allocation tracking +static u64 pci_io_low_end =3D 0xa000; +static u32 pci_use_64bit =3D 0; +static u64 pci_mem64_top =3D 0; =20 struct pci_region_entry { struct pci_device *dev; @@ -966,8 +970,9 @@ static int pci_bios_check_devices(struct pci_bus *busse= s) int resource_optional =3D 0; if (hotplug_support =3D=3D HOTPLUG_PCIE) resource_optional =3D pcie_cap && (type =3D=3D PCI_REGION_= TYPE_IO); - if (hotplug_support && pci_use_64bit && is64 && (type =3D=3D P= CI_REGION_TYPE_PREFMEM)) - align =3D (u64)1 << (CPUPhysBits - 11); + if (hotplug_support && pci_use_64bit && is64 + && (type =3D=3D PCI_REGION_TYPE_PREFMEM)) + align =3D pci_mem64_top >> 11; if (align > sum && hotplug_support && !resource_optional) sum =3D align; /* reserve min size for hot-plug */ if (size > sum) { @@ -1131,14 +1136,13 @@ static void pci_bios_map_devices(struct pci_bus *bu= sses) r64_mem.base =3D le64_to_cpu(romfile_loadint("etc/reserved-memory-= end", 0)); if (r64_mem.base < 0x100000000LL + RamSizeOver4G) r64_mem.base =3D 0x100000000LL + RamSizeOver4G; - if (CPUPhysBits) { - u64 top =3D 1LL << CPUPhysBits; + if (pci_mem64_top) { u64 size =3D (ALIGN(sum_mem, (1LL<<30)) + ALIGN(sum_pref, (1LL<<30))); if (pci_use_64bit) - size =3D ALIGN(size, (1LL<<(CPUPhysBits-3))); - if (r64_mem.base < top - size) { - r64_mem.base =3D top - size; + size =3D ALIGN(size, pci_mem64_top >> 3); + if (r64_mem.base < pci_mem64_top - size) { + r64_mem.base =3D pci_mem64_top - size; } if (e820_is_used(r64_mem.base, size)) r64_mem.base -=3D size; @@ -1181,8 +1185,16 @@ pci_setup(void) =20 dprintf(3, "pci setup\n"); =20 - if (CPUPhysBits >=3D 36 && CPULongMode && RamSizeOver4G) + if (CPUPhysBits >=3D 36 && CPULongMode && RamSizeOver4G) { pci_use_64bit =3D 1; + pci_mem64_top =3D 1LL << CPUPhysBits; + if (CPUPhysBits > 46) { + // Old linux kernels have trouble dealing with more than 46 + // phys-bits, so avoid that for now. Seems to be a bug in the + // virtio-pci driver. Reported: centos-7, ubuntu-18.04 + pci_mem64_top =3D 1LL << 46; + } + } =20 dprintf(1, "=3D=3D=3D PCI bus & bridge init =3D=3D=3D\n"); if (pci_probe_host() !=3D 0) { Cheers, -Kevin _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org