From nobody Sun May 12 11:26:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1677449696660497.6702521182466; Sun, 26 Feb 2023 14:14:56 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWPHw-0003Hr-3U; Sun, 26 Feb 2023 17:14:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHu-0003GO-2A; Sun, 26 Feb 2023 17:14:34 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHr-0004zz-PE; Sun, 26 Feb 2023 17:14:33 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 3313074638A; Sun, 26 Feb 2023 23:14:29 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 02057746377; Sun, 26 Feb 2023 23:14:29 +0100 (CET) Message-Id: <17ef3c59dc7868f75034e9ebe21e2999c8f718d4.1677445307.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Wed, 15 Feb 2023 16:35:42 +0100 Subject: [PATCH v3 1/8] hw/display/sm501: Implement more 2D raster operations MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, vr_qemu@t-online.de, ReneEngel80@emailn.de X-Spam-Probability: 9% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: 15 X-Spam_score: 1.5 X-Spam_bar: + X-Spam_report: (1.5 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_96_XX=3.405, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677449699307100007 Content-Type: text/plain; charset="utf-8" Add simple implementation for two raster operations that are used by AmigaOS which fixes graphics problems in some programs using these. Signed-off-by: BALATON Zoltan Reported-by: Rene Engel Tested-by: Rene Engel Reviewed-by: Daniel Henrique Barboza --- These are documented for example at: https://learn.microsoft.com/en-us/windows/win32/gdi/ternary-raster-operatio= ns hw/display/sm501.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index e1d0591d36..58bc9701ee 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -753,7 +753,7 @@ static void sm501_2d_operation(SM501State *s) } =20 if ((rop_mode && rop =3D=3D 0x5) || (!rop_mode && rop =3D=3D 0x55)= ) { - /* Invert dest, is there a way to do this with pixman? */ + /* DSTINVERT, is there a way to do this with pixman? */ unsigned int x, y, i; uint8_t *d =3D s->local_mem + dst_base; =20 @@ -763,6 +763,34 @@ static void sm501_2d_operation(SM501State *s) stn_he_p(&d[i], bypp, ~ldn_he_p(&d[i], bypp)); } } + } else if (!rop_mode && rop =3D=3D 0x99) { + /* DSxn, is there a way to do this with pixman? */ + unsigned int x, y, i, j; + uint8_t *sp =3D s->local_mem + src_base; + uint8_t *d =3D s->local_mem + dst_base; + + for (y =3D 0; y < height; y++) { + i =3D (dst_x + (dst_y + y) * dst_pitch) * bypp; + j =3D (src_x + (src_y + y) * src_pitch) * bypp; + for (x =3D 0; x < width; x++, i +=3D bypp, j +=3D bypp) { + stn_he_p(&d[i], bypp, + ~(ldn_he_p(&sp[j], bypp) ^ ldn_he_p(&d[i], by= pp))); + } + } + } else if (!rop_mode && rop =3D=3D 0xee) { + /* SRCPAINT, is there a way to do this with pixman? */ + unsigned int x, y, i, j; + uint8_t *sp =3D s->local_mem + src_base; + uint8_t *d =3D s->local_mem + dst_base; + + for (y =3D 0; y < height; y++) { + i =3D (dst_x + (dst_y + y) * dst_pitch) * bypp; + j =3D (src_x + (src_y + y) * src_pitch) * bypp; + for (x =3D 0; x < width; x++, i +=3D bypp, j +=3D bypp) { + stn_he_p(&d[i], bypp, + ldn_he_p(&sp[j], bypp) | ldn_he_p(&d[i], bypp= )); + } + } } else { /* Do copy src for unimplemented ops, better than unpainted ar= ea */ if ((rop_mode && (rop !=3D 0xc || rop2_source_is_pattern)) || --=20 2.30.7 From nobody Sun May 12 11:26:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1677449742153562.7731050433908; Sun, 26 Feb 2023 14:15:42 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWPHw-0003IE-IV; Sun, 26 Feb 2023 17:14:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHu-0003GT-9f; Sun, 26 Feb 2023 17:14:34 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHr-000502-OK; Sun, 26 Feb 2023 17:14:33 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 36281746D65; Sun, 26 Feb 2023 23:14:30 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 0D183746705; Sun, 26 Feb 2023 23:14:30 +0100 (CET) Message-Id: <20ed9442a0146238254ccc340c0d1efa226c6356.1677445307.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Sat, 25 Feb 2023 22:35:28 +0100 Subject: [PATCH v3 2/8] hw/display/sm501: Add fallbacks to pixman routines MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, vr_qemu@t-online.de, ReneEngel80@emailn.de X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_24_48=1.34, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677449742684100001 Content-Type: text/plain; charset="utf-8" Pixman may return false if it does not have a suitable implementation. Add fallbacks to handle such cases. Signed-off-by: BALATON Zoltan Reported-by: Rene Engel Tested-by: Rene Engel --- hw/display/sm501.c | 75 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 52 insertions(+), 23 deletions(-) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 58bc9701ee..23c4418e19 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -691,7 +691,7 @@ static void sm501_2d_operation(SM501State *s) unsigned int dst_pitch =3D (s->twoD_pitch >> 16) & 0x1FFF; int crt =3D (s->dc_crt_control & SM501_DC_CRT_CONTROL_SEL) ? 1 : 0; int fb_len =3D get_width(s, crt) * get_height(s, crt) * get_bpp(s, crt= ); - bool overlap =3D false; + bool overlap =3D false, fallback =3D false; =20 if ((s->twoD_stretch >> 16) & 0xF) { qemu_log_mask(LOG_UNIMP, "sm501: only XY addressing is supported.\= n"); @@ -834,25 +834,48 @@ static void sm501_2d_operation(SM501State *s) if (tmp_stride * sizeof(uint32_t) * height > sizeof(tmp_bu= f)) { tmp =3D g_malloc(tmp_stride * sizeof(uint32_t) * heigh= t); } - pixman_blt((uint32_t *)&s->local_mem[src_base], tmp, - src_pitch * bypp / sizeof(uint32_t), - tmp_stride, 8 * bypp, 8 * bypp, - src_x, src_y, 0, 0, width, height); - pixman_blt(tmp, (uint32_t *)&s->local_mem[dst_base], - tmp_stride, - dst_pitch * bypp / sizeof(uint32_t), - 8 * bypp, 8 * bypp, - 0, 0, dst_x, dst_y, width, height); + fallback =3D !pixman_blt((uint32_t *)&s->local_mem[src_bas= e], + tmp, + src_pitch * bypp / sizeof(uint32_t), + tmp_stride, + 8 * bypp, 8 * bypp, + src_x, src_y, 0, 0, width, height); + if (!fallback) { + fallback =3D !pixman_blt(tmp, + (uint32_t *)&s->local_mem[dst_base], + tmp_stride, + dst_pitch * bypp / sizeof(uint32_t), + 8 * bypp, 8 * bypp, + 0, 0, dst_x, dst_y, width, height); + } if (tmp !=3D tmp_buf) { g_free(tmp); } } else { - pixman_blt((uint32_t *)&s->local_mem[src_base], - (uint32_t *)&s->local_mem[dst_base], - src_pitch * bypp / sizeof(uint32_t), - dst_pitch * bypp / sizeof(uint32_t), - 8 * bypp, 8 * bypp, - src_x, src_y, dst_x, dst_y, width, height); + fallback =3D !pixman_blt((uint32_t *)&s->local_mem[src_bas= e], + (uint32_t *)&s->local_mem[dst_base], + src_pitch * bypp / sizeof(uint32_t), + dst_pitch * bypp / sizeof(uint32_t), + 8 * bypp, 8 * bypp, src_x, src_y, + dst_x, dst_y, width, height); + } + if (fallback) { + uint8_t *sp =3D s->local_mem + src_base; + uint8_t *d =3D s->local_mem + dst_base; + unsigned int y, i, j; + for (y =3D 0; y < height; y++) { + if (overlap) { /* overlap also means rtl */ + i =3D (dst_y + height - 1 - y) * dst_pitch; + i =3D (dst_x + i) * bypp; + j =3D (src_y + height - 1 - y) * src_pitch; + j =3D (src_x + j) * bypp; + memmove(&d[i], &sp[j], width * bypp); + } else { + i =3D (dst_x + (dst_y + y) * dst_pitch) * bypp; + j =3D (src_x + (src_y + y) * src_pitch) * bypp; + memcpy(&d[i], &sp[j], width * bypp); + } + } } } break; @@ -867,13 +890,19 @@ static void sm501_2d_operation(SM501State *s) color =3D cpu_to_le16(color); } =20 - if (width =3D=3D 1 && height =3D=3D 1) { - unsigned int i =3D (dst_x + dst_y * dst_pitch) * bypp; - stn_he_p(&s->local_mem[dst_base + i], bypp, color); - } else { - pixman_fill((uint32_t *)&s->local_mem[dst_base], - dst_pitch * bypp / sizeof(uint32_t), - 8 * bypp, dst_x, dst_y, width, height, color); + if ((width =3D=3D 1 && height =3D=3D 1) || + !pixman_fill((uint32_t *)&s->local_mem[dst_base], + dst_pitch * bypp / sizeof(uint32_t), 8 * bypp, + dst_x, dst_y, width, height, color)) { + /* fallback when pixman failed or we don't want to call it */ + uint8_t *d =3D s->local_mem + dst_base; + unsigned int x, y, i; + for (y =3D 0; y < height; y++, i +=3D dst_pitch * bypp) { + i =3D (dst_x + (dst_y + y) * dst_pitch) * bypp; + for (x =3D 0; x < width; x++, i +=3D bypp) { + stn_he_p(&d[i], bypp, color); + } + } } break; } --=20 2.30.7 From nobody Sun May 12 11:26:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1677449729286872.2408537422075; Sun, 26 Feb 2023 14:15:29 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWPHx-0003Jy-Q9; Sun, 26 Feb 2023 17:14:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHv-0003H4-Ai; Sun, 26 Feb 2023 17:14:35 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHs-00050K-Kw; Sun, 26 Feb 2023 17:14:35 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 3D538746E5A; Sun, 26 Feb 2023 23:14:31 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 1814D746E58; Sun, 26 Feb 2023 23:14:31 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Sat, 25 Feb 2023 23:46:16 +0100 Subject: [PATCH v3 3/8] hw/display/sm501: Add debug property to control pixman usage MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, vr_qemu@t-online.de, ReneEngel80@emailn.de X-Spam-Probability: 12% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -8 X-Spam_score: -0.9 X-Spam_bar: / X-Spam_report: (-0.9 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_12_24=1.049, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677449730773100001 Content-Type: text/plain; charset="utf-8" Add a property to allow disabling pixman and always use the fallbacks for different operations which is useful for testing different drawing methods or debugging pixman related issues. Signed-off-by: BALATON Zoltan --- hw/display/sm501.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 23c4418e19..f2f7f26751 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -464,6 +464,7 @@ typedef struct SM501State { uint32_t last_width; uint32_t last_height; bool do_full_update; /* perform a full update next time */ + uint8_t use_pixman; I2CBus *i2c_bus; =20 /* mmio registers */ @@ -826,7 +827,7 @@ static void sm501_2d_operation(SM501State *s) de =3D db + (width + (height - 1) * dst_pitch) * bypp; overlap =3D (db < se && sb < de); } - if (overlap) { + if (overlap && (s->use_pixman & BIT(2))) { /* pixman can't do reverse blit: copy via temporary */ int tmp_stride =3D DIV_ROUND_UP(width * bypp, sizeof(uint3= 2_t)); uint32_t *tmp =3D tmp_buf; @@ -851,13 +852,15 @@ static void sm501_2d_operation(SM501State *s) if (tmp !=3D tmp_buf) { g_free(tmp); } - } else { + } else if (!overlap && (s->use_pixman & BIT(1))) { fallback =3D !pixman_blt((uint32_t *)&s->local_mem[src_bas= e], (uint32_t *)&s->local_mem[dst_base], src_pitch * bypp / sizeof(uint32_t), dst_pitch * bypp / sizeof(uint32_t), 8 * bypp, 8 * bypp, src_x, src_y, dst_x, dst_y, width, height); + } else { + fallback =3D true; } if (fallback) { uint8_t *sp =3D s->local_mem + src_base; @@ -890,7 +893,7 @@ static void sm501_2d_operation(SM501State *s) color =3D cpu_to_le16(color); } =20 - if ((width =3D=3D 1 && height =3D=3D 1) || + if (!(s->use_pixman & BIT(0)) || (width =3D=3D 1 && height =3D=3D = 1) || !pixman_fill((uint32_t *)&s->local_mem[dst_base], dst_pitch * bypp / sizeof(uint32_t), 8 * bypp, dst_x, dst_y, width, height, color)) { @@ -2039,6 +2042,7 @@ static void sm501_realize_sysbus(DeviceState *dev, Er= ror **errp) static Property sm501_sysbus_properties[] =3D { DEFINE_PROP_UINT32("vram-size", SM501SysBusState, vram_size, 0), DEFINE_PROP_UINT32("base", SM501SysBusState, base, 0), + DEFINE_PROP_UINT8("x-pixman", SM501SysBusState, state.use_pixman, 7), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -2122,6 +2126,7 @@ static void sm501_realize_pci(PCIDevice *dev, Error *= *errp) =20 static Property sm501_pci_properties[] =3D { DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, 64 * MiB), + DEFINE_PROP_UINT8("x-pixman", SM501PCIState, state.use_pixman, 7), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -2162,11 +2167,18 @@ static void sm501_pci_class_init(ObjectClass *klass= , void *data) dc->vmsd =3D &vmstate_sm501_pci; } =20 +static void sm501_pci_init(Object *o) +{ + object_property_set_description(o, "x-pixman", "Use pixman for: " + "1: fill, 2: blit, 4: overlap blit"); +} + static const TypeInfo sm501_pci_info =3D { .name =3D TYPE_PCI_SM501, .parent =3D TYPE_PCI_DEVICE, .instance_size =3D sizeof(SM501PCIState), .class_init =3D sm501_pci_class_init, + .instance_init =3D sm501_pci_init, .interfaces =3D (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { }, --=20 2.30.7 From nobody Sun May 12 11:26:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1677449793303808.8780117101194; Sun, 26 Feb 2023 14:16:33 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWPHy-0003Kl-Je; Sun, 26 Feb 2023 17:14:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHv-0003HU-O0; Sun, 26 Feb 2023 17:14:35 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHu-00050Z-66; Sun, 26 Feb 2023 17:14:35 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 4D275746F31; Sun, 26 Feb 2023 23:14:32 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 29363746F2F; Sun, 26 Feb 2023 23:14:32 +0100 (CET) Message-Id: <0fd9eac9174a840054c511fbc015048929c7bc40.1677445307.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Sat, 25 Feb 2023 19:11:49 +0100 Subject: [PATCH v3 4/8] hw/isa/vt82c686: Implement PCI IRQ routing MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, Jiaxun Yang , ReneEngel80@emailn.de X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_24_48=1.34, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677449794962100003 Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow The real VIA south bridges implement a PCI IRQ router which is configured by the BIOS or the OS. In order to respect these configurations, QEMU needs to implement it as well. Note: The implementation was taken from piix4_set_irq() in hw/isa/piix4. Signed-off-by: Bernhard Beschow [balaton: declare gpio inputs instead of changing pci bus irqs so it can be connected in board code; remove some empty lines] Signed-off-by: BALATON Zoltan Tested-by: Rene Engel --- hw/isa/vt82c686.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 3f9bd0c04d..4025f9bcdc 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -604,6 +604,44 @@ static void via_isa_request_i8259_irq(void *opaque, in= t irq, int level) qemu_set_irq(s->cpu_intr, level); } =20 +static int via_isa_get_pci_irq(const ViaISAState *s, int irq_num) +{ + switch (irq_num) { + case 0: + return s->dev.config[0x55] >> 4; + case 1: + return s->dev.config[0x56] & 0xf; + case 2: + return s->dev.config[0x56] >> 4; + case 3: + return s->dev.config[0x57] >> 4; + } + return 0; +} + +static void via_isa_set_pci_irq(void *opaque, int irq_num, int level) +{ + ViaISAState *s =3D opaque; + PCIBus *bus =3D pci_get_bus(&s->dev); + int pic_irq; + + /* now we change the pic irq level according to the via irq mappings */ + /* XXX: optimize */ + pic_irq =3D via_isa_get_pci_irq(s, irq_num); + if (pic_irq < ISA_NUM_IRQS) { + int i, pic_level; + + /* The pic level is the logical OR of all the PCI irqs mapped to i= t. */ + pic_level =3D 0; + for (i =3D 0; i < PCI_NUM_PINS; i++) { + if (pic_irq =3D=3D via_isa_get_pci_irq(s, i)) { + pic_level |=3D pci_bus_get_irq_level(bus, i); + } + } + qemu_set_irq(s->isa_irqs[pic_irq], pic_level); + } +} + static void via_isa_realize(PCIDevice *d, Error **errp) { ViaISAState *s =3D VIA_ISA(d); @@ -614,6 +652,7 @@ static void via_isa_realize(PCIDevice *d, Error **errp) int i; =20 qdev_init_gpio_out(dev, &s->cpu_intr, 1); + qdev_init_gpio_in_named(dev, via_isa_set_pci_irq, "pirq", PCI_NUM_PINS= ); isa_irq =3D qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); isa_bus =3D isa_bus_new(dev, pci_address_space(d), pci_address_space_i= o(d), errp); --=20 2.30.7 From nobody Sun May 12 11:26:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167744969532656.78962434837172; Sun, 26 Feb 2023 14:14:55 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWPHz-0003L4-Jt; Sun, 26 Feb 2023 17:14:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHx-0003IU-4a; Sun, 26 Feb 2023 17:14:37 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHv-00050q-BL; Sun, 26 Feb 2023 17:14:36 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 5D2D8746F34; Sun, 26 Feb 2023 23:14:33 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 34712746F2F; Sun, 26 Feb 2023 23:14:33 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Thu, 16 Feb 2023 21:27:32 +0100 Subject: [PATCH v3 5/8] hw/ppc/pegasos2: Fix PCI interrupt routing MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, vr_qemu@t-online.de, ReneEngel80@emailn.de X-Spam-Probability: 9% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: 8 X-Spam_score: 0.8 X-Spam_bar: / X-Spam_report: (0.8 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_96_XX=3.405, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677449698890100005 Content-Type: text/plain; charset="utf-8" According to the PegasosII schematics the PCI interrupt lines are connected to both the gpp pins of the Mv64361 north bridge and the PINT pins of the VT8231 south bridge so guests can get interrupts from either of these. So far we only had the MV64361 connections which worked for on board devices but for additional PCI devices (such as network or sound card added with -device) guest OSes expect interrupt from the ISA IRQ 9 where the firmware routes these PCI interrupts in VT8231 ISA bridge. After the previous patches we can now model this and also remove the board specific connection from mv64361. Also configure routing of these lines when using Virtual Open Firmware to match board firmware for guests that expect this. This fixes PCI interrupts on pegasos2 under Linux, MorphOS and AmigaOS. Signed-off-by: BALATON Zoltan Tested-by: Rene Engel Reviewed-by: Daniel Henrique Barboza --- hw/pci-host/mv64361.c | 4 ---- hw/ppc/pegasos2.c | 26 +++++++++++++++++++++++++- 2 files changed, 25 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c index f43f33fbd9..3d9132f989 100644 --- a/hw/pci-host/mv64361.c +++ b/hw/pci-host/mv64361.c @@ -874,10 +874,6 @@ static void mv64361_realize(DeviceState *dev, Error **= errp) } sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->cpu_irq); qdev_init_gpio_in_named(dev, mv64361_gpp_irq, "gpp", 32); - /* FIXME: PCI IRQ connections may be board specific */ - for (i =3D 0; i < PCI_NUM_PINS; i++) { - s->pci[1].irq[i] =3D qdev_get_gpio_in_named(dev, "gpp", 12 + i); - } } =20 static void mv64361_reset(DeviceState *dev) diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index a9563f4fb2..4e1476673b 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -74,6 +74,8 @@ struct Pegasos2MachineState { MachineState parent_obj; PowerPCCPU *cpu; DeviceState *mv; + qemu_irq mv_pirq[PCI_NUM_PINS]; + qemu_irq via_pirq[PCI_NUM_PINS]; Vof *vof; void *fdt_blob; uint64_t kernel_addr; @@ -96,6 +98,15 @@ static void pegasos2_cpu_reset(void *opaque) } } =20 +static void pegasos2_pci_irq(void *opaque, int n, int level) +{ + Pegasos2MachineState *pm =3D opaque; + + /* PCI interrupt lines are connected to both MV64361 and VT8231 */ + qemu_set_irq(pm->mv_pirq[n], level); + qemu_set_irq(pm->via_pirq[n], level); +} + static void pegasos2_init(MachineState *machine) { Pegasos2MachineState *pm =3D PEGASOS2_MACHINE(machine); @@ -107,7 +118,7 @@ static void pegasos2_init(MachineState *machine) I2CBus *i2c_bus; const char *fwname =3D machine->firmware ?: PROM_FILENAME; char *filename; - int sz; + int i, sz; uint8_t *spd_data; =20 /* init CPU */ @@ -157,11 +168,18 @@ static void pegasos2_init(MachineState *machine) /* Marvell Discovery II system controller */ pm->mv =3D DEVICE(sysbus_create_simple(TYPE_MV64361, -1, qdev_get_gpio_in(DEVICE(pm->cpu), PPC6xx_INPUT_I= NT))); + for (i =3D 0; i < PCI_NUM_PINS; i++) { + pm->mv_pirq[i] =3D qdev_get_gpio_in_named(pm->mv, "gpp", 12 + i); + } pci_bus =3D mv64361_get_pci_bus(pm->mv, 1); + pci_bus_irqs(pci_bus, pegasos2_pci_irq, pm, PCI_NUM_PINS); =20 /* VIA VT8231 South Bridge (multifunction PCI device) */ via =3D OBJECT(pci_create_simple_multifunction(pci_bus, PCI_DEVFN(12, = 0), true, TYPE_VT8231_ISA)); + for (i =3D 0; i < PCI_NUM_PINS; i++) { + pm->via_pirq[i] =3D qdev_get_gpio_in_named(DEVICE(via), "pirq", i); + } object_property_add_alias(OBJECT(machine), "rtc-time", object_resolve_path_component(via, "rtc"), "date"); @@ -268,6 +286,12 @@ static void pegasos2_machine_reset(MachineState *machi= ne, ShutdownCause reason) PCI_INTERRUPT_LINE, 2, 0x9); pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | 0x50, 1, 0x2); + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | + 0x55, 1, 0x90); + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | + 0x56, 1, 0x99); + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | + 0x57, 1, 0x90); =20 pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) | PCI_INTERRUPT_LINE, 2, 0x109); --=20 2.30.7 From nobody Sun May 12 11:26:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 167744980701762.34578097289375; Sun, 26 Feb 2023 14:16:47 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWPI0-0003LM-8k; Sun, 26 Feb 2023 17:14:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHx-0003Ik-7e; Sun, 26 Feb 2023 17:14:37 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHv-000513-QN; Sun, 26 Feb 2023 17:14:36 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 5D654746F7F; Sun, 26 Feb 2023 23:14:34 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 3D29B746F2F; Sun, 26 Feb 2023 23:14:34 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Sat, 25 Feb 2023 19:19:57 +0100 Subject: [PATCH v3 6/8] hw/usb/vt82c686-uhci-pci: Use PCI IRQ routing MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, Jiaxun Yang , ReneEngel80@emailn.de X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_24_48=1.34, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677449808851100003 Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow According to the PCI specification, PCI_INTERRUPT_LINE shall have no effect on hardware operations. Now that the VIA south bridges implement the internal PCI interrupt router let's be more conformant to the PCI specification. Signed-off-by: Bernhard Beschow Signed-off-by: BALATON Zoltan Tested-by: Rene Engel --- hw/usb/vt82c686-uhci-pci.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/hw/usb/vt82c686-uhci-pci.c b/hw/usb/vt82c686-uhci-pci.c index 46a901f56f..b4884c9011 100644 --- a/hw/usb/vt82c686-uhci-pci.c +++ b/hw/usb/vt82c686-uhci-pci.c @@ -1,17 +1,7 @@ #include "qemu/osdep.h" -#include "hw/irq.h" #include "hw/isa/vt82c686.h" #include "hcd-uhci.h" =20 -static void uhci_isa_set_irq(void *opaque, int irq_num, int level) -{ - UHCIState *s =3D opaque; - uint8_t irq =3D pci_get_byte(s->dev.config + PCI_INTERRUPT_LINE); - if (irq > 0 && irq < 15) { - via_isa_set_irq(pci_get_function_0(&s->dev), irq, level); - } -} - static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp) { UHCIState *s =3D UHCI(dev); @@ -25,8 +15,6 @@ static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Er= ror **errp) pci_set_long(pci_conf + 0xc0, 0x00002000); =20 usb_uhci_common_realize(dev, errp); - object_unref(s->irq); - s->irq =3D qemu_allocate_irq(uhci_isa_set_irq, s, 0); } =20 static UHCIInfo uhci_info[] =3D { --=20 2.30.7 From nobody Sun May 12 11:26:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1677449803838709.2196009235455; Sun, 26 Feb 2023 14:16:43 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWPI0-0003Lw-UD; Sun, 26 Feb 2023 17:14:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHy-0003Km-Vf; Sun, 26 Feb 2023 17:14:38 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHx-00051P-2F; Sun, 26 Feb 2023 17:14:38 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 8AE6F746FCF; Sun, 26 Feb 2023 23:14:35 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 4874C746F2F; Sun, 26 Feb 2023 23:14:35 +0100 (CET) Message-Id: <6f0980fdc3753624be6f3935a6ab0a2dc1df4b30.1677445307.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Tue, 25 Jan 2022 20:48:36 +0100 Subject: [PATCH v3 7/8] hw/audio/ac97: Split off some definitions to a header MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, vr_qemu@t-online.de, ReneEngel80@emailn.de X-Spam-Probability: 9% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: 8 X-Spam_score: 0.8 X-Spam_bar: / X-Spam_report: (0.8 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_96_XX=3.405, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677449804871100001 Content-Type: text/plain; charset="utf-8" These can be shared with other AC97 implementations. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/audio/ac97.c | 43 +------------------------------- hw/audio/ac97.h | 65 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+), 42 deletions(-) create mode 100644 hw/audio/ac97.h diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c index 364cdfa733..b3fb10284c 100644 --- a/hw/audio/ac97.c +++ b/hw/audio/ac97.c @@ -26,43 +26,7 @@ #include "qemu/module.h" #include "sysemu/dma.h" #include "qom/object.h" - -enum { - AC97_Reset =3D 0x00, - AC97_Master_Volume_Mute =3D 0x02, - AC97_Headphone_Volume_Mute =3D 0x04, - AC97_Master_Volume_Mono_Mute =3D 0x06, - AC97_Master_Tone_RL =3D 0x08, - AC97_PC_BEEP_Volume_Mute =3D 0x0A, - AC97_Phone_Volume_Mute =3D 0x0C, - AC97_Mic_Volume_Mute =3D 0x0E, - AC97_Line_In_Volume_Mute =3D 0x10, - AC97_CD_Volume_Mute =3D 0x12, - AC97_Video_Volume_Mute =3D 0x14, - AC97_Aux_Volume_Mute =3D 0x16, - AC97_PCM_Out_Volume_Mute =3D 0x18, - AC97_Record_Select =3D 0x1A, - AC97_Record_Gain_Mute =3D 0x1C, - AC97_Record_Gain_Mic_Mute =3D 0x1E, - AC97_General_Purpose =3D 0x20, - AC97_3D_Control =3D 0x22, - AC97_AC_97_RESERVED =3D 0x24, - AC97_Powerdown_Ctrl_Stat =3D 0x26, - AC97_Extended_Audio_ID =3D 0x28, - AC97_Extended_Audio_Ctrl_Stat =3D 0x2A, - AC97_PCM_Front_DAC_Rate =3D 0x2C, - AC97_PCM_Surround_DAC_Rate =3D 0x2E, - AC97_PCM_LFE_DAC_Rate =3D 0x30, - AC97_PCM_LR_ADC_Rate =3D 0x32, - AC97_MIC_ADC_Rate =3D 0x34, - AC97_6Ch_Vol_C_LFE_Mute =3D 0x36, - AC97_6Ch_Vol_L_R_Surround_Mute =3D 0x38, - AC97_Vendor_Reserved =3D 0x58, - AC97_Sigmatel_Analog =3D 0x6c, /* We emulate a Sigmatel code= c */ - AC97_Sigmatel_Dac2Invert =3D 0x6e, /* We emulate a Sigmatel code= c */ - AC97_Vendor_ID1 =3D 0x7c, - AC97_Vendor_ID2 =3D 0x7e -}; +#include "ac97.h" =20 #define SOFT_VOLUME #define SR_FIFOE 16 /* rwc */ @@ -121,11 +85,6 @@ enum { #define BD_IOC (1 << 31) #define BD_BUP (1 << 30) =20 -#define EACS_VRA 1 -#define EACS_VRM 8 - -#define MUTE_SHIFT 15 - #define TYPE_AC97 "AC97" OBJECT_DECLARE_SIMPLE_TYPE(AC97LinkState, AC97) =20 diff --git a/hw/audio/ac97.h b/hw/audio/ac97.h new file mode 100644 index 0000000000..0358b56ff4 --- /dev/null +++ b/hw/audio/ac97.h @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2006 InnoTek Systemberatung GmbH + * + * This file is part of VirtualBox Open Source Edition (OSE), as + * available from http://www.virtualbox.org. This file is free software; + * you can redistribute it and/or modify it under the terms of the GNU + * General Public License as published by the Free Software Foundation, + * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE + * distribution. VirtualBox OSE is distributed in the hope that it will + * be useful, but WITHOUT ANY WARRANTY of any kind. + * + * If you received this file as part of a commercial VirtualBox + * distribution, then only the terms of your commercial VirtualBox + * license agreement apply instead of the previous paragraph. + * + * Contributions after 2012-01-13 are licensed under the terms of the + * GNU GPL, version 2 or (at your option) any later version. + */ + +#ifndef AC97_H +#define AC97_H + +enum { + AC97_Reset =3D 0x00, + AC97_Master_Volume_Mute =3D 0x02, + AC97_Headphone_Volume_Mute =3D 0x04, + AC97_Master_Volume_Mono_Mute =3D 0x06, + AC97_Master_Tone_RL =3D 0x08, + AC97_PC_BEEP_Volume_Mute =3D 0x0A, + AC97_Phone_Volume_Mute =3D 0x0C, + AC97_Mic_Volume_Mute =3D 0x0E, + AC97_Line_In_Volume_Mute =3D 0x10, + AC97_CD_Volume_Mute =3D 0x12, + AC97_Video_Volume_Mute =3D 0x14, + AC97_Aux_Volume_Mute =3D 0x16, + AC97_PCM_Out_Volume_Mute =3D 0x18, + AC97_Record_Select =3D 0x1A, + AC97_Record_Gain_Mute =3D 0x1C, + AC97_Record_Gain_Mic_Mute =3D 0x1E, + AC97_General_Purpose =3D 0x20, + AC97_3D_Control =3D 0x22, + AC97_AC_97_RESERVED =3D 0x24, + AC97_Powerdown_Ctrl_Stat =3D 0x26, + AC97_Extended_Audio_ID =3D 0x28, + AC97_Extended_Audio_Ctrl_Stat =3D 0x2A, + AC97_PCM_Front_DAC_Rate =3D 0x2C, + AC97_PCM_Surround_DAC_Rate =3D 0x2E, + AC97_PCM_LFE_DAC_Rate =3D 0x30, + AC97_PCM_LR_ADC_Rate =3D 0x32, + AC97_MIC_ADC_Rate =3D 0x34, + AC97_6Ch_Vol_C_LFE_Mute =3D 0x36, + AC97_6Ch_Vol_L_R_Surround_Mute =3D 0x38, + AC97_Vendor_Reserved =3D 0x58, + AC97_Sigmatel_Analog =3D 0x6c, /* We emulate a Sigmatel code= c */ + AC97_Sigmatel_Dac2Invert =3D 0x6e, /* We emulate a Sigmatel code= c */ + AC97_Vendor_ID1 =3D 0x7c, + AC97_Vendor_ID2 =3D 0x7e +}; + +#define EACS_VRA 1 +#define EACS_VRM 8 + +#define MUTE_SHIFT 15 + +#endif /* AC97_H */ --=20 2.30.7 From nobody Sun May 12 11:26:31 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1677449780735285.09973368060844; Sun, 26 Feb 2023 14:16:20 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pWPI2-0003Mi-Nx; Sun, 26 Feb 2023 17:14:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPI0-0003Lt-Oo; Sun, 26 Feb 2023 17:14:40 -0500 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pWPHy-00051Y-4h; Sun, 26 Feb 2023 17:14:40 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 9B762746FD2; Sun, 26 Feb 2023 23:14:36 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 5FADA746F2F; Sun, 26 Feb 2023 23:14:36 +0100 (CET) Message-Id: <0f210fb86b832649821fe142d58634319c091874.1677445307.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Sun, 23 Jan 2022 21:40:42 +0100 Subject: [PATCH v3 8/8] hw/audio/via-ac97: Basic implementation of audio playback MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Gerd Hoffmann , Daniel Henrique Barboza , Bernhard Beschow , Peter Maydell , philmd@linaro.org, vr_qemu@t-online.de, ReneEngel80@emailn.de X-Spam-Probability: 9% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: 8 X-Spam_score: 0.8 X-Spam_bar: / X-Spam_report: (0.8 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_96_XX=3.405, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1677449782771100003 Content-Type: text/plain; charset="utf-8" Add basic implementation of the AC'97 sound part used in VIA south bridge chips. Not all features of the device is emulated, only one playback channel is supported for now but this is enough to get sound output from some guests using this device on pegasos2. Signed-off-by: BALATON Zoltan Tested-by: Rene Engel --- v3: Fixed CLEN_LEN mask, add check to avoid runaway DMA and some tweaks to PCI config regs which now make it work with AmigaOS too. This is probably as good as it gets for QEMU 8.0 hw/audio/trace-events | 6 + hw/audio/via-ac97.c | 455 +++++++++++++++++++++++++++++++++++++- hw/isa/trace-events | 1 + hw/isa/vt82c686.c | 2 +- include/hw/isa/vt82c686.h | 25 +++ 5 files changed, 482 insertions(+), 7 deletions(-) diff --git a/hw/audio/trace-events b/hw/audio/trace-events index e0e71cd9b1..4dec48a4fd 100644 --- a/hw/audio/trace-events +++ b/hw/audio/trace-events @@ -11,3 +11,9 @@ hda_audio_running(const char *stream, int nr, bool runnin= g) "st %s, nr %d, run % hda_audio_format(const char *stream, int chan, const char *fmt, int freq) = "st %s, %d x %s @ %d Hz" hda_audio_adjust(const char *stream, int pos) "st %s, pos %d" hda_audio_overrun(const char *stream) "st %s" + +#via-ac97.c +via_ac97_codec_write(uint8_t addr, uint16_t val) "0x%x <- 0x%x" +via_ac97_sgd_fetch(uint32_t curr, uint32_t addr, char stop, char eol, char= flag, uint32_t len) "curr=3D0x%x addr=3D0x%x %c%c%c len=3D%d" +via_ac97_sgd_read(uint64_t addr, unsigned size, uint64_t val) "0x%"PRIx64"= %d -> 0x%"PRIx64 +via_ac97_sgd_write(uint64_t addr, unsigned size, uint64_t val) "0x%"PRIx64= " %d <- 0x%"PRIx64 diff --git a/hw/audio/via-ac97.c b/hw/audio/via-ac97.c index d1a856f63d..676254b7a4 100644 --- a/hw/audio/via-ac97.c +++ b/hw/audio/via-ac97.c @@ -1,39 +1,482 @@ /* * VIA south bridges sound support * + * Copyright (c) 2022-2023 BALATON Zoltan + * * This work is licensed under the GNU GPL license version 2 or later. */ =20 /* - * TODO: This is entirely boiler plate just registering empty PCI devices - * with the right ID guests expect, functionality should be added here. + * TODO: This is only a basic implementation of one audio playback channel + * more functionality should be added here. */ =20 #include "qemu/osdep.h" +#include "qemu/log.h" #include "hw/isa/vt82c686.h" -#include "hw/pci/pci_device.h" +#include "ac97.h" +#include "trace.h" + +#define CLEN_IS_EOL(x) ((x)->clen & BIT(31)) +#define CLEN_IS_FLAG(x) ((x)->clen & BIT(30)) +#define CLEN_IS_STOP(x) ((x)->clen & BIT(29)) +#define CLEN_LEN(x) ((x)->clen & 0xffffff) + +#define STAT_ACTIVE BIT(7) +#define STAT_PAUSED BIT(6) +#define STAT_TRIG BIT(3) +#define STAT_STOP BIT(2) +#define STAT_EOL BIT(1) +#define STAT_FLAG BIT(0) + +#define CNTL_START BIT(7) +#define CNTL_TERM BIT(6) +#define CNTL_PAUSE BIT(3) + +static void open_voice_out(ViaAC97State *s); + +static uint16_t codec_rates[] =3D { 8000, 11025, 16000, 22050, 32000, 4410= 0, + 48000 }; + +#define CODEC_REG(s, o) ((s)->codec_regs[(o) / 2]) +#define CODEC_VOL(vol, mask) ((255 * ((vol) & mask)) / mask) + +static void codec_volume_set_out(ViaAC97State *s) +{ + int lvol, rvol, mute; + + lvol =3D 255 - CODEC_VOL(CODEC_REG(s, AC97_Master_Volume_Mute) >> 8, 0= x1f); + lvol *=3D 255 - CODEC_VOL(CODEC_REG(s, AC97_PCM_Out_Volume_Mute) >> 8,= 0x1f); + lvol /=3D 255; + rvol =3D 255 - CODEC_VOL(CODEC_REG(s, AC97_Master_Volume_Mute), 0x1f); + rvol *=3D 255 - CODEC_VOL(CODEC_REG(s, AC97_PCM_Out_Volume_Mute), 0x1f= ); + rvol /=3D 255; + mute =3D CODEC_REG(s, AC97_Master_Volume_Mute) >> MUTE_SHIFT; + mute |=3D CODEC_REG(s, AC97_PCM_Out_Volume_Mute) >> MUTE_SHIFT; + AUD_set_volume_out(s->vo, mute, lvol, rvol); +} + +static void codec_reset(ViaAC97State *s) +{ + memset(s->codec_regs, 0, sizeof(s->codec_regs)); + CODEC_REG(s, AC97_Reset) =3D 0x6a90; + CODEC_REG(s, AC97_Master_Volume_Mute) =3D 0x8000; + CODEC_REG(s, AC97_Headphone_Volume_Mute) =3D 0x8000; + CODEC_REG(s, AC97_Master_Volume_Mono_Mute) =3D 0x8000; + CODEC_REG(s, AC97_Phone_Volume_Mute) =3D 0x8008; + CODEC_REG(s, AC97_Mic_Volume_Mute) =3D 0x8008; + CODEC_REG(s, AC97_Line_In_Volume_Mute) =3D 0x8808; + CODEC_REG(s, AC97_CD_Volume_Mute) =3D 0x8808; + CODEC_REG(s, AC97_Video_Volume_Mute) =3D 0x8808; + CODEC_REG(s, AC97_Aux_Volume_Mute) =3D 0x8808; + CODEC_REG(s, AC97_PCM_Out_Volume_Mute) =3D 0x8808; + CODEC_REG(s, AC97_Record_Gain_Mute) =3D 0x8000; + CODEC_REG(s, AC97_Powerdown_Ctrl_Stat) =3D 0x000f; + CODEC_REG(s, AC97_Extended_Audio_ID) =3D 0x0a05; + CODEC_REG(s, AC97_Extended_Audio_Ctrl_Stat) =3D 0x0400; + CODEC_REG(s, AC97_PCM_Front_DAC_Rate) =3D 48000; + CODEC_REG(s, AC97_PCM_LR_ADC_Rate) =3D 48000; + /* Sigmatel 9766 (STAC9766) */ + CODEC_REG(s, AC97_Vendor_ID1) =3D 0x8384; + CODEC_REG(s, AC97_Vendor_ID2) =3D 0x7666; +} + +static uint16_t codec_read(ViaAC97State *s, uint8_t addr) +{ + return CODEC_REG(s, addr); +} + +static void codec_write(ViaAC97State *s, uint8_t addr, uint16_t val) +{ + trace_via_ac97_codec_write(addr, val); + switch (addr) { + case AC97_Reset: + codec_reset(s); + return; + case AC97_Master_Volume_Mute: + case AC97_PCM_Out_Volume_Mute: + if (addr =3D=3D AC97_Master_Volume_Mute) { + if (val & BIT(13)) { + val |=3D 0x1f00; + } + if (val & BIT(5)) { + val |=3D 0x1f; + } + } + CODEC_REG(s, addr) =3D val & 0x9f1f; + codec_volume_set_out(s); + return; + case AC97_Extended_Audio_Ctrl_Stat: + CODEC_REG(s, addr) &=3D ~EACS_VRA; + CODEC_REG(s, addr) |=3D val & EACS_VRA; + if (!(val & EACS_VRA)) { + CODEC_REG(s, AC97_PCM_Front_DAC_Rate) =3D 48000; + CODEC_REG(s, AC97_PCM_LR_ADC_Rate) =3D 48000; + open_voice_out(s); + } + return; + case AC97_PCM_Front_DAC_Rate: + case AC97_PCM_LR_ADC_Rate: + if (CODEC_REG(s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) { + int i; + uint16_t rate =3D val; + + for (i =3D 0; i < ARRAY_SIZE(codec_rates) - 1; i++) { + if (rate < codec_rates[i] + + (codec_rates[i + 1] - codec_rates[i]) / 2) { + rate =3D codec_rates[i]; + break; + } + } + if (rate > 48000) { + rate =3D 48000; + } + CODEC_REG(s, addr) =3D rate; + open_voice_out(s); + } + return; + case AC97_Powerdown_Ctrl_Stat: + CODEC_REG(s, addr) =3D (val & 0xff00) | (CODEC_REG(s, addr) & 0xff= ); + return; + case AC97_Extended_Audio_ID: + case AC97_Vendor_ID1: + case AC97_Vendor_ID2: + /* Read only registers */ + return; + default: + qemu_log_mask(LOG_UNIMP, + "via-ac97: Unimplemented codec register 0x%x\n", add= r); + CODEC_REG(s, addr) =3D val; + } +} + +static void fetch_sgd(ViaAC97SGDChannel *c, PCIDevice *d) +{ + uint32_t b[2]; + + if (c->curr < c->base) { + c->curr =3D c->base; + } + if (unlikely(pci_dma_read(d, c->curr, b, sizeof(b)) !=3D MEMTX_OK)) { + qemu_log_mask(LOG_GUEST_ERROR, + "via-ac97: DMA error reading SGD table\n"); + return; + } + c->addr =3D le32_to_cpu(b[0]); + c->clen =3D le32_to_cpu(b[1]); + trace_via_ac97_sgd_fetch(c->curr, c->addr, CLEN_IS_STOP(c) ? 'S' : '-', + CLEN_IS_EOL(c) ? 'E' : '-', + CLEN_IS_FLAG(c) ? 'F' : '-', CLEN_LEN(c)); +} + +static void out_cb(void *opaque, int avail) +{ + ViaAC97State *s =3D opaque; + ViaAC97SGDChannel *c =3D &s->aur; + int temp, to_copy, copied; + bool stop =3D false; + uint8_t tmpbuf[4096]; + + if (c->stat & STAT_PAUSED) { + return; + } + c->stat |=3D STAT_ACTIVE; + while (avail && !stop) { + if (!c->clen) { + fetch_sgd(c, &s->dev); + } + temp =3D MIN(CLEN_LEN(c), avail); + while (temp) { + to_copy =3D MIN(temp, sizeof(tmpbuf)); + pci_dma_read(&s->dev, c->addr, tmpbuf, to_copy); + copied =3D AUD_write(s->vo, tmpbuf, to_copy); + if (!copied) { + stop =3D true; + break; + } + temp -=3D copied; + avail -=3D copied; + c->addr +=3D copied; + c->clen -=3D copied; + } + if (CLEN_LEN(c) =3D=3D 0) { + c->curr +=3D 8; + if (CLEN_IS_EOL(c)) { + c->stat |=3D STAT_EOL; + if (c->type & CNTL_START) { + c->curr =3D c->base; + c->stat |=3D STAT_PAUSED; + } else { + c->stat &=3D ~STAT_ACTIVE; + AUD_set_active_out(s->vo, 0); + } + if (c->type & STAT_EOL) { + pci_set_irq(&s->dev, 1); + } + } + if (CLEN_IS_FLAG(c)) { + c->stat |=3D STAT_FLAG; + c->stat |=3D STAT_PAUSED; + if (c->type & STAT_FLAG) { + pci_set_irq(&s->dev, 1); + } + } + if (CLEN_IS_STOP(c)) { + c->stat |=3D STAT_STOP; + c->stat |=3D STAT_PAUSED; + } + c->clen =3D 0; + stop =3D true; + } + } +} + +static void open_voice_out(ViaAC97State *s) +{ + struct audsettings as =3D { + .freq =3D CODEC_REG(s, AC97_PCM_Front_DAC_Rate), + .nchannels =3D s->aur.type & BIT(4) ? 2 : 1, + .fmt =3D s->aur.type & BIT(5) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_S8, + .endianness =3D 0, + }; + s->vo =3D AUD_open_out(&s->card, s->vo, "via-ac97.out", s, out_cb, &as= ); +} + +static uint64_t sgd_read(void *opaque, hwaddr addr, unsigned size) +{ + ViaAC97State *s =3D opaque; + uint64_t val =3D 0; + + switch (addr) { + case 0: + val =3D s->aur.stat; + if (s->aur.type & CNTL_START) { + val |=3D STAT_TRIG; + } + break; + case 1: + val =3D s->aur.stat & STAT_PAUSED ? BIT(3) : 0; + break; + case 2: + val =3D s->aur.type; + break; + case 4: + val =3D s->aur.curr; + break; + case 0xc: + val =3D CLEN_LEN(&s->aur); + break; + case 0x10: + /* silence unimplemented log message that happens at every IRQ */ + break; + case 0x80: + val =3D s->ac97_cmd; + break; + case 0x84: + val =3D s->aur.stat & STAT_FLAG; + if (s->aur.stat & STAT_EOL) { + val |=3D BIT(4); + } + if (s->aur.stat & STAT_STOP) { + val |=3D BIT(8); + } + if (s->aur.stat & STAT_ACTIVE) { + val |=3D BIT(12); + } + break; + default: + qemu_log_mask(LOG_UNIMP, "via-ac97: Unimplemented register read 0x= %" + HWADDR_PRIx"\n", addr); + } + trace_via_ac97_sgd_read(addr, size, val); + return val; +} + +static void sgd_write(void *opaque, hwaddr addr, uint64_t val, unsigned si= ze) +{ + ViaAC97State *s =3D opaque; + + trace_via_ac97_sgd_write(addr, size, val); + switch (addr) { + case 0: + if (val & STAT_STOP) { + s->aur.stat &=3D ~STAT_PAUSED; + } + if (val & STAT_EOL) { + s->aur.stat &=3D ~(STAT_EOL | STAT_PAUSED); + if (s->aur.type & STAT_EOL) { + pci_set_irq(&s->dev, 0); + } + } + if (val & STAT_FLAG) { + s->aur.stat &=3D ~(STAT_FLAG | STAT_PAUSED); + if (s->aur.type & STAT_FLAG) { + pci_set_irq(&s->dev, 0); + } + } + break; + case 1: + if (val & CNTL_START) { + AUD_set_active_out(s->vo, 1); + s->aur.stat =3D STAT_ACTIVE; + } + if (val & CNTL_TERM) { + AUD_set_active_out(s->vo, 0); + s->aur.stat &=3D ~(STAT_ACTIVE | STAT_PAUSED); + s->aur.clen =3D 0; + } + if (val & CNTL_PAUSE) { + AUD_set_active_out(s->vo, 0); + s->aur.stat &=3D ~STAT_ACTIVE; + s->aur.stat |=3D STAT_PAUSED; + } else if (!(val & CNTL_PAUSE) && (s->aur.stat & STAT_PAUSED)) { + AUD_set_active_out(s->vo, 1); + s->aur.stat |=3D STAT_ACTIVE; + s->aur.stat &=3D ~STAT_PAUSED; + } + break; + case 2: + { + uint32_t oldval =3D s->aur.type; + s->aur.type =3D val; + if ((oldval & 0x30) !=3D (val & 0x30)) { + open_voice_out(s); + } + break; + } + case 4: + s->aur.base =3D val & ~1ULL; + s->aur.curr =3D s->aur.base; + break; + case 0x80: + if (val >> 30) { + /* we only have primary codec */ + break; + } + if (val & BIT(23)) { /* read reg */ + s->ac97_cmd =3D val & 0xc0ff0000ULL; + s->ac97_cmd |=3D codec_read(s, (val >> 16) & 0x7f); + s->ac97_cmd |=3D BIT(25); /* data valid */ + } else { + s->ac97_cmd =3D val & 0xc0ffffffULL; + codec_write(s, (val >> 16) & 0x7f, val); + } + break; + case 0xc: + case 0x84: + /* Read only */ + break; + default: + qemu_log_mask(LOG_UNIMP, "via-ac97: Unimplemented register write 0= x%" + HWADDR_PRIx"\n", addr); + } +} + +static const MemoryRegionOps sgd_ops =3D { + .read =3D sgd_read, + .write =3D sgd_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, +}; + +static uint64_t fm_read(void *opaque, hwaddr addr, unsigned size) +{ + qemu_log_mask(LOG_UNIMP, "%s: 0x%"HWADDR_PRIx" %d\n", __func__, addr, = size); + return 0; +} + +static void fm_write(void *opaque, hwaddr addr, uint64_t val, unsigned siz= e) +{ + qemu_log_mask(LOG_UNIMP, "%s: 0x%"HWADDR_PRIx" %d <=3D 0x%"PRIX64"\n", + __func__, addr, size, val); +} + +static const MemoryRegionOps fm_ops =3D { + .read =3D fm_read, + .write =3D fm_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, +}; + +static uint64_t midi_read(void *opaque, hwaddr addr, unsigned size) +{ + qemu_log_mask(LOG_UNIMP, "%s: 0x%"HWADDR_PRIx" %d\n", __func__, addr, = size); + return 0; +} + +static void midi_write(void *opaque, hwaddr addr, uint64_t val, unsigned s= ize) +{ + qemu_log_mask(LOG_UNIMP, "%s: 0x%"HWADDR_PRIx" %d <=3D 0x%"PRIX64"\n", + __func__, addr, size, val); +} + +static const MemoryRegionOps midi_ops =3D { + .read =3D midi_read, + .write =3D midi_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, +}; + +static void via_ac97_reset(DeviceState *dev) +{ + ViaAC97State *s =3D VIA_AC97(dev); + + codec_reset(s); +} =20 static void via_ac97_realize(PCIDevice *pci_dev, Error **errp) { - pci_set_word(pci_dev->config + PCI_COMMAND, - PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY); + ViaAC97State *s =3D VIA_AC97(pci_dev); + Object *o =3D OBJECT(s); + + /* + * Command register Bus Master bit is documented to be fixed at 0 but = it's + * needed for PCI DMA to work in QEMU. The pegasos2 firmware writes 0 = here + * and the AmigaOS driver writes 1 only enabling IO bit which works on + * real hardware. So set it here and fix it to 1 to allow DMA. + */ + pci_set_word(pci_dev->config + PCI_COMMAND, PCI_COMMAND_MASTER); + pci_set_word(pci_dev->wmask + PCI_COMMAND, PCI_COMMAND_IO); pci_set_word(pci_dev->config + PCI_STATUS, PCI_STATUS_CAP_LIST | PCI_STATUS_DEVSEL_MEDIUM); pci_set_long(pci_dev->config + PCI_INTERRUPT_PIN, 0x03); + pci_set_byte(pci_dev->config + 0x40, 1); /* codec ready */ + + memory_region_init_io(&s->sgd, o, &sgd_ops, s, "via-ac97.sgd", 256); + pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->sgd); + memory_region_init_io(&s->fm, o, &fm_ops, s, "via-ac97.fm", 4); + pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->fm); + memory_region_init_io(&s->midi, o, &midi_ops, s, "via-ac97.midi", 4); + pci_register_bar(pci_dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &s->midi); + + AUD_register_card ("via-ac97", &s->card); } =20 +static void via_ac97_exit(PCIDevice *dev) +{ + ViaAC97State *s =3D VIA_AC97(dev); + + AUD_close_out(&s->card, s->vo); + AUD_remove_card(&s->card); +} + +static Property via_ac97_properties[] =3D { + DEFINE_AUDIO_PROPERTIES(ViaAC97State, card), + DEFINE_PROP_END_OF_LIST(), +}; + static void via_ac97_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 k->realize =3D via_ac97_realize; + k->exit =3D via_ac97_exit; k->vendor_id =3D PCI_VENDOR_ID_VIA; k->device_id =3D PCI_DEVICE_ID_VIA_AC97; k->revision =3D 0x50; k->class_id =3D PCI_CLASS_MULTIMEDIA_AUDIO; + device_class_set_props(dc, via_ac97_properties); set_bit(DEVICE_CATEGORY_SOUND, dc->categories); dc->desc =3D "VIA AC97"; + dc->reset =3D via_ac97_reset; /* Reason: Part of a south bridge chip */ dc->user_creatable =3D false; } @@ -41,7 +484,7 @@ static void via_ac97_class_init(ObjectClass *klass, void= *data) static const TypeInfo via_ac97_info =3D { .name =3D TYPE_VIA_AC97, .parent =3D TYPE_PCI_DEVICE, - .instance_size =3D sizeof(PCIDevice), + .instance_size =3D sizeof(ViaAC97State), .class_init =3D via_ac97_class_init, .interfaces =3D (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, diff --git a/hw/isa/trace-events b/hw/isa/trace-events index c4567a9b47..1816e8307a 100644 --- a/hw/isa/trace-events +++ b/hw/isa/trace-events @@ -16,6 +16,7 @@ apm_io_write(uint8_t addr, uint8_t val) "write addr=3D0x%= x val=3D0x%02x" =20 # vt82c686.c via_isa_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x le= n 0x%x" +via_pm_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len = 0x%x" via_pm_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len= 0x%x" via_pm_io_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x l= en 0x%x" via_pm_io_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x = len 0x%x" diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 4025f9bcdc..429677d213 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -554,7 +554,7 @@ struct ViaISAState { PCIIDEState ide; UHCIState uhci[2]; ViaPMState pm; - PCIDevice ac97; + ViaAC97State ac97; PCIDevice mc97; }; =20 diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h index e273cd38dc..da1722daf2 100644 --- a/include/hw/isa/vt82c686.h +++ b/include/hw/isa/vt82c686.h @@ -1,6 +1,8 @@ #ifndef HW_VT82C686_H #define HW_VT82C686_H =20 +#include "hw/pci/pci_device.h" +#include "audio/audio.h" =20 #define TYPE_VT82C686B_ISA "vt82c686b-isa" #define TYPE_VT82C686B_USB_UHCI "vt82c686b-usb-uhci" @@ -9,6 +11,29 @@ #define TYPE_VIA_IDE "via-ide" #define TYPE_VIA_MC97 "via-mc97" =20 +typedef struct { + uint8_t stat; + uint8_t type; + uint32_t base; + uint32_t curr; + uint32_t addr; + uint32_t clen; +} ViaAC97SGDChannel; + +OBJECT_DECLARE_SIMPLE_TYPE(ViaAC97State, VIA_AC97); + +struct ViaAC97State { + PCIDevice dev; + QEMUSoundCard card; + MemoryRegion sgd; + MemoryRegion fm; + MemoryRegion midi; + SWVoiceOut *vo; + ViaAC97SGDChannel aur; + uint16_t codec_regs[128]; + uint32_t ac97_cmd; +}; + void via_isa_set_irq(PCIDevice *d, int n, int level); =20 #endif --=20 2.30.7