hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size

[PATCH] hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size

Inès Varhol posted 1 patch 2 weeks ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240505141613.387508-1-ines.varhol@telecom-paris.fr

Maintainers: Arnaud Minier <arnaud.minier@telecom-paris.fr>, "Inès Varhol" <ines.varhol@telecom-paris.fr>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>

hw/char/stm32l4x5_usart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

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[PATCH] hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size

Posted by Inès Varhol 2 weeks ago

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
---
 hw/char/stm32l4x5_usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c
index 02f666308c..fc5dcac0c4 100644
--- a/hw/char/stm32l4x5_usart.c
+++ b/hw/char/stm32l4x5_usart.c
@@ -56,7 +56,7 @@ REG32(CR1, 0x00)
     FIELD(CR1, UE, 0, 1)     /* USART enable */
 REG32(CR2, 0x04)
     FIELD(CR2, ADD_1, 28, 4)    /* ADD[7:4] */
-    FIELD(CR2, ADD_0, 24, 1)    /* ADD[3:0] */
+    FIELD(CR2, ADD_0, 24, 4)    /* ADD[3:0] */
     FIELD(CR2, RTOEN, 23, 1)    /* Receiver timeout enable */
     FIELD(CR2, ABRMOD, 21, 2)   /* Auto baud rate mode */
     FIELD(CR2, ABREN, 20, 1)    /* Auto baud rate enable */
-- 
2.43.2

Re: [PATCH] hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size

Posted by Peter Maydell 1 week, 5 days ago

On Sun, 5 May 2024 at 15:16, Inès Varhol <ines.varhol@telecom-paris.fr> wrote:
>
> Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>



Applied to target-arm.next, thanks.

-- PMM