target/ppc: Fixes and updates for sync instructions

[PATCH 0/3] target/ppc: Fixes and updates for sync instructions

Nicholas Piggin posted 3 patches 2 weeks, 2 days ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20240501130435.941189-1-npiggin@gmail.com

Maintainers: Nicholas Piggin <npiggin@gmail.com>, Daniel Henrique Barboza <danielhb413@gmail.com>

target/ppc/insn32.decode             |   7 ++
target/ppc/translate.c               | 102 +-----------------
target/ppc/translate/misc-impl.c.inc | 152 +++++++++++++++++++++++++++
3 files changed, 161 insertions(+), 100 deletions(-)
create mode 100644 target/ppc/translate/misc-impl.c.inc

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[PATCH 0/3] target/ppc: Fixes and updates for sync instructions

Posted by Nicholas Piggin 2 weeks, 2 days ago

I forgot I needed to do this, I tried adding new POWER10 sync
instructions to the kernel and patch got nacked because it crashed
with TCG.

Unfortuantely I don't think our old decoder does a great job with
handling reserved bits like this, but decodetree makes this kind
of thing much easier.

I'll probably add at least patch 1 to -stable, so the Linux changes
can be upstreamed a bit sooner.

Thanks,
Nick

Nicholas Piggin (3):
  target/ppc: Move sync instructions to decodetree
  target/ppc: Fix embedded memory barriers
  target/ppc: Add ISA v3.1 variants of sync instruction

 target/ppc/insn32.decode             |   7 ++
 target/ppc/translate.c               | 102 +-----------------
 target/ppc/translate/misc-impl.c.inc | 152 +++++++++++++++++++++++++++
 3 files changed, 161 insertions(+), 100 deletions(-)
 create mode 100644 target/ppc/translate/misc-impl.c.inc

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2.43.0