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Sun, 31 Mar 2024 11:17:36 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGow2RWMLprZVVEV/0e5lBOOboRdfoRgvXrfWKdkBG7DiLIV+gAQNz1Wpyy41kcGnRdG/Ludg== X-Received: by 2002:ac2:5d70:0:b0:515:c7c9:b150 with SMTP id h16-20020ac25d70000000b00515c7c9b150mr5833010lft.0.1711909056433; Sun, 31 Mar 2024 11:17:36 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Chuhong Yuan Subject: [PATCH] lsi53c895a: detect invalid Block Move instruction Date: Sun, 31 Mar 2024 20:17:30 +0200 Message-ID: <20240331181730.150860-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.44.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1711909122910100005 Content-Type: text/plain; charset="utf-8" The spec for the lsi53c895a says: "If the instruction is a Block Move and a value of 0x000000 is loaded into the DBC register, an illegal instruction interrupt occurs if the LSI53C895A is not in target mode, Command phase". Because QEMU only operates in initiator mode, generate the interrupt unconditionally if the low 24 bits are 0x000000. Reported-by: Chuhong Yuan Signed-off-by: Paolo Bonzini --- hw/scsi/lsi53c895a.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index eb9828dd5ef..1e18d88983b 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -1205,6 +1205,15 @@ again: break; } s->dbc =3D insn & 0xffffff; + if (!s->dbc) { + /* + * If the instruction is a Block Move and a value of 0x000000 = is + * loaded into the DBC register, an illegal instruction interr= upt + * occurs if the LSI53C895A is not in target mode, Command pha= se. + */ + lsi_script_dma_interrupt(s, LSI_DSTAT_IID); + break; + } s->rbc =3D s->dbc; /* ??? Set ESA. */ s->ia =3D s->dsp - 8; --=20 2.44.0