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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id c3-20020a633503000000b005dc36761ad1sm6958819pga.33.2024.03.25.23.44.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Mar 2024 23:44:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1711435450; x=1712040250; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Qo1Cy+/ahqbmFMcF+S3a41PcnAQ9BeXKsl8/poFdtaM=; b=RNKGLGdlQEodIC32jpMJB288rvs9p0mLvHRyXI0KRkGXJh50KNyPcLsB+AAkF9JcGk kWOZgurvw2jO3+2FQHWQbFigWFeFc8zfYvZ+KVwrx416stnW3ArSz6bVPhZSqTkCqogK Pgy4bNIpRQvq6pSWl8adDPUcbQExXDLmb+5X672TQFyQefv5nkk/dpFVrzFosmuzMpuL I6afwyMmRFq79T/zMjUA45tx2EIM73PoGATJw3+4zZqy3M8MzTTk3XVwB5bTae99sN4K 2sK3njpanPs2svTqqoUOYgTXR7xR67ZDmD0QMjDsjGwJkFpGgrkVAoQ6eSvfBXHJ4aHY rdBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711435450; x=1712040250; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Qo1Cy+/ahqbmFMcF+S3a41PcnAQ9BeXKsl8/poFdtaM=; b=j9NoE4m5uCvdTd2/zDGDj73LuJUqlXeEje6LZk02TNl32I4ObxtqXHXB6t2V7UROLW 1N9GRRF0dpfv+EpKtCJ8+WKRjSYxzKB7RqzUsK7KGyh7f+3yLRjiwrCqo65gKtZzoG7x G3wqXorsTQdbvSEgiugnEgXm0H1tYcKqo55wtxAx6U27zq+vtDq0c5U246BtxV8jWbg4 JXzcZ8smwC8XRbEc12GzyIKEOV0UCMD4XEse4iY0uTXTZAqOGCnIumW9Kp2Cl3i3zQOr c+KmXwrIGKBa5co/HKxVD4H2EdBraoFj3+2bkhBu4ffoeQfPP1aQ0nFpBeyLDtt+VtvJ z5SA== X-Gm-Message-State: AOJu0YxCpUco9oDNf8i2iYILT/9pmae+nPIuxuDx+LIKONwzEb1+oHDr p5SKTCuOFrLkjpeXUO0ixvJh733Olis87tAxGKQ+9AUj19fLb7gKzvOyXO+BXc2U9n4Q5r6Re7W V X-Google-Smtp-Source: AGHT+IGh0T2LtPGDepvq19nFEldPttRLRorimoHHluX1/4+azuz9IWw4r+aFvKYb8TXbVJT93TiGZw== X-Received: by 2002:a05:6870:7986:b0:220:65ba:ca3a with SMTP id he6-20020a056870798600b0022065baca3amr2449996oab.14.1711435449777; Mon, 25 Mar 2024 23:44:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH 1/3] target/hppa: Squash d for pa1.x during decode Date: Mon, 25 Mar 2024 20:44:03 -1000 Message-Id: <20240326064405.320551-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326064405.320551-1-richard.henderson@linaro.org> References: <20240326064405.320551-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::331; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1711435496237100001 Content-Type: text/plain; charset="utf-8" The cond_need_ext predicate was created while we still had a 32-bit compilation mode. It now makes more sense to treat D as an absolute indicator of a 64-bit operation. Signed-off-by: Richard Henderson Reviewed-by: Helge Deller Tested-by: Helge Deller --- target/hppa/insns.decode | 20 +++++++++++++------- target/hppa/translate.c | 38 ++++++++++++++++++++------------------ 2 files changed, 33 insertions(+), 25 deletions(-) diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index f58455dfdb..6a74cf23cd 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -57,6 +57,9 @@ %neg_to_m 0:1 !function=3Dneg_to_m %a_to_m 2:1 !function=3Dneg_to_m %cmpbid_c 13:2 !function=3Dcmpbid_c +%d_5 5:1 !function=3Dpa20_d +%d_11 11:1 !function=3Dpa20_d +%d_13 13:1 !function=3Dpa20_d =20 #### # Argument set definitions @@ -84,15 +87,16 @@ # Format definitions #### =20 -@rr_cf_d ...... r:5 ..... cf:4 ...... d:1 t:5 &rr_cf_d +@rr_cf_d ...... r:5 ..... cf:4 ...... . t:5 &rr_cf_d d=3D%d_5 @rrr ...... r2:5 r1:5 .... ....... t:5 &rrr @rrr_cf ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf -@rrr_cf_d ...... r2:5 r1:5 cf:4 ...... d:1 t:5 &rrr_cf_d +@rrr_cf_d ...... r2:5 r1:5 cf:4 ...... . t:5 &rrr_cf_d d=3D%d_5 @rrr_sh ...... r2:5 r1:5 ........ sh:2 . t:5 &rrr_sh -@rrr_cf_d_sh ...... r2:5 r1:5 cf:4 .... sh:2 d:1 t:5 &rrr_cf_d_sh -@rrr_cf_d_sh0 ...... r2:5 r1:5 cf:4 ...... d:1 t:5 &rrr_cf_d_sh sh=3D0 +@rrr_cf_d_sh ...... r2:5 r1:5 cf:4 .... sh:2 . t:5 &rrr_cf_d_sh d=3D%= d_5 +@rrr_cf_d_sh0 ...... r2:5 r1:5 cf:4 ...... . t:5 &rrr_cf_d_sh d=3D%= d_5 sh=3D0 @rri_cf ...... r:5 t:5 cf:4 . ........... &rri_cf i=3D%lowsi= gn_11 -@rri_cf_d ...... r:5 t:5 cf:4 d:1 ........... &rri_cf_d i=3D%low= sign_11 +@rri_cf_d ...... r:5 t:5 cf:4 . ........... \ + &rri_cf_d d=3D%d_11 i=3D%lowsign_11 =20 @rrb_cf ...... r2:5 r1:5 c:3 ........... n:1 . \ &rrb_c_f disp=3D%assemble_12 @@ -368,8 +372,10 @@ fmpysub_d 100110 ..... ..... ..... ..... 1 .....= @mpyadd # Conditional Branches #### =20 -bb_sar 110000 00000 r:5 c:1 1 d:1 ........... n:1 . disp=3D%assem= ble_12 -bb_imm 110001 p:5 r:5 c:1 1 d:1 ........... n:1 . disp=3D%assem= ble_12 +bb_sar 110000 00000 r:5 c:1 1 . ........... n:1 . \ + disp=3D%assemble_12 d=3D%d_13 +bb_imm 110001 p:5 r:5 c:1 1 . ........... n:1 . \ + disp=3D%assemble_12 d=3D%d_13 =20 movb 110010 ..... ..... ... ........... . . @rrb_cf f=3D0 movbi 110011 ..... ..... ... ........... . . @rib_cf f=3D0 diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 99c5c4cbca..a70d644c0b 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -200,6 +200,14 @@ static int cmpbid_c(DisasContext *ctx, int val) return val ? val : 4; /* 0 =3D=3D "*<<" */ } =20 +/* + * In many places pa1.x did not decode the bit that later became + * the pa2.0 D bit. Suppress D unless the cpu is pa2.0. + */ +static int pa20_d(DisasContext *ctx, int val) +{ + return ctx->is_pa20 & val; +} =20 /* Include the auto-generated decoder. */ #include "decode-insns.c.inc" @@ -693,12 +701,6 @@ static bool cond_need_cb(int c) return c =3D=3D 4 || c =3D=3D 5; } =20 -/* Need extensions from TCGv_i32 to TCGv_i64. */ -static bool cond_need_ext(DisasContext *ctx, bool d) -{ - return !(ctx->is_pa20 && d); -} - /* * Compute conditional for arithmetic. See Page 5-3, Table 5-1, of * the Parisc 1.1 Architecture Reference Manual for details. @@ -715,7 +717,7 @@ static DisasCond do_cond(DisasContext *ctx, unsigned cf= , bool d, cond =3D cond_make_f(); break; case 1: /* =3D / <> (Z / !Z) */ - if (cond_need_ext(ctx, d)) { + if (!d) { tmp =3D tcg_temp_new_i64(); tcg_gen_ext32u_i64(tmp, res); res =3D tmp; @@ -725,7 +727,7 @@ static DisasCond do_cond(DisasContext *ctx, unsigned cf= , bool d, case 2: /* < / >=3D (N ^ V / !(N ^ V) */ tmp =3D tcg_temp_new_i64(); tcg_gen_xor_i64(tmp, res, sv); - if (cond_need_ext(ctx, d)) { + if (!d) { tcg_gen_ext32s_i64(tmp, tmp); } cond =3D cond_make_0_tmp(TCG_COND_LT, tmp); @@ -742,7 +744,7 @@ static DisasCond do_cond(DisasContext *ctx, unsigned cf= , bool d, */ tmp =3D tcg_temp_new_i64(); tcg_gen_eqv_i64(tmp, res, sv); - if (cond_need_ext(ctx, d)) { + if (!d) { tcg_gen_sextract_i64(tmp, tmp, 31, 1); tcg_gen_and_i64(tmp, tmp, res); tcg_gen_ext32u_i64(tmp, tmp); @@ -760,13 +762,13 @@ static DisasCond do_cond(DisasContext *ctx, unsigned = cf, bool d, tmp =3D tcg_temp_new_i64(); tcg_gen_neg_i64(tmp, cb_msb); tcg_gen_and_i64(tmp, tmp, res); - if (cond_need_ext(ctx, d)) { + if (!d) { tcg_gen_ext32u_i64(tmp, tmp); } cond =3D cond_make_0_tmp(TCG_COND_EQ, tmp); break; case 6: /* SV / NSV (V / !V) */ - if (cond_need_ext(ctx, d)) { + if (!d) { tmp =3D tcg_temp_new_i64(); tcg_gen_ext32s_i64(tmp, sv); sv =3D tmp; @@ -827,7 +829,7 @@ static DisasCond do_sub_cond(DisasContext *ctx, unsigne= d cf, bool d, if (cf & 1) { tc =3D tcg_invert_cond(tc); } - if (cond_need_ext(ctx, d)) { + if (!d) { TCGv_i64 t1 =3D tcg_temp_new_i64(); TCGv_i64 t2 =3D tcg_temp_new_i64(); =20 @@ -904,7 +906,7 @@ static DisasCond do_log_cond(DisasContext *ctx, unsigne= d cf, bool d, g_assert_not_reached(); } =20 - if (cond_need_ext(ctx, d)) { + if (!d) { TCGv_i64 tmp =3D tcg_temp_new_i64(); =20 if (ext_uns) { @@ -979,7 +981,7 @@ static DisasCond do_unit_zero_cond(unsigned cf, bool d,= TCGv_i64 res) static TCGv_i64 get_carry(DisasContext *ctx, bool d, TCGv_i64 cb, TCGv_i64 cb_msb) { - if (cond_need_ext(ctx, d)) { + if (!d) { TCGv_i64 t =3D tcg_temp_new_i64(); tcg_gen_extract_i64(t, cb, 32, 1); return t; @@ -3448,12 +3450,12 @@ static bool trans_bb_sar(DisasContext *ctx, arg_bb_= sar *a) =20 tmp =3D tcg_temp_new_i64(); tcg_r =3D load_gpr(ctx, a->r); - if (cond_need_ext(ctx, a->d)) { + if (a->d) { + tcg_gen_shl_i64(tmp, tcg_r, cpu_sar); + } else { /* Force shift into [32,63] */ tcg_gen_ori_i64(tmp, cpu_sar, 32); tcg_gen_shl_i64(tmp, tcg_r, tmp); - } else { - tcg_gen_shl_i64(tmp, tcg_r, cpu_sar); } =20 cond =3D cond_make_0_tmp(a->c ? TCG_COND_GE : TCG_COND_LT, tmp); @@ -3470,7 +3472,7 @@ static bool trans_bb_imm(DisasContext *ctx, arg_bb_im= m *a) =20 tmp =3D tcg_temp_new_i64(); tcg_r =3D load_gpr(ctx, a->r); - p =3D a->p | (cond_need_ext(ctx, a->d) ? 32 : 0); + p =3D a->p | (a->d ? 0 : 32); tcg_gen_shli_i64(tmp, tcg_r, p); =20 cond =3D cond_make_0(a->c ? TCG_COND_GE : TCG_COND_LT, tmp); --=20 2.34.1 From nobody Fri May 17 11:29:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1711435528; cv=none; d=zohomail.com; s=zohoarc; b=daSkNjS2E/0MLVRsUIe2aVlbcvzy16LCj5PPjZqB4lQw55/wixrcO564ZBnfQFbR9JPHOkTM09S7GzL7ixwdRbPDzcwdlLD2YjrhDBIrCHYY41tuPcASYCJPzIhsHMM2k1CE5kBdsukaPRKry9mz01gqeJya7HkPPW4JrR3NBAc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1711435528; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=VDIupqWKv8Wdkk0Q3yVmDJqHZnSDTz4Dyh6M/jZqxCA=; b=CNEhBi8Zq/WHPktIMq+pywhzKCoNbbxGZNCiSb6CqB9WIBnO0WbUTKJyOfmudli1v9ePRpVU+O9jg5LkFqiiQzYJa1LHgVr9zC1Z19Vq6Bg+3ynhYyo8OEcdPSzWvZvsTe7/lFGHpJP7z5RGDEjjTUcP+t8+knKRs/f1TCk/VU0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1711435528050590.795387212278; Mon, 25 Mar 2024 23:45:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rp0Xf-0004V6-Op; Tue, 26 Mar 2024 02:44:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rp0Xd-0004Up-QW for qemu-devel@nongnu.org; Tue, 26 Mar 2024 02:44:14 -0400 Received: from mail-ot1-x32c.google.com ([2607:f8b0:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rp0Xc-0004Xw-8n for qemu-devel@nongnu.org; Tue, 26 Mar 2024 02:44:13 -0400 Received: by mail-ot1-x32c.google.com with SMTP id 46e09a7af769-6e675181ceaso2836844a34.2 for ; Mon, 25 Mar 2024 23:44:11 -0700 (PDT) Received: from stoup.. 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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id c3-20020a633503000000b005dc36761ad1sm6958819pga.33.2024.03.25.23.44.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Mar 2024 23:44:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1711435451; x=1712040251; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VDIupqWKv8Wdkk0Q3yVmDJqHZnSDTz4Dyh6M/jZqxCA=; b=DK7IzRYeCuAgwn40v3UtNhqxXq9l6/AK2918bIKVuQfu0vQyki8Vhdur5uW54JNnbw cd9VFKvbazcVUkXRhYxjKUpXBwOj9OfLQhkiuj0uE7eUWoDk2/NL9tNAqNZC3YZncDfc 1/4dYR51VpSFgVLLH6yV4pwAUlndV5IrMhViFOwfJ9vhbt8VA+A8dNaAND/L02hpPz/d B96ja9aM+OSMytDlJYR7O3+K/Ixu+4nhPdvFn+pz1OoKvW0DMkChTn5j9bwB7s9byk9L OukkQZZD8f2Or1/bo99QsJzOH5Qhfh4K4xJpJvTpY62t4KCsH0Q1OWwZUd4bKD8xo+A/ 9dDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711435451; x=1712040251; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VDIupqWKv8Wdkk0Q3yVmDJqHZnSDTz4Dyh6M/jZqxCA=; b=MWy9nfnnsOH1dBQirOZ5bfrV5usWS5eyHKCYuTyCZLLBhaJS9ViXbIkzPBwuiTR/em EUj94GPiXv82MmpBJx+m0tx8jeew8nZK/llKvmX3DeBl1/lB+wmF5ZkScPFJbu8jsIIG UqHpycY0VQP9KcyHzmk8VRKamteLmjDgVU1dStQgOX3S1vDeNxxOGaeFhMGf48p49PLt 7d5OAcdcUY5bhLvMFdMnRsRm8IEnri0NgrcUdWetzsE2uc8oPcT7EdhYl8Hdogks7PY8 WRLMpLRwkFEpGz2bEnereobIPzPxHfYPgOQY72vlej3JJzJgAkJDUlZnqxzWKStKrGju /dJw== X-Gm-Message-State: AOJu0Yza1MQM3Utz4qMiH3JzpEVp6z71PFuS9ueo/q/f4SKx0HJqp+kn yUJJI1La2+9LIyRH3Cyn9R71ckIthzg9q8SFEblPxsmIMay9m04j28JnO8sr4roKfg10vBHFF/C r X-Google-Smtp-Source: AGHT+IEhOw7nWC7b2/n6ITT73WQqyEMBOvb7Ii/sq267zr+KbdeYhN5rWWT0WyEmu2K1Etc3YTZYmg== X-Received: by 2002:a9d:6e16:0:b0:6e6:d1ac:c989 with SMTP id e22-20020a9d6e16000000b006e6d1acc989mr5398447otr.6.1711435451014; Mon, 25 Mar 2024 23:44:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH 2/3] target/hppa: Replace c with uv in do_cond Date: Mon, 25 Mar 2024 20:44:04 -1000 Message-Id: <20240326064405.320551-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326064405.320551-1-richard.henderson@linaro.org> References: <20240326064405.320551-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32c; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1711435528433100001 Content-Type: text/plain; charset="utf-8" Prepare for proper indication of shladd unsigned overflow. The UV indicator will be zero/not-zero instead of a single bit. Signed-off-by: Richard Henderson Reviewed-by: Helge Deller Tested-by: Helge Deller --- target/hppa/translate.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index a70d644c0b..9d31ef5764 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -707,7 +707,7 @@ static bool cond_need_cb(int c) */ =20 static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d, - TCGv_i64 res, TCGv_i64 cb_msb, TCGv_i64 sv) + TCGv_i64 res, TCGv_i64 uv, TCGv_i64 sv) { DisasCond cond; TCGv_i64 tmp; @@ -754,14 +754,12 @@ static DisasCond do_cond(DisasContext *ctx, unsigned = cf, bool d, } cond =3D cond_make_0_tmp(TCG_COND_EQ, tmp); break; - case 4: /* NUV / UV (!C / C) */ - /* Only bit 0 of cb_msb is ever set. */ - cond =3D cond_make_0(TCG_COND_EQ, cb_msb); + case 4: /* NUV / UV (!UV / UV) */ + cond =3D cond_make_0(TCG_COND_EQ, uv); break; - case 5: /* ZNV / VNZ (!C | Z / C & !Z) */ + case 5: /* ZNV / VNZ (!UV | Z / UV & !Z) */ tmp =3D tcg_temp_new_i64(); - tcg_gen_neg_i64(tmp, cb_msb); - tcg_gen_and_i64(tmp, tmp, res); + tcg_gen_movcond_i64(TCG_COND_EQ, tmp, uv, ctx->zero, ctx->zero, re= s); if (!d) { tcg_gen_ext32u_i64(tmp, tmp); } --=20 2.34.1 From nobody Fri May 17 11:29:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1711435508; cv=none; d=zohomail.com; s=zohoarc; b=WceRDavoACPze6+jYYPnlsIyA63ga5RVu8bIx3mQ8djm0tS3nW381uCQw/Ph5QOWcnNQWrjJ3gpiKAGJ9rwLjdspFA9TodNlnrtkFFVTToFGg8LJUBAPjpO7oGLbLJ2MObqpN4B2/eD50bbqQ3pERQxCtWhT1JBSU3Y90yDWE2A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1711435508; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=j9CLORt38yZiQ1fCLl5knbBMBJnlvZ9He6LtCWjt6QA=; b=MJwBF8X7l1kGsvdhkyw/DQvrsyAFmZFuklrGpa9+uXn//1M0sIPP6JPewwVi+RDSvpJ6D1KfHpDjuScmkUzC8btd2kV7KYsrEAVvWD3YhewgwSjX61o/jDW1DfaLfgqI3FJxX799+ugCg1GXphv7MSUoY3G7xs519cumve2SQyE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1711435508854267.00043229548135; Mon, 25 Mar 2024 23:45:08 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rp0Xj-0004Vu-9g; Tue, 26 Mar 2024 02:44:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rp0Xh-0004VY-1v for qemu-devel@nongnu.org; Tue, 26 Mar 2024 02:44:17 -0400 Received: from mail-oi1-x22b.google.com ([2607:f8b0:4864:20::22b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rp0Xf-0004YH-A4 for qemu-devel@nongnu.org; Tue, 26 Mar 2024 02:44:16 -0400 Received: by mail-oi1-x22b.google.com with SMTP id 5614622812f47-3c3acf4b0e1so3076828b6e.0 for ; Mon, 25 Mar 2024 23:44:13 -0700 (PDT) Received: from stoup.. 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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id c3-20020a633503000000b005dc36761ad1sm6958819pga.33.2024.03.25.23.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Mar 2024 23:44:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1711435452; x=1712040252; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=j9CLORt38yZiQ1fCLl5knbBMBJnlvZ9He6LtCWjt6QA=; b=NzZiqrW9kDYmldoioHvJB/RAr5GwRlKw5lfY75aDcrTSHKnrIO8ebFKiPGIVlRs69f /Cz4BQOAAI8m/8uNY8rVn7mtroY//0dZNpFHxT9QmLhZp1lVIyB3CCPs8JSrHUsFAkRp wagNSSsvSXAgGiadRyshqJnsyD2hXSppmu75JmIBZEVF7utnVorjKh31LMWMSL5cDLlG thEWlpe26DRwfVHWDD+JETv49vUTXBrESLPICPy4r8fWtStVWdNXQa8opdCiryEn2Wai mBykVJdbqJNI0wbe5gc46c27BmqBksQtAeRxLBMWQQXK3xbL0jotBQA//GZpmpSu+5OW 0PvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711435452; x=1712040252; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=j9CLORt38yZiQ1fCLl5knbBMBJnlvZ9He6LtCWjt6QA=; b=kXQH3DsR9x3M2U9kVTxZtEtrXNVJ4H/mM/x4dcZhMXHGNAGxI6woZfnqIwBlB0gc0W p6KqaotA9p+D4730PNo0EARWXZpt+fzyGlcY+jb+R1WLYnmJF2SFRkjZkw/iZrmiN9IR y9ea7E03c3JBvWgTWyGN9tXwkW456151h50RAJchN9eMPfLAM9+DIGZ+Fi5IchYZoK3f 4lnWCVEQ/uvGwt1UeP6KYUAQlT+3y/OWeo7a040guNoP2rBdk5KZ4GwF+4tK4NeElbCR 0gD4VRIZ7OHCynN/l8xj/zMA2HyVJ6S6si9uqyL4FdGTkl3LO3Lte41eTsAbRplaPGFe MOHg== X-Gm-Message-State: AOJu0Yxy720FucOr106PSXYxfiID/i40ZQEcXeNoUWxjjKiN8NYsa4+J 9cHu7GPfVVtL6nZeIkjQmwFjelPy5PZXjLqCzh+PAoosmwQNiWIkjIE24RHGf3oIWP/PGepn8v2 S X-Google-Smtp-Source: AGHT+IH2AfhF/A2bXoQ18EVrEes5JiPZsFohpAvLSFVuNMaJjenWZojRob9k5o6u9CkGEKDmn3bAdA== X-Received: by 2002:a05:6808:1315:b0:3c1:c124:6d4d with SMTP id y21-20020a056808131500b003c1c1246d4dmr10844194oiv.56.1711435452525; Mon, 25 Mar 2024 23:44:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@gmx.de Subject: [PATCH 3/3] target/hppa: Fix overflow computation for shladd Date: Mon, 25 Mar 2024 20:44:05 -1000 Message-Id: <20240326064405.320551-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326064405.320551-1-richard.henderson@linaro.org> References: <20240326064405.320551-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22b; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1711435510274100003 Content-Type: text/plain; charset="utf-8" Overflow indicator should include the effect of the shift step. We had previously left ??? comments about the issue. Signed-off-by: Richard Henderson Tested-by: Helge Deller --- target/hppa/translate.c | 85 ++++++++++++++++++++++++++++++++--------- 1 file changed, 66 insertions(+), 19 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 9d31ef5764..0976372d16 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -994,7 +994,8 @@ static TCGv_i64 get_psw_carry(DisasContext *ctx, bool d) =20 /* Compute signed overflow for addition. */ static TCGv_i64 do_add_sv(DisasContext *ctx, TCGv_i64 res, - TCGv_i64 in1, TCGv_i64 in2) + TCGv_i64 in1, TCGv_i64 in2, + TCGv_i64 orig_in1, int shift, bool d) { TCGv_i64 sv =3D tcg_temp_new_i64(); TCGv_i64 tmp =3D tcg_temp_new_i64(); @@ -1003,9 +1004,50 @@ static TCGv_i64 do_add_sv(DisasContext *ctx, TCGv_i6= 4 res, tcg_gen_xor_i64(tmp, in1, in2); tcg_gen_andc_i64(sv, sv, tmp); =20 + switch (shift) { + case 0: + break; + case 1: + /* Shift left by one and compare the sign. */ + tcg_gen_add_i64(tmp, orig_in1, orig_in1); + tcg_gen_xor_i64(tmp, tmp, orig_in1); + /* Incorporate into the overflow. */ + tcg_gen_or_i64(sv, sv, tmp); + break; + default: + { + int sign_bit =3D d ? 63 : 31; + uint64_t mask =3D MAKE_64BIT_MASK(sign_bit - shift, shift); + + /* Compare the sign against all lower bits. */ + tcg_gen_sextract_i64(tmp, orig_in1, sign_bit, 1); + tcg_gen_xor_i64(tmp, tmp, orig_in1); + /* + * If one of the bits shifting into or through the sign + * differs, then we have overflow. + */ + tcg_gen_movcond_i64(TCG_COND_TSTNE, sv, + tmp, tcg_constant_i64(mask), + tcg_constant_i64(-1), sv); + } + } return sv; } =20 +/* Compute unsigned overflow for addition. */ +static TCGv_i64 do_add_uv(DisasContext *ctx, TCGv_i64 cb, TCGv_i64 cb_msb, + TCGv_i64 in1, int shift, bool d) +{ + if (shift =3D=3D 0) { + return get_carry(ctx, d, cb, cb_msb); + } else { + TCGv_i64 tmp =3D tcg_temp_new_i64(); + tcg_gen_extract_i64(tmp, in1, (d ? 63 : 31) - shift, shift); + tcg_gen_or_i64(tmp, tmp, get_carry(ctx, d, cb, cb_msb)); + return tmp; + } +} + /* Compute signed overflow for subtraction. */ static TCGv_i64 do_sub_sv(DisasContext *ctx, TCGv_i64 res, TCGv_i64 in1, TCGv_i64 in2) @@ -1020,19 +1062,19 @@ static TCGv_i64 do_sub_sv(DisasContext *ctx, TCGv_i= 64 res, return sv; } =20 -static void do_add(DisasContext *ctx, unsigned rt, TCGv_i64 in1, +static void do_add(DisasContext *ctx, unsigned rt, TCGv_i64 orig_in1, TCGv_i64 in2, unsigned shift, bool is_l, bool is_tsv, bool is_tc, bool is_c, unsigned cf, bool d) { - TCGv_i64 dest, cb, cb_msb, cb_cond, sv, tmp; + TCGv_i64 dest, cb, cb_msb, in1, uv, sv, tmp; unsigned c =3D cf >> 1; DisasCond cond; =20 dest =3D tcg_temp_new_i64(); cb =3D NULL; cb_msb =3D NULL; - cb_cond =3D NULL; =20 + in1 =3D orig_in1; if (shift) { tmp =3D tcg_temp_new_i64(); tcg_gen_shli_i64(tmp, in1, shift); @@ -1050,9 +1092,6 @@ static void do_add(DisasContext *ctx, unsigned rt, TC= Gv_i64 in1, } tcg_gen_xor_i64(cb, in1, in2); tcg_gen_xor_i64(cb, cb, dest); - if (cond_need_cb(c)) { - cb_cond =3D get_carry(ctx, d, cb, cb_msb); - } } else { tcg_gen_add_i64(dest, in1, in2); if (is_c) { @@ -1063,18 +1102,23 @@ static void do_add(DisasContext *ctx, unsigned rt, = TCGv_i64 in1, /* Compute signed overflow if required. */ sv =3D NULL; if (is_tsv || cond_need_sv(c)) { - sv =3D do_add_sv(ctx, dest, in1, in2); + sv =3D do_add_sv(ctx, dest, in1, in2, orig_in1, shift, d); if (is_tsv) { if (!d) { tcg_gen_ext32s_i64(sv, sv); } - /* ??? Need to include overflow from shift. */ gen_helper_tsv(tcg_env, sv); } } =20 + /* Compute unsigned overflow if required. */ + uv =3D NULL; + if (cond_need_cb(c)) { + uv =3D do_add_uv(ctx, cb, cb_msb, orig_in1, shift, d); + } + /* Emit any conditional trap before any writeback. */ - cond =3D do_cond(ctx, cf, d, dest, cb_cond, sv); + cond =3D do_cond(ctx, cf, d, dest, uv, sv); if (is_tc) { tmp =3D tcg_temp_new_i64(); tcg_gen_setcond_i64(cond.c, tmp, cond.a0, cond.a1); @@ -2843,7 +2887,6 @@ static bool trans_dcor_i(DisasContext *ctx, arg_rr_cf= _d *a) static bool trans_ds(DisasContext *ctx, arg_rrr_cf *a) { TCGv_i64 dest, add1, add2, addc, in1, in2; - TCGv_i64 cout; =20 nullify_over(ctx); =20 @@ -2880,19 +2923,23 @@ static bool trans_ds(DisasContext *ctx, arg_rrr_cf = *a) tcg_gen_xor_i64(cpu_psw_cb, add1, add2); tcg_gen_xor_i64(cpu_psw_cb, cpu_psw_cb, dest); =20 - /* Write back PSW[V] for the division step. */ - cout =3D get_psw_carry(ctx, false); - tcg_gen_neg_i64(cpu_psw_v, cout); + /* + * Write back PSW[V] for the division step. + * Shift cb{8} from where it lives in bit 32 to bit 31, + * so that it overlaps r2{32} in bit 31. + */ + tcg_gen_shri_i64(cpu_psw_v, cpu_psw_cb, 1); tcg_gen_xor_i64(cpu_psw_v, cpu_psw_v, in2); =20 /* Install the new nullification. */ if (a->cf) { - TCGv_i64 sv =3D NULL; + TCGv_i64 sv =3D NULL, uv =3D NULL; if (cond_need_sv(a->cf >> 1)) { - /* ??? The lshift is supposed to contribute to overflow. */ - sv =3D do_add_sv(ctx, dest, add1, add2); + sv =3D do_add_sv(ctx, dest, add1, add2, in1, 1, false); + } else if (cond_need_cb(a->cf >> 1)) { + uv =3D do_add_uv(ctx, cpu_psw_cb, NULL, in1, 1, false); } - ctx->null_cond =3D do_cond(ctx, a->cf, false, dest, cout, sv); + ctx->null_cond =3D do_cond(ctx, a->cf, false, dest, uv, sv); } =20 return nullify_end(ctx); @@ -3419,7 +3466,7 @@ static bool do_addb(DisasContext *ctx, unsigned r, TC= Gv_i64 in1, tcg_gen_add_i64(dest, in1, in2); } if (cond_need_sv(c)) { - sv =3D do_add_sv(ctx, dest, in1, in2); + sv =3D do_add_sv(ctx, dest, in1, in2, in1, 0, d); } =20 cond =3D do_cond(ctx, c * 2 + f, d, dest, cb_cond, sv); --=20 2.34.1