This is a ping to the patch below.
https://patchew.org/QEMU/20240325021654.6594-1-eric.huang@linux.alibaba.com/
On 2024/3/25 10:16, Huang Tao wrote:
> In RVV and vcrypto instructions, the masked and tail elements are set to 1s
> using vext_set_elems_1s function if the vma/vta bit is set. It is the element
> agnostic policy.
>
> However, this function can't deal the big endian situation. This patch fixes
> the problem by adding handling of such case.
>
> Signed-off-by: Huang Tao<eric.huang@linux.alibaba.com>
> Suggested-by: Richard Henderson<richard.henderson@linaro.org>
> Reviewed-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com>
> ---
> Changes in v3:
> - use "if (HOST_BIG_ENDIAN)" instead of "#if HOST_BIG_ENDIAN"
>
> Changes in v2:
> - Keep the api of vext_set_elems_1s
> - Reduce the number of patches.
> ---
> target/riscv/vector_internals.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/target/riscv/vector_internals.c b/target/riscv/vector_internals.c
> index 12f5964fbb..36635a1138 100644
> --- a/target/riscv/vector_internals.c
> +++ b/target/riscv/vector_internals.c
> @@ -30,6 +30,28 @@ void vext_set_elems_1s(void *base, uint32_t is_agnostic, uint32_t cnt,
> if (tot - cnt == 0) {
> return ;
> }
> +
> + if (HOST_BIG_ENDIAN) {
> + /*
> + * Deal the situation when the elements are insdie
> + * only one uint64 block including setting the
> + * masked-off element.
> + */
> + if (((tot - 1) ^ cnt) < 8) {
> + memset(base + H1(tot - 1), -1, tot - cnt);
> + return;
> + }
> + /*
> + * Otherwise, at least cross two uint64_t blocks.
> + * Set first unaligned block.
> + */
> + if (cnt % 8 != 0) {
> + uint32_t j = ROUND_UP(cnt, 8);
> + memset(base + H1(j - 1), -1, j - cnt);
> + cnt = j;
> + }
> + /* Set other 64bit aligend blocks */
> + }
> memset(base + cnt, -1, tot - cnt);
> }
>