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[PATCH v1] target/loongarch: Fix qemu-system-loongarch64 assert failed with the option '-d int'

Song Gao posted 1 patch 1 year, 10 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20240321021155.1696910-1-gaosong@loongson.cn
Maintainers: Song Gao <gaosong@loongson.cn>
There is a newer version of this series
target/loongarch/cpu.c | 75 ++++++++++++++++++++++++++----------------
1 file changed, 46 insertions(+), 29 deletions(-)
[PATCH v1] target/loongarch: Fix qemu-system-loongarch64 assert failed with the option '-d int'
Posted by Song Gao 1 year, 10 months ago 
qemu-system-loongarch64 assert failed with the option '-d int',
the helper_idle() raise an exception EXCP_HLT, but the exception name is undefined.

Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.c | 75 ++++++++++++++++++++++++++----------------
 1 file changed, 46 insertions(+), 29 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index f6ffb3aadb..17a923de02 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -45,33 +45,46 @@ const char * const fregnames[32] = {
     "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
 };
 
-static const char * const excp_names[] = {
-    [EXCCODE_INT] = "Interrupt",
-    [EXCCODE_PIL] = "Page invalid exception for load",
-    [EXCCODE_PIS] = "Page invalid exception for store",
-    [EXCCODE_PIF] = "Page invalid exception for fetch",
-    [EXCCODE_PME] = "Page modified exception",
-    [EXCCODE_PNR] = "Page Not Readable exception",
-    [EXCCODE_PNX] = "Page Not Executable exception",
-    [EXCCODE_PPI] = "Page Privilege error",
-    [EXCCODE_ADEF] = "Address error for instruction fetch",
-    [EXCCODE_ADEM] = "Address error for Memory access",
-    [EXCCODE_SYS] = "Syscall",
-    [EXCCODE_BRK] = "Break",
-    [EXCCODE_INE] = "Instruction Non-Existent",
-    [EXCCODE_IPE] = "Instruction privilege error",
-    [EXCCODE_FPD] = "Floating Point Disabled",
-    [EXCCODE_FPE] = "Floating Point Exception",
-    [EXCCODE_DBP] = "Debug breakpoint",
-    [EXCCODE_BCE] = "Bound Check Exception",
-    [EXCCODE_SXD] = "128 bit vector instructions Disable exception",
-    [EXCCODE_ASXD] = "256 bit vector instructions Disable exception",
+struct TypeExcp {
+    int32_t exccode;
+    const char *name;
+};
+
+static const struct TypeExcp excp_names[] = {
+    {EXCCODE_INT, "Interrupt"},
+    {EXCCODE_PIL, "Page invalid exception for load"},
+    {EXCCODE_PIS, "Page invalid exception for store"},
+    {EXCCODE_PIF, "Page invalid exception for fetch"},
+    {EXCCODE_PME, "Page modified exception"},
+    {EXCCODE_PNR, "Page Not Readable exception"},
+    {EXCCODE_PNX, "Page Not Executable exception"},
+    {EXCCODE_PPI, "Page Privilege error"},
+    {EXCCODE_ADEF, "Address error for instruction fetch"},
+    {EXCCODE_ADEM, "Address error for Memory access"},
+    {EXCCODE_SYS, "Syscall"},
+    {EXCCODE_BRK, "Break"},
+    {EXCCODE_INE, "Instruction Non-Existent"},
+    {EXCCODE_IPE, "Instruction privilege error"},
+    {EXCCODE_FPD, "Floating Point Disabled"},
+    {EXCCODE_FPE, "Floating Point Exception"},
+    {EXCCODE_DBP, "Debug breakpoint"},
+    {EXCCODE_BCE, "Bound Check Exception"},
+    {EXCCODE_SXD, "128 bit vector instructions Disable exception"},
+    {EXCCODE_ASXD, "256 bit vector instructions Disable exception"},
 };
 
 const char *loongarch_exception_name(int32_t exception)
 {
-    assert(excp_names[exception]);
-    return excp_names[exception];
+    int i;
+    const char *name = "unknown";
+
+    for (i = 0; i < ARRAY_SIZE(excp_names); i++) {
+        if (excp_names[i].exccode == exception) {
+            name = excp_names[i].name;
+            break;
+        }
+    }
+    return name;
 }
 
 void G_NORETURN do_raise_exception(CPULoongArchState *env,
@@ -79,11 +92,17 @@ void G_NORETURN do_raise_exception(CPULoongArchState *env,
                                    uintptr_t pc)
 {
     CPUState *cs = env_cpu(env);
+    const char *name;
 
+    if (exception == EXCP_HLT) {
+        name = "EXCP_HLT";
+    } else {
+        name = loongarch_exception_name(exception);
+    }
     qemu_log_mask(CPU_LOG_INT, "%s: %d (%s)\n",
                   __func__,
                   exception,
-                  loongarch_exception_name(exception));
+                  name);
     cs->exception_index = exception;
 
     cpu_loop_exit_restore(cs, pc);
@@ -159,13 +178,11 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
     uint32_t vec_size = FIELD_EX64(env->CSR_ECFG, CSR_ECFG, VS);
 
     if (cs->exception_index != EXCCODE_INT) {
-        if (cs->exception_index < 0 ||
-            cs->exception_index >= ARRAY_SIZE(excp_names)) {
-            name = "unknown";
+        if (cs->exception_index == EXCP_HLT) {
+            name = "EXCP_HLT";
         } else {
-            name = excp_names[cs->exception_index];
+            name = loongarch_exception_name(cs->exception_index);
         }
-
         qemu_log_mask(CPU_LOG_INT,
                      "%s enter: pc " TARGET_FMT_lx " ERA " TARGET_FMT_lx
                      " TLBRERA " TARGET_FMT_lx " %s exception\n", __func__,
-- 
2.25.1
Re: [PATCH v1] target/loongarch: Fix qemu-system-loongarch64 assert failed with the option '-d int'
Posted by Richard Henderson 1 year, 10 months ago 
On 3/20/24 16:11, Song Gao wrote:
> qemu-system-loongarch64 assert failed with the option '-d int',
> the helper_idle() raise an exception EXCP_HLT, but the exception name is undefined.
> 
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> ---
>   target/loongarch/cpu.c | 75 ++++++++++++++++++++++++++----------------
>   1 file changed, 46 insertions(+), 29 deletions(-)
> 
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index f6ffb3aadb..17a923de02 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -45,33 +45,46 @@ const char * const fregnames[32] = {
>       "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
>   };
>   
> -static const char * const excp_names[] = {
> -    [EXCCODE_INT] = "Interrupt",
> -    [EXCCODE_PIL] = "Page invalid exception for load",
> -    [EXCCODE_PIS] = "Page invalid exception for store",
> -    [EXCCODE_PIF] = "Page invalid exception for fetch",
> -    [EXCCODE_PME] = "Page modified exception",
> -    [EXCCODE_PNR] = "Page Not Readable exception",
> -    [EXCCODE_PNX] = "Page Not Executable exception",
> -    [EXCCODE_PPI] = "Page Privilege error",
> -    [EXCCODE_ADEF] = "Address error for instruction fetch",
> -    [EXCCODE_ADEM] = "Address error for Memory access",
> -    [EXCCODE_SYS] = "Syscall",
> -    [EXCCODE_BRK] = "Break",
> -    [EXCCODE_INE] = "Instruction Non-Existent",
> -    [EXCCODE_IPE] = "Instruction privilege error",
> -    [EXCCODE_FPD] = "Floating Point Disabled",
> -    [EXCCODE_FPE] = "Floating Point Exception",
> -    [EXCCODE_DBP] = "Debug breakpoint",
> -    [EXCCODE_BCE] = "Bound Check Exception",
> -    [EXCCODE_SXD] = "128 bit vector instructions Disable exception",
> -    [EXCCODE_ASXD] = "256 bit vector instructions Disable exception",
> +struct TypeExcp {
> +    int32_t exccode;
> +    const char *name;
> +};
> +
> +static const struct TypeExcp excp_names[] = {
> +    {EXCCODE_INT, "Interrupt"},
> +    {EXCCODE_PIL, "Page invalid exception for load"},
> +    {EXCCODE_PIS, "Page invalid exception for store"},
> +    {EXCCODE_PIF, "Page invalid exception for fetch"},
> +    {EXCCODE_PME, "Page modified exception"},
> +    {EXCCODE_PNR, "Page Not Readable exception"},
> +    {EXCCODE_PNX, "Page Not Executable exception"},
> +    {EXCCODE_PPI, "Page Privilege error"},
> +    {EXCCODE_ADEF, "Address error for instruction fetch"},
> +    {EXCCODE_ADEM, "Address error for Memory access"},
> +    {EXCCODE_SYS, "Syscall"},
> +    {EXCCODE_BRK, "Break"},
> +    {EXCCODE_INE, "Instruction Non-Existent"},
> +    {EXCCODE_IPE, "Instruction privilege error"},
> +    {EXCCODE_FPD, "Floating Point Disabled"},
> +    {EXCCODE_FPE, "Floating Point Exception"},
> +    {EXCCODE_DBP, "Debug breakpoint"},
> +    {EXCCODE_BCE, "Bound Check Exception"},
> +    {EXCCODE_SXD, "128 bit vector instructions Disable exception"},
> +    {EXCCODE_ASXD, "256 bit vector instructions Disable exception"},
>   };
>   
>   const char *loongarch_exception_name(int32_t exception)
>   {
> -    assert(excp_names[exception]);
> -    return excp_names[exception];
> +    int i;
> +    const char *name = "unknown";
> +
> +    for (i = 0; i < ARRAY_SIZE(excp_names); i++) {
> +        if (excp_names[i].exccode == exception) {
> +            name = excp_names[i].name;
> +            break;
> +        }
> +    }
> +    return name;
>   }

I think you should return null for unknown, and then...

>   
>   void G_NORETURN do_raise_exception(CPULoongArchState *env,
> @@ -79,11 +92,17 @@ void G_NORETURN do_raise_exception(CPULoongArchState *env,
>                                      uintptr_t pc)
>   {
>       CPUState *cs = env_cpu(env);
> +    const char *name;
>   
> +    if (exception == EXCP_HLT) {
> +        name = "EXCP_HLT";
> +    } else {
> +        name = loongarch_exception_name(exception);
> +    }
>       qemu_log_mask(CPU_LOG_INT, "%s: %d (%s)\n",
>                     __func__,
>                     exception,
> -                  loongarch_exception_name(exception));
> +                  name);

... use two different printfs, one of which prints the exception number.
Why would you special case HLT here instead of putting it in the table?


r~
Re: [PATCH v1] target/loongarch: Fix qemu-system-loongarch64 assert failed with the option '-d int'
Posted by gaosong 1 year, 10 months ago 
在 2024/3/21 上午10:50, Richard Henderson 写道:
> On 3/20/24 16:11, Song Gao wrote:
>> qemu-system-loongarch64 assert failed with the option '-d int',
>> the helper_idle() raise an exception EXCP_HLT, but the exception name 
>> is undefined.
>>
>> Signed-off-by: Song Gao <gaosong@loongson.cn>
>> ---
>>   target/loongarch/cpu.c | 75 ++++++++++++++++++++++++++----------------
>>   1 file changed, 46 insertions(+), 29 deletions(-)
>>
>> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
>> index f6ffb3aadb..17a923de02 100644
>> --- a/target/loongarch/cpu.c
>> +++ b/target/loongarch/cpu.c
>> @@ -45,33 +45,46 @@ const char * const fregnames[32] = {
>>       "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
>>   };
>>   -static const char * const excp_names[] = {
>> -    [EXCCODE_INT] = "Interrupt",
>> -    [EXCCODE_PIL] = "Page invalid exception for load",
>> -    [EXCCODE_PIS] = "Page invalid exception for store",
>> -    [EXCCODE_PIF] = "Page invalid exception for fetch",
>> -    [EXCCODE_PME] = "Page modified exception",
>> -    [EXCCODE_PNR] = "Page Not Readable exception",
>> -    [EXCCODE_PNX] = "Page Not Executable exception",
>> -    [EXCCODE_PPI] = "Page Privilege error",
>> -    [EXCCODE_ADEF] = "Address error for instruction fetch",
>> -    [EXCCODE_ADEM] = "Address error for Memory access",
>> -    [EXCCODE_SYS] = "Syscall",
>> -    [EXCCODE_BRK] = "Break",
>> -    [EXCCODE_INE] = "Instruction Non-Existent",
>> -    [EXCCODE_IPE] = "Instruction privilege error",
>> -    [EXCCODE_FPD] = "Floating Point Disabled",
>> -    [EXCCODE_FPE] = "Floating Point Exception",
>> -    [EXCCODE_DBP] = "Debug breakpoint",
>> -    [EXCCODE_BCE] = "Bound Check Exception",
>> -    [EXCCODE_SXD] = "128 bit vector instructions Disable exception",
>> -    [EXCCODE_ASXD] = "256 bit vector instructions Disable exception",
>> +struct TypeExcp {
>> +    int32_t exccode;
>> +    const char *name;
>> +};
>> +
>> +static const struct TypeExcp excp_names[] = {
>> +    {EXCCODE_INT, "Interrupt"},
>> +    {EXCCODE_PIL, "Page invalid exception for load"},
>> +    {EXCCODE_PIS, "Page invalid exception for store"},
>> +    {EXCCODE_PIF, "Page invalid exception for fetch"},
>> +    {EXCCODE_PME, "Page modified exception"},
>> +    {EXCCODE_PNR, "Page Not Readable exception"},
>> +    {EXCCODE_PNX, "Page Not Executable exception"},
>> +    {EXCCODE_PPI, "Page Privilege error"},
>> +    {EXCCODE_ADEF, "Address error for instruction fetch"},
>> +    {EXCCODE_ADEM, "Address error for Memory access"},
>> +    {EXCCODE_SYS, "Syscall"},
>> +    {EXCCODE_BRK, "Break"},
>> +    {EXCCODE_INE, "Instruction Non-Existent"},
>> +    {EXCCODE_IPE, "Instruction privilege error"},
>> +    {EXCCODE_FPD, "Floating Point Disabled"},
>> +    {EXCCODE_FPE, "Floating Point Exception"},
>> +    {EXCCODE_DBP, "Debug breakpoint"},
>> +    {EXCCODE_BCE, "Bound Check Exception"},
>> +    {EXCCODE_SXD, "128 bit vector instructions Disable exception"},
>> +    {EXCCODE_ASXD, "256 bit vector instructions Disable exception"},
>>   };
>>     const char *loongarch_exception_name(int32_t exception)
>>   {
>> -    assert(excp_names[exception]);
>> -    return excp_names[exception];
>> +    int i;
>> +    const char *name = "unknown";
>> +
>> +    for (i = 0; i < ARRAY_SIZE(excp_names); i++) {
>> +        if (excp_names[i].exccode == exception) {
>> +            name = excp_names[i].name;
>> +            break;
>> +        }
>> +    }
>> +    return name;
>>   }
>
> I think you should return null for unknown, and then...
>
>>     void G_NORETURN do_raise_exception(CPULoongArchState *env,
>> @@ -79,11 +92,17 @@ void G_NORETURN 
>> do_raise_exception(CPULoongArchState *env,
>>                                      uintptr_t pc)
>>   {
>>       CPUState *cs = env_cpu(env);
>> +    const char *name;
>>   +    if (exception == EXCP_HLT) {
>> +        name = "EXCP_HLT";
>> +    } else {
>> +        name = loongarch_exception_name(exception);
>> +    }
>>       qemu_log_mask(CPU_LOG_INT, "%s: %d (%s)\n",
>>                     __func__,
>>                     exception,
>> -                  loongarch_exception_name(exception));
>> +                  name);
>
> ... use two different printfs, one of which prints the exception number.
> Why would you special case HLT here instead of putting it in the table?
>
Hmm,  put HLT in the table no problem.  I will correct it.

I considered HLT not a real exception to the LoongAarh architecture, so 
I didn't put it in the table.

Thanks.
Song Gao
>
> r~

Patchew 2.1-devel-b67e4c2

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