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Mon, 11 Mar 2024 00:58:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG74FTQp0LwMAB8+X3EK2PTCYHZZUx6dcToJE7q02YveAhpKzL8Uxp2k44swd48YeAwWss3vw== X-Received: by 2002:a17:906:a14c:b0:a45:432:cacc with SMTP id bu12-20020a170906a14c00b00a450432caccmr3060860ejb.61.1710143888113; Mon, 11 Mar 2024 00:58:08 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , qemu-stable@nongnu.org Subject: [PATCH] target/i386: fix direction of "32-bit MMU" test Date: Mon, 11 Mar 2024 08:58:06 +0100 Message-ID: <20240311075806.668555-1-pbonzini@redhat.com> X-Mailer: git-send-email 2.43.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.945, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1710143978974100003 Content-Type: text/plain; charset="utf-8" The low bit of MMU indices for x86 TCG indicates whether the processor is in 32-bit mode and therefore linear addresses have to be masked to 32 bits. However, the index was computed incorrectly, leading to possible conflicts in the TLB for any address above 4G. Analyzed-by: Mark Cave-Ayland Fixes: b1661801c18 ("target/i386: Fix physical address truncation", 2024-02= -28) Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2206 Signed-off-by: Paolo Bonzini Reviewed-by: Richard Henderson Tested-by: Mark Cave-Ayland --- target/i386/cpu.h | 2 +- target/i386/cpu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 952174bb6f5..6b057380791 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2334,7 +2334,7 @@ static inline bool is_mmu_index_32(int mmu_index) =20 static inline int cpu_mmu_index_kernel(CPUX86State *env) { - int mmu_index_32 =3D (env->hflags & HF_LMA_MASK) ? 1 : 0; + int mmu_index_32 =3D (env->hflags & HF_LMA_MASK) ? 0 : 1; int mmu_index_base =3D !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX : ((env->hflags & HF_CPL_MASK) < 3 && (env->eflags & AC_MASK)) ? MMU= _KNOSMAP64_IDX : MMU_KSMAP64_IDX; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 2666ef38089..78524bc6073 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7735,7 +7735,7 @@ static bool x86_cpu_has_work(CPUState *cs) static int x86_cpu_mmu_index(CPUState *cs, bool ifetch) { CPUX86State *env =3D cpu_env(cs); - int mmu_index_32 =3D (env->hflags & HF_CS64_MASK) ? 1 : 0; + int mmu_index_32 =3D (env->hflags & HF_CS64_MASK) ? 0 : 1; int mmu_index_base =3D (env->hflags & HF_CPL_MASK) =3D=3D 3 ? MMU_USER64_IDX : !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP64_IDX : --=20 2.43.2