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[78.54.149.80]) by smtp.gmail.com with ESMTPSA id jw15-20020a170906e94f00b00a3e86a9c55asm255088ejb.146.2024.02.18.05.17.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Feb 2024 05:17:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708262232; x=1708867032; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Mdrd6lyD+OAHQ6EU+CbZYbjUquylpmMCAszxB0ULtc8=; b=dELGuuXYEwYQv/vEa3EQB/+k3H5fqwn++oX+yVjjMt5dveA79gMcibkQQPoMVB5JV5 xhjnHuvhnJKbR6euDW1R/x8Deu2Zxo3CDYfTtxox/CLtRKL0khcGYgGR7v9baKpu9hNY gGA8FccVuWcOJVcNKyHPcWc+YjrSO2vQNL6mR4dTwyogxOgNmi20OaKIgMCi+ptBmfXM V/6SD+c/ntGFPU7qv6RCU0WHfcL6r+EGikVqr9yEFMxf+ntRysQTZ82LWhGGYw4c2bF/ gKO+frOKDXDC/yo9vawwX4O+am8TqQBAmoT5NiMktXzAjLodX+T11hOfGp2K/AlrkL8c v7dQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708262232; x=1708867032; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Mdrd6lyD+OAHQ6EU+CbZYbjUquylpmMCAszxB0ULtc8=; b=I6xyo787UikahjdsKHDNfbI9RBzXKS+Fblsc/XIbsXnuXzOxVgcOMP9w87Gqpe6qUt p9xzmmBFRriU5ldanD9Jy4mLl4NSK8CWLC+syPTFl5ck7waJmFHOce9UuPmu1aBKvG7M zeLbrJGA09SdF4BARaIuLYX7SF0xzKZWN0AqAcVzosQobvakU8poT0os45TFiBU2B5CZ 6Y5qV5uWr8L0afrAqn5H1fnMX1rFreeOJZD03Y3dFZ8kobmr8bKDBZzlTN89eO+F62Pr EZG8JZTtTrZUdlgm6V80QoJCb2vk8KGkG7OoOsD/OTBLDXk38vAo3L9aGXFRhSy0dNQe T86A== X-Gm-Message-State: AOJu0YyAP7hm/F/K/2Pj4Dxm+zmTocfF2lLmxD05lZOc/FPPXbegyPGJ 57dYvROU2kg4jYCKGtGuXTarSlQwei/u0yD8BIJsU+JRfi5cOfazBiurrpik X-Google-Smtp-Source: AGHT+IGMd+2Cp8gB7CEybE8+YTsZ9Ci7+kWqGGHMGMY4sw9wz5cw36tr7LtnCOcBElL62x6S3qYSMA== X-Received: by 2002:a17:906:b259:b0:a3e:56d5:71fd with SMTP id ce25-20020a170906b25900b00a3e56d571fdmr1335568ejb.47.1708262231581; Sun, 18 Feb 2024 05:17:11 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Eduardo Habkost , "Michael S. Tsirkin" , BALATON Zoltan , Aurelien Jarno , Jiaxun Yang , Richard Henderson , Marcel Apfelbaum , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow Subject: [PATCH 1/5] hw/isa/meson.build: Sort alphabetically Date: Sun, 18 Feb 2024 14:16:57 +0100 Message-ID: <20240218131701.91132-2-shentey@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240218131701.91132-1-shentey@gmail.com> References: <20240218131701.91132-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=shentey@gmail.com; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1708262301490100003 Content-Type: text/plain; charset="utf-8" Fixes: fbd758008f0f "hw/isa: extract FDC37M81X to a separate file" Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/isa/meson.build b/hw/isa/meson.build index f650b39507..3219282217 100644 --- a/hw/isa/meson.build +++ b/hw/isa/meson.build @@ -1,10 +1,10 @@ system_ss.add(when: 'CONFIG_APM', if_true: files('apm.c')) +system_ss.add(when: 'CONFIG_FDC37M81X', if_true: files('fdc37m81x-superio.= c')) system_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c')) system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c')) system_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c')) system_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c')) system_ss.add(when: 'CONFIG_PIIX', if_true: files('piix.c')) -system_ss.add(when: 'CONFIG_FDC37M81X', if_true: files('fdc37m81x-superio.= c')) system_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.= c')) system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c')) =20 --=20 2.43.2 From nobody Fri May 10 01:33:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[78.54.149.80]) by smtp.gmail.com with ESMTPSA id jw15-20020a170906e94f00b00a3e86a9c55asm255088ejb.146.2024.02.18.05.17.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Feb 2024 05:17:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708262233; x=1708867033; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rNHqg32yvu2/OzdJqsuxrP3LIZ9BKLDlqJsOBukYfYk=; b=FeBldmd6mbM141UB3i6lpWb1rqOTjGXEZjhomThDhW0P4RQx5drUSrEDuhsK0cteH1 mfbvt/J4wibdPoQFIL0GFwf+0YQOeIWYuSeZn43Fx7SNDhz0jJOifc7vA4vOYO4HnNF/ ofplSbT4z1E7mdlMN8w0dogC50NiF4xLBpO5/qthTvDMysKlKSkJktjAk2L5D/LCPWau 4XnwgPYKYAe5nO9R3PC2pVn/LWdshH5fd3FXA+zN9bhZVI1rfvqN4sHPaWciEFNXKP4d Bz7eSp8yY0AbBK4RERpMqmNdQB8r6CrMq4aiFH8W3FrQgN5zq4wiYwV9nPW143hiEBMb 7pwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708262233; x=1708867033; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rNHqg32yvu2/OzdJqsuxrP3LIZ9BKLDlqJsOBukYfYk=; b=q3oMYg4fw+O9JC4V5K8pz6cli8fv69jolLCIC3zJ/Ec43/yHJe0yCLtEh8isWNvdLm oIqIXTjURIKA/L20+wcEl/Wuq8xLKW6MOHmlstC9mn8OKZexh9EPk8zefC3OBfKUNygV YZb9OFjRNXndhU22LcqmQ/zn7n2wjQlsc94qrNY2I5DPsP6dWJpNTGXUnEVtGPEWnTvd bx8+cM3bbwLKjLynSbv3B9v0WqzU4Suz12LEO7VQb9G/c69mIWMvjyijaImS578ldb95 MBKnx8rTTmgvnFuK9zFiBNpyNgiTarnFmOWs/X2Jho3sQwqExudq/LTMpCE+8UUOxm4Q nEbg== X-Gm-Message-State: AOJu0Yz6zo+0vg4926wgYsZEscX6U06fEFyteGCptMDcVJ30iVOPHq72 rUeUMa6D9Zk05sk9nJVLIYWeEGFydZmNYDFC0RKqQ46SBJvhXr+gsVOG/5tY X-Google-Smtp-Source: AGHT+IFVOfWuJwoAVbI/6fUiDTGVaEmeNlkYhWjZM3qx4RseTjkzbvDQzRE51We7cEjxh3fYcyAlrg== X-Received: by 2002:a17:906:ad96:b0:a3e:89b7:3acd with SMTP id la22-20020a170906ad9600b00a3e89b73acdmr341918ejb.77.1708262233182; Sun, 18 Feb 2024 05:17:13 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Eduardo Habkost , "Michael S. Tsirkin" , BALATON Zoltan , Aurelien Jarno , Jiaxun Yang , Richard Henderson , Marcel Apfelbaum , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow Subject: [PATCH 2/5] hw/i386/port92: Allow for TYPE_PORT92 to be embedded in devices Date: Sun, 18 Feb 2024 14:16:58 +0100 Message-ID: <20240218131701.91132-3-shentey@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240218131701.91132-1-shentey@gmail.com> References: <20240218131701.91132-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=shentey@gmail.com; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1708262315640100003 Content-Type: text/plain; charset="utf-8" Port 92 is an integral part of south bridges. Allow for embedding it there. South bridges aren't architecture-specific, so move port92.c to hw/isa whic= h is accessible to other architectures than x86. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland --- include/hw/i386/pc.h | 5 ----- include/hw/isa/port92.h | 30 ++++++++++++++++++++++++++++++ hw/i386/pc.c | 1 + hw/{i386 =3D> isa}/port92.c | 14 +------------- hw/i386/Kconfig | 1 + hw/i386/meson.build | 3 +-- hw/i386/trace-events | 4 ---- hw/isa/Kconfig | 3 +++ hw/isa/meson.build | 1 + hw/isa/trace-events | 4 ++++ 10 files changed, 42 insertions(+), 24 deletions(-) create mode 100644 include/hw/isa/port92.h rename hw/{i386 =3D> isa}/port92.c (91%) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index ec0e5efcb2..b2987209b1 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -188,11 +188,6 @@ void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus= , PCIBus *pci_bus); =20 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); =20 -/* port92.c */ -#define PORT92_A20_LINE "a20" - -#define TYPE_PORT92 "port92" - /* pc_sysfw.c */ void pc_system_flash_create(PCMachineState *pcms); void pc_system_flash_cleanup_unused(PCMachineState *pcms); diff --git a/include/hw/isa/port92.h b/include/hw/isa/port92.h new file mode 100644 index 0000000000..214783d071 --- /dev/null +++ b/include/hw/isa/port92.h @@ -0,0 +1,30 @@ +/* + * QEMU I/O port 0x92 (System Control Port A, to handle Fast Gate A20) + * + * Copyright (c) 2003-2004 Fabrice Bellard + * + * SPDX-License-Identifier: MIT + */ + +#ifndef HW_PORT92_H +#define HW_PORT92_H + +#include "exec/memory.h" +#include "hw/irq.h" +#include "hw/isa/isa.h" +#include "qom/object.h" + +#define TYPE_PORT92 "port92" +OBJECT_DECLARE_SIMPLE_TYPE(Port92State, PORT92) + +struct Port92State { + ISADevice parent_obj; + + MemoryRegion io; + uint8_t outport; + qemu_irq a20_out; +}; + +#define PORT92_A20_LINE "a20" + +#endif /* HW_PORT92_H */ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 196827531a..0b11d4576e 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -32,6 +32,7 @@ #include "hw/i386/vmport.h" #include "sysemu/cpus.h" #include "hw/ide/internal.h" +#include "hw/isa/port92.h" #include "hw/timer/hpet.h" #include "hw/loader.h" #include "hw/rtc/mc146818rtc.h" diff --git a/hw/i386/port92.c b/hw/isa/port92.c similarity index 91% rename from hw/i386/port92.c rename to hw/isa/port92.c index 1070bfbf36..06df06b088 100644 --- a/hw/i386/port92.c +++ b/hw/isa/port92.c @@ -9,20 +9,8 @@ #include "qemu/osdep.h" #include "sysemu/runstate.h" #include "migration/vmstate.h" -#include "hw/irq.h" -#include "hw/i386/pc.h" +#include "hw/isa/port92.h" #include "trace.h" -#include "qom/object.h" - -OBJECT_DECLARE_SIMPLE_TYPE(Port92State, PORT92) - -struct Port92State { - ISADevice parent_obj; - - MemoryRegion io; - uint8_t outport; - qemu_irq a20_out; -}; =20 static void port92_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index a1846be6f7..ccf6de4a00 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -37,6 +37,7 @@ config PC select I8254 select PCKBD select PCSPK + select PORT92 select I8257 select MC146818RTC # For ACPI builder: diff --git a/hw/i386/meson.build b/hw/i386/meson.build index b9c1ca39cb..94d558edd6 100644 --- a/hw/i386/meson.build +++ b/hw/i386/meson.build @@ -24,8 +24,7 @@ i386_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-com= mon.c')) i386_ss.add(when: 'CONFIG_PC', if_true: files( 'pc.c', 'pc_sysfw.c', - 'acpi-build.c', - 'port92.c')) + 'acpi-build.c')) i386_ss.add(when: 'CONFIG_X86_FW_OVMF', if_true: files('pc_sysfw_ovmf.c'), if_false: files('pc_sysfw_ovmf-stu= bs.c')) =20 diff --git a/hw/i386/trace-events b/hw/i386/trace-events index 53c02d7ac8..b730589394 100644 --- a/hw/i386/trace-events +++ b/hw/i386/trace-events @@ -118,10 +118,6 @@ vmport_command(unsigned char command) "command: 0x%02x" x86_gsi_interrupt(int irqn, int level) "GSI interrupt #%d level:%d" x86_pic_interrupt(int irqn, int level) "PIC interrupt #%d level:%d" =20 -# port92.c -port92_read(uint8_t val) "port92: read 0x%02x" -port92_write(uint8_t val) "port92: write 0x%02x" - # vmmouse.c vmmouse_get_status(void) "" vmmouse_mouse_event(int x, int y, int dz, int buttons_state) "event: x=3D%= d y=3D%d dz=3D%d state=3D%d" diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 73c6470805..efdf43e92c 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -49,6 +49,9 @@ config PIIX select MC146818RTC select USB_UHCI =20 +config PORT92 + bool + config VT82C686 bool select ISA_BUS diff --git a/hw/isa/meson.build b/hw/isa/meson.build index 3219282217..fb7cd44984 100644 --- a/hw/isa/meson.build +++ b/hw/isa/meson.build @@ -5,6 +5,7 @@ system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-b= us.c')) system_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c')) system_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c')) system_ss.add(when: 'CONFIG_PIIX', if_true: files('piix.c')) +system_ss.add(when: 'CONFIG_PORT92', if_true: files('port92.c')) system_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.= c')) system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c')) =20 diff --git a/hw/isa/trace-events b/hw/isa/trace-events index 1816e8307a..bb5d9f1078 100644 --- a/hw/isa/trace-events +++ b/hw/isa/trace-events @@ -10,6 +10,10 @@ superio_create_ide(int id, uint16_t base, unsigned int i= rq) "id=3D%d, base 0x%03x, pc87312_io_read(uint32_t addr, uint32_t val) "read addr=3D0x%x val=3D0x%x" pc87312_io_write(uint32_t addr, uint32_t val) "write addr=3D0x%x val=3D0x%= x" =20 +# port92.c +port92_read(uint8_t val) "port92: read 0x%02x" +port92_write(uint8_t val) "port92: write 0x%02x" + # apm.c apm_io_read(uint8_t addr, uint8_t val) "read addr=3D0x%x val=3D0x%02x" apm_io_write(uint8_t addr, uint8_t val) "write addr=3D0x%x val=3D0x%02x" --=20 2.43.2 From nobody Fri May 10 01:33:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[78.54.149.80]) by smtp.gmail.com with ESMTPSA id jw15-20020a170906e94f00b00a3e86a9c55asm255088ejb.146.2024.02.18.05.17.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Feb 2024 05:17:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708262235; x=1708867035; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8bpKjyoMDRK8juFb51Ouwz4NqlRTWYN2GO2yL0PSumY=; b=fSNrpO0DuSJNBGUy0gLWkxw+yFltV/6Jmsq+Lw6u965vao8rRR8fH20mPWQ8uxIu+C S8m7j6ZJitpFjNwioRq1QLBu+ojBnZIVK4iy+adycZXV3n+6vK8WHeh2IdX3CJgYRU0a MMm4m5HGNT+ZyaD2+kOuMzyZOn0/XQi900gcJaAw2nzaCw3Q142rdsg9JZMZBGgWACs7 tp9+Dgl4HvA5qKTHWVTMnTzAgsPwy7Ydc6Hh3bpWOdjmQaQAK9QdECG5shioY2q2Euas cQ8++TJg2M/284BsBCi6lniEJ5We/FQzkoMsuc7oSzUHmozHGXV5wLBBqkoSvt0YWaJw +aPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708262235; x=1708867035; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8bpKjyoMDRK8juFb51Ouwz4NqlRTWYN2GO2yL0PSumY=; b=SaS1klFZpuxqAxa/10WrcY+SLtDWczcYYXleqZ7nGBMPWyGWbNKSfpkQpUeIlX4QYb /8ILas/ma15tgn/ZwNnB89j/6LkbmSgmFtFL78c3CZMyuydtR/guRTQK9cP1FLYD6kdc 6eZzRAT27EZPd011mRHpSxny/nC73SFWLJp1ClWPXwrMAciUNrFJSX6hGwuewEw6qFaO lznfY80CoqtxyFtvHEYXiD401nkn09o3B5elZSkVSz044BaPSWKuiLLMtQ7DcTVzR402 rYxTmERY7DIY7uWJXBVg6SAvSfHYCo3ycFklH+tRxfsbECk9bhz4f0vALH2EgHq0urGb If8g== X-Gm-Message-State: AOJu0YyyCVHc8X2ROFUmaoOyi2ruU7X+DF9XIN51g6JnZhSHZEWzNXLJ H9FtowBN3VlqOQQsmx6DuQD+hLvGmd4zpvy5tgq/sO2y2/BQo+DLty+lIw5N X-Google-Smtp-Source: AGHT+IFaCGKWV4X9LsCXZ7avy0rnTz2oyQT+AjXEsLotnRvLzVRimZN/2orCaDf86xpUtUgjHWoDEw== X-Received: by 2002:a17:906:c297:b0:a3e:8b8e:8795 with SMTP id r23-20020a170906c29700b00a3e8b8e8795mr448002ejz.34.1708262235283; Sun, 18 Feb 2024 05:17:15 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , Eduardo Habkost , "Michael S. Tsirkin" , BALATON Zoltan , Aurelien Jarno , Jiaxun Yang , Richard Henderson , Marcel Apfelbaum , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow Subject: [PATCH 3/5] hw/isa: Embed TYPE_PORT92 in south bridges used in PC machines Date: Sun, 18 Feb 2024 14:16:59 +0100 Message-ID: <20240218131701.91132-4-shentey@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240218131701.91132-1-shentey@gmail.com> References: <20240218131701.91132-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=shentey@gmail.com; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1708262319696100011 Content-Type: text/plain; charset="utf-8" Port 92 is an integral part of the PIIX and ICH south bridges, so instantia= te it there. The isapc machine now needs to instantiate it explicitly, analoguous= to the RTC. Note that due to migration compatibility, port92 is optional in the south bridges. It is always instantiated the isapc machine for simplicity. Signed-off-by: Bernhard Beschow --- include/hw/i386/pc.h | 2 +- include/hw/southbridge/ich9.h | 4 ++++ include/hw/southbridge/piix.h | 3 +++ hw/i386/pc.c | 18 ++++++++++++------ hw/i386/pc_piix.c | 9 +++++++-- hw/i386/pc_q35.c | 8 +++++--- hw/isa/lpc_ich9.c | 9 +++++++++ hw/isa/piix.c | 9 +++++++++ hw/isa/Kconfig | 2 ++ 9 files changed, 52 insertions(+), 12 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index b2987209b1..a9ff1f5ab3 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -178,7 +178,7 @@ uint64_t pc_pci_hole64_start(void); DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); void pc_basic_device_init(struct PCMachineState *pcms, ISABus *isa_bus, qemu_irq *gsi, - ISADevice *rtc_state, + ISADevice *rtc_state, ISADevice *port92, bool create_fdctrl, uint32_t hpet_irqs); void pc_cmos_init(PCMachineState *pcms, diff --git a/include/hw/southbridge/ich9.h b/include/hw/southbridge/ich9.h index fd01649d04..d70a94f5e7 100644 --- a/include/hw/southbridge/ich9.h +++ b/include/hw/southbridge/ich9.h @@ -3,6 +3,7 @@ =20 #include "hw/isa/apm.h" #include "hw/acpi/ich9.h" +#include "hw/isa/port92.h" #include "hw/intc/ioapic.h" #include "hw/pci/pci.h" #include "hw/pci/pci_device.h" @@ -32,6 +33,7 @@ struct ICH9LPCState { uint8_t irr[PCI_SLOT_MAX][PCI_NUM_PINS]; =20 MC146818RtcState rtc; + Port92State port92; APMState apm; ICH9LPCPMRegs pm; uint32_t sci_level; /* track sci level */ @@ -54,6 +56,8 @@ struct ICH9LPCState { uint8_t rst_cnt; MemoryRegion rst_cnt_mem; =20 + bool has_port92; + /* SMI feature negotiation via fw_cfg */ uint64_t smi_host_features; /* guest-invisible, host endian */ uint8_t smi_host_features_le[8]; /* guest-visible, read-only, little diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 86709ba2e4..35058529d1 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -15,6 +15,7 @@ #include "hw/pci/pci_device.h" #include "hw/acpi/piix4.h" #include "hw/ide/pci.h" +#include "hw/isa/port92.h" #include "hw/rtc/mc146818rtc.h" #include "hw/usb/hcd-uhci.h" =20 @@ -56,6 +57,7 @@ struct PIIXState { int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; =20 MC146818RtcState rtc; + Port92State port92; PCIIDEState ide; UHCIState uhci; PIIX4PMState pm; @@ -71,6 +73,7 @@ struct PIIXState { bool has_acpi; bool has_pic; bool has_pit; + bool has_port92; bool has_usb; bool smm_enabled; }; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0b11d4576e..8b601ea6cf 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1160,7 +1160,7 @@ static void pc_superio_init(ISABus *isa_bus, bool cre= ate_fdctrl, int i; DriveInfo *fd[MAX_FD]; qemu_irq *a20_line; - ISADevice *fdc, *i8042, *port92, *vmmouse; + ISADevice *fdc, *i8042, *vmmouse; =20 serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS); parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS); @@ -1193,18 +1193,15 @@ static void pc_superio_init(ISABus *isa_bus, bool c= reate_fdctrl, &error_abort); isa_realize_and_unref(vmmouse, isa_bus, &error_fatal); } - port92 =3D isa_create_simple(isa_bus, TYPE_PORT92); =20 - a20_line =3D qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); + a20_line =3D qemu_allocate_irqs(handle_a20_line_change, first_cpu, 1); i8042_setup_a20_line(i8042, a20_line[0]); - qdev_connect_gpio_out_named(DEVICE(port92), - PORT92_A20_LINE, 0, a20_line[1]); g_free(a20_line); } =20 void pc_basic_device_init(struct PCMachineState *pcms, ISABus *isa_bus, qemu_irq *gsi, - ISADevice *rtc_state, + ISADevice *rtc_state, ISADevice *port92, bool create_fdctrl, uint32_t hpet_irqs) { @@ -1296,6 +1293,15 @@ void pc_basic_device_init(struct PCMachineState *pcm= s, /* Super I/O */ pc_superio_init(isa_bus, create_fdctrl, pcms->i8042_enabled, pcms->vmport !=3D ON_OFF_AUTO_ON); + + if (port92) { + qemu_irq *a20_line; + + a20_line =3D qemu_allocate_irqs(handle_a20_line_change, first_cpu,= 1); + qdev_connect_gpio_out_named(DEVICE(port92), + PORT92_A20_LINE, 0, a20_line[0]); + g_free(a20_line); + } } =20 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 999b7b806c..dfdfd36551 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -115,7 +115,7 @@ static void pc_init1(MachineState *machine, qemu_irq smi_irq; GSIState *gsi_state; BusState *idebus[MAX_IDE_BUS]; - ISADevice *rtc_state; + ISADevice *rtc_state, *port92; MemoryRegion *ram_memory; MemoryRegion *pci_memory =3D NULL; MemoryRegion *rom_memory =3D system_memory; @@ -269,6 +269,8 @@ static void pc_init1(MachineState *machine, &error_abort); object_property_set_bool(OBJECT(pci_dev), "has-pit", false, &error_abort); + object_property_set_bool(OBJECT(pci_dev), "has-port92", + pcms->i8042_enabled, &error_abort); qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100); object_property_set_bool(OBJECT(pci_dev), "smm-enabled", x86_machine_is_smm_enabled(x86ms), @@ -296,6 +298,8 @@ static void pc_init1(MachineState *machine, isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); rtc_state =3D ISA_DEVICE(object_resolve_path_component(OBJECT(pci_= dev), "rtc")); + port92 =3D ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev= ), + "port92")); piix4_pm =3D object_resolve_path_component(OBJECT(pci_dev), "pm"); dev =3D DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide= ")); pci_ide_create_devs(PCI_DEVICE(dev)); @@ -310,6 +314,7 @@ static void pc_init1(MachineState *machine, qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000); isa_realize_and_unref(rtc_state, isa_bus, &error_fatal); =20 + port92 =3D isa_create_simple(isa_bus, TYPE_PORT92); i8257_dma_init(OBJECT(machine), isa_bus, 0); pcms->hpet_enabled =3D false; idebus[0] =3D NULL; @@ -336,7 +341,7 @@ static void pc_init1(MachineState *machine, } =20 /* init basic PC hardware */ - pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, true, + pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, port92, tru= e, 0x4); =20 pc_nic_init(pcmc, isa_bus, pci_bus); diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index d346fa3b1d..26bb1c2cb9 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -127,7 +127,7 @@ static void pc_q35_init(MachineState *machine) PCIDevice *lpc; DeviceState *lpc_dev; BusState *idebus[MAX_SATA_PORTS]; - ISADevice *rtc_state; + ISADevice *rtc_state, *port92; MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *system_io =3D get_system_io(); MemoryRegion *pci_memory =3D g_new(MemoryRegion, 1); @@ -238,6 +238,7 @@ static void pc_q35_init(MachineState *machine) lpc =3D pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), TYPE_ICH9_LPC_DEVICE); lpc_dev =3D DEVICE(lpc); + qdev_prop_set_bit(lpc_dev, "has-port92", pcms->i8042_enabled); qdev_prop_set_bit(lpc_dev, "smm-enabled", x86_machine_is_smm_enabled(x86ms)); pci_realize_and_unref(lpc, host_bus, &error_fatal); @@ -246,6 +247,7 @@ static void pc_q35_init(MachineState *machine) } =20 rtc_state =3D ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "r= tc")); + port92 =3D ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "port= 92")); =20 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, TYPE_HOTPLUG_HANDLER, @@ -287,8 +289,8 @@ static void pc_q35_init(MachineState *machine) } =20 /* init basic PC hardware */ - pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, !mc->no_flo= ppy, - 0xff0104); + pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, port92, + !mc->no_floppy, 0xff0104); =20 if (pcms->sata_enabled) { PCIDevice *pdev; diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 70c6e8a093..3be5bc01b1 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -749,6 +749,14 @@ static void ich9_lpc_realize(PCIDevice *d, Error **err= p) irq =3D object_property_get_uint(OBJECT(&lpc->rtc), "irq", &error_fata= l); isa_connect_gpio_out(ISA_DEVICE(&lpc->rtc), 0, irq); =20 + if (lpc->has_port92) { + object_initialize_child(OBJECT(lpc), "port92", &lpc->port92, + TYPE_PORT92); + if (!qdev_realize(DEVICE(&lpc->port92), BUS(isa_bus), errp)) { + return; + } + } + pci_bus_irqs(pci_bus, ich9_lpc_set_irq, d, ICH9_LPC_NB_PIRQS); pci_bus_map_irqs(pci_bus, ich9_lpc_map_irq); pci_bus_set_route_irq_fn(pci_bus, ich9_route_intx_pin_to_irq); @@ -821,6 +829,7 @@ static Property ich9_lpc_properties[] =3D { DEFINE_PROP_BOOL("noreboot", ICH9LPCState, pin_strap.spkr_hi, false), DEFINE_PROP_BOOL("smm-compat", ICH9LPCState, pm.smm_compat, false), DEFINE_PROP_BOOL("smm-enabled", ICH9LPCState, pm.smm_enabled, false), + DEFINE_PROP_BOOL("has-port92", ICH9LPCState, has_port92, true), DEFINE_PROP_BIT64("x-smi-broadcast", ICH9LPCState, smi_host_features, ICH9_LPC_SMI_F_BROADCAST_BIT, true), DEFINE_PROP_BIT64("x-smi-cpu-hotplug", ICH9LPCState, smi_host_features, diff --git a/hw/isa/piix.c b/hw/isa/piix.c index 2d30711b17..4c12855461 100644 --- a/hw/isa/piix.c +++ b/hw/isa/piix.c @@ -346,6 +346,14 @@ static void pci_piix_realize(PCIDevice *dev, const cha= r *uhci_type, irq =3D object_property_get_uint(OBJECT(&d->rtc), "irq", &error_fatal); isa_connect_gpio_out(ISA_DEVICE(&d->rtc), 0, irq); =20 + /* Port 92 */ + if (d->has_port92) { + object_initialize_child(OBJECT(d), "port92", &d->port92, TYPE_PORT= 92); + if (!qdev_realize(DEVICE(&d->port92), BUS(isa_bus), errp)) { + return; + } + } + /* IDE */ qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1); if (!qdev_realize(DEVICE(&d->ide), BUS(pci_bus), errp)) { @@ -413,6 +421,7 @@ static Property pci_piix_props[] =3D { DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true), DEFINE_PROP_BOOL("has-pic", PIIXState, has_pic, true), DEFINE_PROP_BOOL("has-pit", PIIXState, has_pit, true), + DEFINE_PROP_BOOL("has-port92", PIIXState, has_port92, true), DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true), DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index efdf43e92c..f42a087c07 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -47,6 +47,7 @@ config PIIX select IDE_PIIX select ISA_BUS select MC146818RTC + select PORT92 select USB_UHCI =20 config PORT92 @@ -78,3 +79,4 @@ config LPC_ICH9 select ISA_BUS select ACPI_ICH9 select MC146818RTC + select PORT92 --=20 2.43.2 From nobody Fri May 10 01:33:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Tsirkin" , BALATON Zoltan , Aurelien Jarno , Jiaxun Yang , Richard Henderson , Marcel Apfelbaum , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow Subject: [PATCH 4/5] hw/i386/pc: Inline i8042_setup_a20_line() and remove it Date: Sun, 18 Feb 2024 14:17:00 +0100 Message-ID: <20240218131701.91132-5-shentey@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240218131701.91132-1-shentey@gmail.com> References: <20240218131701.91132-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=shentey@gmail.com; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1708262317656100007 Content-Type: text/plain; charset="utf-8" This function is used once in the pc machines. Remove it since it contains = one line only. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/input/i8042.h | 1 - hw/i386/pc.c | 2 +- hw/input/pckbd.c | 5 ----- 3 files changed, 1 insertion(+), 7 deletions(-) diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h index 9fb3f8d787..e90f008b66 100644 --- a/include/hw/input/i8042.h +++ b/include/hw/input/i8042.h @@ -89,7 +89,6 @@ struct MMIOKBDState { =20 =20 void i8042_isa_mouse_fake_event(ISAKBDState *isa); -void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); =20 static inline bool i8042_present(void) { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8b601ea6cf..1b2077dc32 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1195,7 +1195,7 @@ static void pc_superio_init(ISABus *isa_bus, bool cre= ate_fdctrl, } =20 a20_line =3D qemu_allocate_irqs(handle_a20_line_change, first_cpu, 1); - i8042_setup_a20_line(i8042, a20_line[0]); + qdev_connect_gpio_out_named(DEVICE(i8042), I8042_A20_LINE, 0, a20_line= [0]); g_free(a20_line); } =20 diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 90a4d9eb40..74f10b640f 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -777,11 +777,6 @@ void i8042_isa_mouse_fake_event(ISAKBDState *isa) ps2_mouse_fake_event(&s->ps2mouse); } =20 -void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out) -{ - qdev_connect_gpio_out_named(DEVICE(dev), I8042_A20_LINE, 0, a20_out); -} - static const VMStateDescription vmstate_kbd_isa =3D { .name =3D "pckbd", .version_id =3D 3, --=20 2.43.2 From nobody Fri May 10 01:33:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1708262296; cv=none; d=zohomail.com; s=zohoarc; b=II/cfrywbbM4+BuKTCxjpx0RTHp9O2YOojr8Kl5sgfsejKT5qF2k49l0wDqvAzy9R5QnVI8R0P/JrdstZqlAA1QSvgobeZruol1+HtJKkVuxulERVeKHhwBVwHGa8leXgaRd47NKk9VX6FYmVwCzQLpkkIXW/sJEYm2/tA42oBc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1708262296; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=8Bh5JWkARm7F+KGgyKASEzzRgeCfrtjvyMyrKpxULIs=; b=jtZNGL2hs+UjDwbtMBeDXHucDWopBc4xUb/vO8wmABmMXuq4y6rco0jLvx/H25U6jCJ0Gy06otIMHkoSOLsPgtxN0+W6k+MEMHleG83l+xckLvri6LSXXP1KNfgYt6pMeokcCx7ls6BenAAyIwPcGhdZtj4rmuD95HdJG0GoCus= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17082622964541017.6139000418027; Sun, 18 Feb 2024 05:18:16 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rbh2q-0004C7-QR; Sun, 18 Feb 2024 08:17:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rbh2p-0004Ba-AY for qemu-devel@nongnu.org; Sun, 18 Feb 2024 08:17:23 -0500 Received: from mail-ed1-x530.google.com ([2a00:1450:4864:20::530]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rbh2n-0007vM-LZ for qemu-devel@nongnu.org; Sun, 18 Feb 2024 08:17:22 -0500 Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-55f50cf2021so4711287a12.1 for ; Sun, 18 Feb 2024 05:17:21 -0800 (PST) Received: from archlinux.. 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Tsirkin" , BALATON Zoltan , Aurelien Jarno , Jiaxun Yang , Richard Henderson , Marcel Apfelbaum , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Bernhard Beschow Subject: [PATCH 5/5] hw/isa/vt82c686: Embed TYPE_PORT92 Date: Sun, 18 Feb 2024 14:17:01 +0100 Message-ID: <20240218131701.91132-6-shentey@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240218131701.91132-1-shentey@gmail.com> References: <20240218131701.91132-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=shentey@gmail.com; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1708262298105100003 Content-Type: text/plain; charset="utf-8" Port 92 is an integral part of the south bridge, so instantiate it there. Signed-off-by: Bernhard Beschow --- hw/isa/vt82c686.c | 7 +++++++ hw/isa/Kconfig | 1 + 2 files changed, 8 insertions(+) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index aa91942745..c7b96b3133 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -22,6 +22,7 @@ #include "hw/qdev-properties.h" #include "hw/ide/pci.h" #include "hw/isa/isa.h" +#include "hw/isa/port92.h" #include "hw/isa/superio.h" #include "hw/intc/i8259.h" #include "hw/irq.h" @@ -597,6 +598,7 @@ struct ViaISAState { uint16_t irq_state[ISA_NUM_IRQS]; ViaSuperIOState via_sio; MC146818RtcState rtc; + Port92State port92; PCIIDEState ide; UHCIState uhci[2]; ViaPMState pm; @@ -619,6 +621,7 @@ static void via_isa_init(Object *obj) ViaISAState *s =3D VIA_ISA(obj); =20 object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); + object_initialize_child(obj, "port92", &s->port92, TYPE_PORT92); object_initialize_child(obj, "ide", &s->ide, TYPE_VIA_IDE); object_initialize_child(obj, "uhci1", &s->uhci[0], TYPE_VT82C686B_USB_= UHCI); object_initialize_child(obj, "uhci2", &s->uhci[1], TYPE_VT82C686B_USB_= UHCI); @@ -740,6 +743,10 @@ static void via_isa_realize(PCIDevice *d, Error **errp) } isa_connect_gpio_out(ISA_DEVICE(&s->rtc), 0, s->rtc.isairq); =20 + if (!qdev_realize(DEVICE(&s->port92), BUS(isa_bus), errp)) { + return; + } + for (i =3D 0; i < PCI_CONFIG_HEADER_SIZE; i++) { if (i < PCI_COMMAND || i >=3D PCI_REVISION_ID) { d->wmask[i] =3D 0; diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index f42a087c07..d94f58a2c1 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -66,6 +66,7 @@ config VT82C686 select I8259 select IDE_VIA select MC146818RTC + select PORT92 =20 config SMC37C669 bool --=20 2.43.2