Generate interrupt if either of the TXE, TC or RXNE bits are active
and the corresponding interrupt enable bit is set.

v3:
 - Drop patch "hw/char/stm32f2xx_usart: Update IRQ when SR is read" as
   it is not required

Hans-Erik Floryd (3):
  hw/char/stm32f2xx_usart: Extract common IRQ update code to
    update_irq()
  hw/char/stm32f2xx_usart: Update IRQ when DR is written
  hw/char/stm32f2xx_usart: Add more definitions for CR1 register

 hw/char/stm32f2xx_usart.c         | 29 +++++++++++++++++------------
 include/hw/char/stm32f2xx_usart.h | 10 ++++++----
 2 files changed, 23 insertions(+), 16 deletions(-)

-- 
2.42.0

On Mon, 30 Oct 2023 at 15:15, Hans-Erik Floryd
<hans-erik.floryd@rt-labs.com> wrote:
>
> Generate interrupt if either of the TXE, TC or RXNE bits are active
> and the corresponding interrupt enable bit is set.
>
> v3:
>  - Drop patch "hw/char/stm32f2xx_usart: Update IRQ when SR is read" as
>    it is not required

Applied to target-arm.next. Thanks for this contribution!

-- PMM