[v3] riscv: query-cpu-model-expansion API

[PATCH v3 0/6] riscv: query-cpu-model-expansion API

Posted by Daniel Henrique Barboza 6 months, 2 weeks ago

Hi,

This is a re-send of v2 after fixing a trivial conflict with Alistair's
riscv-to-apply.next.

No other changes made. All patches acked.

Changes from v2:
- rebased with Alistair's riscv-to-apply.next
- v2 link: https://lore.kernel.org/qemu-riscv/20230926184019.166352-1-dbarboza@ventanamicro.com/


--- API usage examples ---

Launch QEMU with "-S" to be able to issue QMP query commands before the machine starts:

$ ./build/qemu-system-riscv64 -S -M virt -display none -qmp  tcp:localhost:1234,server,wait=off

Then use QMP to access the API:

$ ./scripts/qmp/qmp-shell localhost:1234
Welcome to the QMP low-level shell!
Connected to QEMU 8.1.50

- Query the default attributes for the 'rv64' CPU:

(QEMU)  query-cpu-model-expansion type=full model={"name":"rv64"}
{"return": {"model": {"name": "rv64", "props": {"zicond": false, "x-zvfh": false, "mmu": true, "x-zvfbfwma": false, "x-zvfbfmin": false, "xtheadbs": false, "xtheadbb": false, "xtheadba": false, "xtheadmemidx": false, "smstateen": false, "zfinx": false, "Zve64f": false, "Zve32f": false, "x-zvfhmin": false, "xventanacondops": false, "xtheadcondmov": false, "svpbmt": false, "zbs": true, "zbc": true, "zbb": true, "zba": true, "zicboz": true, "xtheadmac": false, "Zfh": false, "Zfa": true, "zbkx": false, "zbkc": false, "zbkb": false, "Zve64d": false, "x-zfbfmin": false, "zk": false, "x-epmp": false, "xtheadmempair": false, "zkt": false, "zks": false, "zkr": false, "zkn": false, "Zfhmin": false, "zksh": false, "zknh": false, "zkne": false, "zknd": false, "zhinx": false, "Zicsr": true, "sscofpmf": false, "Zihintntl": true, "sstc": true, "xtheadcmo": false, "x-zvbb": false, "zksed": false, "x-zvkned": false, "xtheadsync": false, "x-zvkg": false, "zhinxmin": false, "svadu": true, "xtheadfmv": false, "x-zvksed": false, "svnapot": false, "pmp": true, "x-zvknhb": false, "x-zvknha": false, "xtheadfmemidx": false, "x-zvksh": false, "zdinx": false, "zicbom": true, "Zihintpause": true, "svinval": false, "zcf": false, "zce": false, "zcd": false, "zcb": false, "zca": false, "x-ssaia": false, "x-smaia": false, "zmmul": false, "x-zvbc": false, "Zifencei": true, "zcmt": false, "zcmp": false, "Zawrs": true}}}}

- Query if the 'rv64' CPU with g=true,zifencei=false is a valid expansion:

(QEMU) query-cpu-model-expansion type=full model={"name":"rv64","props":{"g":true,"zifencei":false}}
{"error": {"class": "GenericError", "desc": "RVG requires Zifencei but user set Zifencei to false"}}

- Query a model expansion for the 'rv64' CPU with RVV enabled:

(QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"v":true}}
{"return": {"model": {"name": "max", "props": {"zicond": true, "x-zvfh": false, "mmu": true, "x-zvfbfwma": false, "x-zvfbfmin": false, "xtheadbs": false, "xtheadbb": false, "xtheadba": false, "xtheadmemidx": false, "smstateen": true, "zfinx": false, "x-zvfhmin": false, "zfhmin": true, "xventanacondops": false, "zicsr": true, "xtheadcondmov": false, "zihintntl": true, "svpbmt": true, "zbs": true, "zbc": true, "zbb": true, "zba": true, "zicboz": true, "xtheadmac": false, "zbkx": true, "zbkc": true, "zbkb": true, "x-zfbfmin": false, "zk": true, "x-epmp": false, "xtheadmempair": false, "zkt": true, "zks": true, "zkr": true, "zkn": true, "zksh": true, "zknh": true, "zkne": true, "zknd": true, "zhinx": false, "sscofpmf": true, "sstc": true, "zihintpause": true, "xtheadcmo": false, "x-zvbb": false, "zksed": true, "x-zvkned": false, "xtheadsync": false, "x-zvkg": false, "zhinxmin": false, "zifencei": true, "svadu": true, "xtheadfmv": false, "x-zvksed": false, "zawrs": true, "svnapot": true, "pmp": true, "x-zvknhb": false, "x-zvknha": false, "xtheadfmemidx": false, "x-zvksh": false, "zdinx": false, "zicbom": true, "zve64f": true, "zve32f": true, "svinval": true, "zcf": false, "zce": false, "zcd": true, "zcb": true, "zca": true, "x-ssaia": false, "x-smaia": false, "zmmul": true, "x-zvbc": false, "zfh": true, "zfa": true, "zcmt": false, "zcmp": false, "zve64d": true}}}}

- Querying vendor CPUs is also supported:

(QEMU) query-cpu-model-expansion type=full model={"name":"veyron-v1"}
{"return": {"model": {"name": "veyron-v1", "props": {"zicond": false, "x-zvfh": false, "mmu": true, "x-zvfbfwma": false, "x-zvfbfmin": false, "xtheadbs": false, "xtheadbb": false, "xtheadba": false, "xtheadmemidx": false, "smstateen": true, "zfinx": false, "x-zvfhmin": false, "zfhmin": false, "xventanacondops": true, "zicsr": true, "xtheadcondmov": false, "zihintntl": false, "svpbmt": true, "zbs": true, "zbc": true, "zbb": true, "zba": true, "zicboz": true, "xtheadmac": false, "zbkx": false, "zbkc": false, "zbkb": false, "x-zfbfmin": false, "zk": false, "x-epmp": false, "xtheadmempair": false, "zkt": false, "zks": false, "zkr": false, "zkn": false, "zksh": false, "zknh": false, "zkne": false, "zknd": false, "zhinx": false, "sscofpmf": true, "sstc": true, "zihintpause": false, "xtheadcmo": false, "x-zvbb": false, "zksed": false, "x-zvkned": false, "xtheadsync": false, "x-zvkg": false, "zhinxmin": false, "zifencei": true, "svadu": false, "xtheadfmv": false, "x-zvksed": false, "zawrs": false, "svnapot": true, "pmp": true, "x-zvknhb": false, "x-zvknha": false, "xtheadfmemidx": false, "x-zvksh": false, "zdinx": false, "zicbom": true, "zve64f": false, "zve32f": false, "svinval": true, "zcf": false, "zce": false, "zcd": false, "zcb": false, "zca": false, "x-ssaia": true, "x-smaia": true, "zmmul": false, "x-zvbc": false, "zfh": false, "zfa": false, "zcmt": false, "zcmp": false, "zve64d": false}}}}


Daniel Henrique Barboza (6):
  target/riscv/kvm/kvm-cpu.c: add missing property getters()
  qapi,risc-v: add query-cpu-model-expansion
  target/riscv/tcg: add tcg_cpu_finalize_features()
  target/riscv: handle custom props in qmp_query_cpu_model_expansion
  target/riscv: add riscv_cpu_accelerator_compatible()
  target/riscv/riscv-qmp-cmds.c: check CPU accel in
    query-cpu-model-expansion

 qapi/machine-target.json      |   6 +-
 target/riscv/cpu.c            |  27 +++++-
 target/riscv/cpu.h            |   2 +
 target/riscv/kvm/kvm-cpu.c    |  40 ++++++++-
 target/riscv/riscv-qmp-cmds.c | 160 ++++++++++++++++++++++++++++++++++
 target/riscv/tcg/tcg-cpu.c    |  70 +++++++++------
 target/riscv/tcg/tcg-cpu.h    |   2 +
 7 files changed, 271 insertions(+), 36 deletions(-)

-- 
2.41.0

Re: [PATCH v3 0/6] riscv: query-cpu-model-expansion API

Posted by Alistair Francis 6 months, 1 week ago

On Thu, Oct 19, 2023 at 7:05 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Hi,
>
> This is a re-send of v2 after fixing a trivial conflict with Alistair's
> riscv-to-apply.next.
>
> No other changes made. All patches acked.
>
> Changes from v2:
> - rebased with Alistair's riscv-to-apply.next
> - v2 link: https://lore.kernel.org/qemu-riscv/20230926184019.166352-1-dbarboza@ventanamicro.com/
>
>
> --- API usage examples ---
>
> Launch QEMU with "-S" to be able to issue QMP query commands before the machine starts:
>
> $ ./build/qemu-system-riscv64 -S -M virt -display none -qmp  tcp:localhost:1234,server,wait=off
>
> Then use QMP to access the API:
>
> $ ./scripts/qmp/qmp-shell localhost:1234
> Welcome to the QMP low-level shell!
> Connected to QEMU 8.1.50
>
> - Query the default attributes for the 'rv64' CPU:
>
> (QEMU)  query-cpu-model-expansion type=full model={"name":"rv64"}
> {"return": {"model": {"name": "rv64", "props": {"zicond": false, "x-zvfh": false, "mmu": true, "x-zvfbfwma": false, "x-zvfbfmin": false, "xtheadbs": false, "xtheadbb": false, "xtheadba": false, "xtheadmemidx": false, "smstateen": false, "zfinx": false, "Zve64f": false, "Zve32f": false, "x-zvfhmin": false, "xventanacondops": false, "xtheadcondmov": false, "svpbmt": false, "zbs": true, "zbc": true, "zbb": true, "zba": true, "zicboz": true, "xtheadmac": false, "Zfh": false, "Zfa": true, "zbkx": false, "zbkc": false, "zbkb": false, "Zve64d": false, "x-zfbfmin": false, "zk": false, "x-epmp": false, "xtheadmempair": false, "zkt": false, "zks": false, "zkr": false, "zkn": false, "Zfhmin": false, "zksh": false, "zknh": false, "zkne": false, "zknd": false, "zhinx": false, "Zicsr": true, "sscofpmf": false, "Zihintntl": true, "sstc": true, "xtheadcmo": false, "x-zvbb": false, "zksed": false, "x-zvkned": false, "xtheadsync": false, "x-zvkg": false, "zhinxmin": false, "svadu": true, "xtheadfmv": false, "x-zvksed": false, "svnapot": false, "pmp": true, "x-zvknhb": false, "x-zvknha": false, "xtheadfmemidx": false, "x-zvksh": false, "zdinx": false, "zicbom": true, "Zihintpause": true, "svinval": false, "zcf": false, "zce": false, "zcd": false, "zcb": false, "zca": false, "x-ssaia": false, "x-smaia": false, "zmmul": false, "x-zvbc": false, "Zifencei": true, "zcmt": false, "zcmp": false, "Zawrs": true}}}}
>
> - Query if the 'rv64' CPU with g=true,zifencei=false is a valid expansion:
>
> (QEMU) query-cpu-model-expansion type=full model={"name":"rv64","props":{"g":true,"zifencei":false}}
> {"error": {"class": "GenericError", "desc": "RVG requires Zifencei but user set Zifencei to false"}}
>
> - Query a model expansion for the 'rv64' CPU with RVV enabled:
>
> (QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"v":true}}
> {"return": {"model": {"name": "max", "props": {"zicond": true, "x-zvfh": false, "mmu": true, "x-zvfbfwma": false, "x-zvfbfmin": false, "xtheadbs": false, "xtheadbb": false, "xtheadba": false, "xtheadmemidx": false, "smstateen": true, "zfinx": false, "x-zvfhmin": false, "zfhmin": true, "xventanacondops": false, "zicsr": true, "xtheadcondmov": false, "zihintntl": true, "svpbmt": true, "zbs": true, "zbc": true, "zbb": true, "zba": true, "zicboz": true, "xtheadmac": false, "zbkx": true, "zbkc": true, "zbkb": true, "x-zfbfmin": false, "zk": true, "x-epmp": false, "xtheadmempair": false, "zkt": true, "zks": true, "zkr": true, "zkn": true, "zksh": true, "zknh": true, "zkne": true, "zknd": true, "zhinx": false, "sscofpmf": true, "sstc": true, "zihintpause": true, "xtheadcmo": false, "x-zvbb": false, "zksed": true, "x-zvkned": false, "xtheadsync": false, "x-zvkg": false, "zhinxmin": false, "zifencei": true, "svadu": true, "xtheadfmv": false, "x-zvksed": false, "zawrs": true, "svnapot": true, "pmp": true, "x-zvknhb": false, "x-zvknha": false, "xtheadfmemidx": false, "x-zvksh": false, "zdinx": false, "zicbom": true, "zve64f": true, "zve32f": true, "svinval": true, "zcf": false, "zce": false, "zcd": true, "zcb": true, "zca": true, "x-ssaia": false, "x-smaia": false, "zmmul": true, "x-zvbc": false, "zfh": true, "zfa": true, "zcmt": false, "zcmp": false, "zve64d": true}}}}
>
> - Querying vendor CPUs is also supported:
>
> (QEMU) query-cpu-model-expansion type=full model={"name":"veyron-v1"}
> {"return": {"model": {"name": "veyron-v1", "props": {"zicond": false, "x-zvfh": false, "mmu": true, "x-zvfbfwma": false, "x-zvfbfmin": false, "xtheadbs": false, "xtheadbb": false, "xtheadba": false, "xtheadmemidx": false, "smstateen": true, "zfinx": false, "x-zvfhmin": false, "zfhmin": false, "xventanacondops": true, "zicsr": true, "xtheadcondmov": false, "zihintntl": false, "svpbmt": true, "zbs": true, "zbc": true, "zbb": true, "zba": true, "zicboz": true, "xtheadmac": false, "zbkx": false, "zbkc": false, "zbkb": false, "x-zfbfmin": false, "zk": false, "x-epmp": false, "xtheadmempair": false, "zkt": false, "zks": false, "zkr": false, "zkn": false, "zksh": false, "zknh": false, "zkne": false, "zknd": false, "zhinx": false, "sscofpmf": true, "sstc": true, "zihintpause": false, "xtheadcmo": false, "x-zvbb": false, "zksed": false, "x-zvkned": false, "xtheadsync": false, "x-zvkg": false, "zhinxmin": false, "zifencei": true, "svadu": false, "xtheadfmv": false, "x-zvksed": false, "zawrs": false, "svnapot": true, "pmp": true, "x-zvknhb": false, "x-zvknha": false, "xtheadfmemidx": false, "x-zvksh": false, "zdinx": false, "zicbom": true, "zve64f": false, "zve32f": false, "svinval": true, "zcf": false, "zce": false, "zcd": false, "zcb": false, "zca": false, "x-ssaia": true, "x-smaia": true, "zmmul": false, "x-zvbc": false, "zfh": false, "zfa": false, "zcmt": false, "zcmp": false, "zve64d": false}}}}
>
>
> Daniel Henrique Barboza (6):
>   target/riscv/kvm/kvm-cpu.c: add missing property getters()
>   qapi,risc-v: add query-cpu-model-expansion
>   target/riscv/tcg: add tcg_cpu_finalize_features()
>   target/riscv: handle custom props in qmp_query_cpu_model_expansion
>   target/riscv: add riscv_cpu_accelerator_compatible()
>   target/riscv/riscv-qmp-cmds.c: check CPU accel in
>     query-cpu-model-expansion

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  qapi/machine-target.json      |   6 +-
>  target/riscv/cpu.c            |  27 +++++-
>  target/riscv/cpu.h            |   2 +
>  target/riscv/kvm/kvm-cpu.c    |  40 ++++++++-
>  target/riscv/riscv-qmp-cmds.c | 160 ++++++++++++++++++++++++++++++++++
>  target/riscv/tcg/tcg-cpu.c    |  70 +++++++++------
>  target/riscv/tcg/tcg-cpu.h    |   2 +
>  7 files changed, 271 insertions(+), 36 deletions(-)
>
> --
> 2.41.0
>
>