This was part of my guess for some of the performance problems.
I saw compute_all_sub quite high in the profile at some point,
and I believe that the test case has a partially rotated loop
such that "cmp" is in a delay slot, and so the gen_compare fast
path for CC_OP_SUB is not visible to the conditional branch
that uses the output of the compare. Which means that
helper_compute_psr gets called much more often that we'd like.
Move away from CC_OP to explicit computation of conditions.
This is modeled on target/arm for the (mostly) separate
representation of the bits. We can pack icc.[NV] and xcc.[NV]
into the same target_ulong, but Z and C cannot share.
After removing CC_OP, clean up the handling of conditions so
that we can minimize additional setcond required for env->cond.
Finally, inline some division, which can make use of the new
out-of-line exception path, which means we can expand UDIVX
and SDIVX with very few host insns. The 64/32 UDIV insn needs
only a few more. Leave UDIVcc and SDIV* out of line, as the
overflow and saturation computation in these cases is really
too large to inline.
r~
Based-on: 20231017061244.681584-1-richard.henderson@linaro.org
("[PATCH v2 00/90] target/sparc: Convert to decodetree")
Richard Henderson (20):
target/sparc: Introduce cpu_put_psr_icc
target/sparc: Split psr and xcc into components
target/sparc: Remove CC_OP_DIV
target/sparc: Remove CC_OP_LOGIC
target/sparc: Remove CC_OP_ADD, CC_OP_ADDX, CC_OP_TADD
target/sparc: Remove CC_OP_SUB, CC_OP_SUBX, CC_OP_TSUB
target/sparc: Remove CC_OP_TADDTV, CC_OP_TSUBTV
target/sparc: Remove CC_OP leftovers
target/sparc: Remove DisasCompare.is_bool
target/sparc: Change DisasCompare.c2 to int
target/sparc: Always copy conditions into a new temporary
target/sparc: Do flush_cond in advance_jump_cond
target/sparc: Merge gen_branch2 into advance_pc
target/sparc: Merge advance_jump_uncond_{never,always} into
advance_jump_cond
target/sparc: Use DISAS_EXIT in do_wrpsr
target/sparc: Merge gen_op_next_insn into only caller
target/sparc: Record entire jump condition in DisasContext
target/sparc: Discard cpu_cond at the end of each insn
target/sparc: Implement UDIVX and SDIVX inline
target/sparc: Implement UDIV inline
linux-user/sparc/target_cpu.h | 4 +-
target/sparc/cpu.h | 58 +-
target/sparc/helper.h | 9 +-
linux-user/sparc/cpu_loop.c | 23 +-
linux-user/sparc/signal.c | 2 +-
target/sparc/cc_helper.c | 471 -------------
target/sparc/cpu.c | 1 -
target/sparc/helper.c | 156 ++---
target/sparc/int32_helper.c | 5 -
target/sparc/int64_helper.c | 5 -
target/sparc/machine.c | 44 +-
target/sparc/translate.c | 1225 ++++++++++++++-------------------
target/sparc/win_helper.c | 55 +-
target/sparc/meson.build | 1 -
14 files changed, 724 insertions(+), 1335 deletions(-)
delete mode 100644 target/sparc/cc_helper.c
--
2.34.1