Build on Jordan's patch to allow direct branching and USE_REG_TB
to co-exist.  Use the power9 addpcis wherever pc-relative addrs
might be handy.  Merge in my power10 patches for prefixed insns.

Finish up with an RFC to disable TCG_REG_TB for power9+, when
pc-relative code sequences exist.  I've only lightly tested this,
and it seems to increase code size by a few insns per TB.  It
really depends on how much we end up using the constant pool.

Changes for v4:
  * Fix tcg_out_addpcis.
  * Drop RFC from the final patch.  Jordan's testing suggests that
    pc-relative addressing is slightly better than tb-relative.
    I can imagine that addpcis+ld might be fused in the pipeline
    to an absolute 64-bit address, and so has no real cost.


r~


Jordan Niethe (1):
  tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB

Richard Henderson (12):
  tcg/ppc: Untabify tcg-target.c.inc
  tcg/ppc: Reinterpret tb-relative to TB+4
  tcg/ppc: Use ADDPCIS in tcg_out_tb_start
  tcg/ppc: Use ADDPCIS in tcg_out_movi_int
  tcg/ppc: Use ADDPCIS for the constant pool
  tcg/ppc: Use ADDPCIS in tcg_out_goto_tb
  tcg/ppc: Use PADDI in tcg_out_movi
  tcg/ppc: Use prefixed instructions in tcg_out_mem_long
  tcg/ppc: Use PLD in tcg_out_movi for constant pool
  tcg/ppc: Use prefixed instructions in tcg_out_dupi_vec
  tcg/ppc: Use PLD in tcg_out_goto_tb
  tcg/ppc: Disable TCG_REG_TB for Power9/Power10

 tcg/ppc/tcg-target.c.inc | 277 +++++++++++++++++++++++++++++++++------
 1 file changed, 236 insertions(+), 41 deletions(-)

-- 
2.34.1