[PATCH 0/4] gdbstub and TCG plugin improvements

Akihiko Odaki posted 4 patches 7 months, 1 week ago
Failed in applying to current master (apply log)
Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liweiwei@iscas.ac.cn>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
There is a newer version of this series
target/riscv/cpu-qom.h   |   1 +
target/riscv/cpu.h       |   1 -
accel/tcg/plugin-gen.c   |   9 +--
hw/riscv/boot.c          |   2 +-
target/riscv/cpu.c       | 142 +++++++++++++++++----------------------
target/riscv/gdbstub.c   |  12 ++--
target/riscv/machine.c   |   7 +-
target/riscv/translate.c |   3 +-
8 files changed, 81 insertions(+), 96 deletions(-)
[PATCH 0/4] gdbstub and TCG plugin improvements
Posted by Akihiko Odaki 7 months, 1 week ago
This series extracts fixes and refactorings that can be applied
independently from "[PATCH v9 00/23] plugins: Allow to read registers".

The patch "target/riscv: Move MISA limits to class" was replaced with
patch "target/riscv: Move misa_mxl_max to class" since I found instances
may have different misa_ext_mask.

Akihiko Odaki (4):
  target/riscv: Remove misa_mxl validation
  target/riscv: Move misa_mxl_max to class
  target/riscv: Validate misa_mxl_max only once
  plugins: Remove an extra parameter

 target/riscv/cpu-qom.h   |   1 +
 target/riscv/cpu.h       |   1 -
 accel/tcg/plugin-gen.c   |   9 +--
 hw/riscv/boot.c          |   2 +-
 target/riscv/cpu.c       | 142 +++++++++++++++++----------------------
 target/riscv/gdbstub.c   |  12 ++--
 target/riscv/machine.c   |   7 +-
 target/riscv/translate.c |   3 +-
 8 files changed, 81 insertions(+), 96 deletions(-)

-- 
2.42.0