From nobody Sun May 19 07:16:18 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1696339365; cv=none; d=zohomail.com; s=zohoarc; b=MRvwKQaPl9RrmbchoBzxYMbzdAwghNN0vktgvx22om9XITWqkOoEcG6vz9DnqWqMhMyb273RMSC6yzt5qz6T+cBu5rxTTzHhH1yxM6kJmZBMsTZD9Ef7+g0vq4hRtMByYiPwdQWLkHNz/wBWw7mQa4a1m5cQZSCIww9XQ5reEK0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1696339365; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=vu0xMqO0/tJisHYLXntW+Au46iu8040tFzWiKusl3Hk=; b=Dx7scIUuVt97l5lw33VxeiTGe+Xm2ohuUli501o4yxeCRfJpNQ0wVhtZ34O9OB401h74O6bizwY2b7vKWL+Ki94j0E0Y63nXwhxuKeslkh7hY/mjvpjb6D/As9dJggB9MAOyWGgZ3SIvBRj/sRazlOd9mfsWZjPVDRYGnXoTO2s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1696339365223511.77993985552826; Tue, 3 Oct 2023 06:22:45 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qnfLl-0001jH-Kd; Tue, 03 Oct 2023 09:22:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qnfLi-0001fW-Pn for qemu-devel@nongnu.org; Tue, 03 Oct 2023 09:22:06 -0400 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qnfLe-0002eO-Up for qemu-devel@nongnu.org; Tue, 03 Oct 2023 09:22:06 -0400 Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-690bccb0d8aso692082b3a.0 for ; Tue, 03 Oct 2023 06:22:02 -0700 (PDT) Received: from grind.. ([177.94.15.124]) by smtp.gmail.com with ESMTPSA id u11-20020a17090282cb00b001bf11cf2e21sm1491777plz.210.2023.10.03.06.21.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 06:22:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1696339321; x=1696944121; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vu0xMqO0/tJisHYLXntW+Au46iu8040tFzWiKusl3Hk=; b=CrLgmQmFDzauVfYk3YjABM2TJ9ugPT7anQn2XgNe6FDU3yScm67rfRNAOlyQVdvfQp tkex/zSg3AjMyKAHu0cgNvzKfsf+J8FoGQhMWiTpp956iyfmCBUG5uJ9AJYbOfTU5iuq yXPBeiDZ9GteTWhPoynSZe8BBh0+KGgoM7cHon8uh9mGDbVScPksx7OOu//ATqCvtO8h FCoZyYtMT6cvKxYrKZaqoBVkt/aQA2Vp1Yg7Y1ZXffY4Gn+x7m0yjR5ALKYQ9+fdH/8o W7Qj25FSKqShUhbuya+L4sYkJ/vC3wdMGhKb5UnEuxLK2gfTJuqJPTS8/NvteRKr6i9y 1lmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696339321; x=1696944121; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vu0xMqO0/tJisHYLXntW+Au46iu8040tFzWiKusl3Hk=; b=JZisrWxmfWDzuVakgzJ67EGpMcCVE+WElWRO6uDq5MXAseQT1imncjD3oOHRclx6Sh lS/yNMI7M5SAAaab5RwlcllwuXrMUqgNdNK37Xt3jOfirxvc8fo6OVfFGZt1gMjH7SD4 A1YEBqQ4hUzwvV5IWd6cUyv68I1ZJTQsLujsyISCmcWBkoYzBI4GOtIy3g0x4S/JHcbX yQ0uf8u3B9bZzb50kZrHPGuc5IpL15kqUU/BCtMzQln/mNVqH1FDT0gYbh9Ux7NDscCl e4tOs7tnnBk99wpeWgvlxk5KI5eNUo8uwuTwaWlI8sIPwTj0nZEHC1jG5rCPDeehJmgn LZ7g== X-Gm-Message-State: AOJu0YxDItUMrO57digbTVI8E5GA52qdpIc32kWXYu/LYnbNbhYDy4ik GdRMx+7iTmgcJzpDfPrhPqrkJIFuh7dRwAj+40I= X-Google-Smtp-Source: AGHT+IGPFJzllASgJ5j1GJq4uMDvW0T0G+3qHOeTp51MEN7sNJo+rzgvwk7PzD2LjOZa49E/VjNabQ== X-Received: by 2002:a05:6a20:4422:b0:14b:8b82:867f with SMTP id ce34-20020a056a20442200b0014b8b82867fmr15147239pzb.50.1696339321012; Tue, 03 Oct 2023 06:22:01 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v2 1/2] target/riscv/kvm: improve 'init_multiext_cfg' error msg Date: Tue, 3 Oct 2023 10:21:47 -0300 Message-ID: <20231003132148.797921-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231003132148.797921-1-dbarboza@ventanamicro.com> References: <20231003132148.797921-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1696339367203100003 Content-Type: text/plain; charset="utf-8" Our error message is returning the value of 'ret', which will be always -1 in case of error, and will not be that useful: qemu-system-riscv64: Unable to read ISA_EXT KVM register ssaia, error -1 Improve the error message by outputting 'errno' instead of 'ret'. Use strerrorname_np() to output the error name instead of the error code. This will give us what we need to know right away: qemu-system-riscv64: Unable to read ISA_EXT KVM register ssaia, error code:= ENOENT Given that we're going to exit(1) in this condition instead of attempting to recover, remove the 'kvm_riscv_destroy_scratch_vcpu()' call. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Reviewed-by: Andrew Jones Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/riscv/kvm/kvm-cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index c6615cb807..c3daf74fe9 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -792,8 +792,8 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, = KVMScratchCPU *kvmcpu) val =3D false; } else { error_report("Unable to read ISA_EXT KVM register %s, " - "error %d", multi_ext_cfg->name, ret); - kvm_riscv_destroy_scratch_vcpu(kvmcpu); + "error code: %s", multi_ext_cfg->name, + strerrorname_np(errno)); exit(EXIT_FAILURE); } } else { --=20 2.41.0 From nobody Sun May 19 07:16:18 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1696339346; cv=none; d=zohomail.com; s=zohoarc; b=IdBLJ0bDC958QL/kM/Q2Lo3XHpvlWsy9FmQQlRL67MdZuFRQ4AW7P4ryP2g+idGF68w7sKkwsF5djLjq4FfBs/qzkWltTfqbO5yhDdEHEvMuiFz0KqywtWkxv5tEF5goQ21FvkwpF0jH7YKin+9QcQeELEAOdc0jRDePV3lujQI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1696339346; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=nzlZXFlmrklwSn/+uC5Mi9MdymXGVusYVm5vMvkTEJs=; b=g+7d3PIB7LPnkFTEutzdbEVtmdz0OlNghhK+3eDMR+aYoLg9PqH2cJE+toEdb3rJT/6ZoyYuItDy5vM60G0WZYzNsX7dc9Nz0A8ny09OxGCE7A6f84X8CZ/jO15mivFAB3CCX6wGhoTO4Zh90fE7sfVlRcRe1kksks7grQmi/7A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1696339346743162.4558780018151; Tue, 3 Oct 2023 06:22:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qnfLw-0001xj-VX; Tue, 03 Oct 2023 09:22:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qnfLt-0001tb-Vw for qemu-devel@nongnu.org; Tue, 03 Oct 2023 09:22:18 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qnfLj-0002ep-9l for qemu-devel@nongnu.org; Tue, 03 Oct 2023 09:22:17 -0400 Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-692c70bc440so673082b3a.3 for ; Tue, 03 Oct 2023 06:22:06 -0700 (PDT) Received: from grind.. ([177.94.15.124]) by smtp.gmail.com with ESMTPSA id u11-20020a17090282cb00b001bf11cf2e21sm1491777plz.210.2023.10.03.06.22.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 06:22:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1696339324; x=1696944124; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nzlZXFlmrklwSn/+uC5Mi9MdymXGVusYVm5vMvkTEJs=; b=nmXLI944vwAPZ71Phw52wXE83k6PBeeY3mIiEJXsICls9WUzxy3ndCwDsmjlyxHHhq Thfhy80WTABYRk1B/NP/3rOjzfSBu1Lhq47LGUxldK6fcsVtGNvgo10GYicSAmHig6R1 oXnHlFrrG0Kk1BKVd44GOJfhX04a3fPjEg+R2Oa/Ep6ZuJE0rIZ1H70MbiWlHxdha+Eo JH2/LQaDmBQWPhtVEe/Gy65bTnYWrIBXsSWJVcP1nI9ZxaNb5HcSg6MJnX3ZQ5XOUr3W N3Y2OOzciKmCq0WYFxxoDUt4Obo/+WInn3pDpAGd9SW9NF1t89pQ8Bnt4Cka+Qlf+2h1 hqZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696339324; x=1696944124; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nzlZXFlmrklwSn/+uC5Mi9MdymXGVusYVm5vMvkTEJs=; b=OQtGFyLI0tlTEtfD1eVtRLYln38mi4t3sXLMmfUC0aIZnRjCAviDrQgmsKGpl1b2pM gzz6hY6pKZ0FgopgPMMkNo8rM46NrnQKNCjFM2BZxXaRZ+/KRyaOYyLP/l6sSXOscPhl zRpDskfb8dcGsnicnQSB4F7mp+BhYyvhJCpDivsM3UzV4fJJg8+jbdWaGP9fC1odUX12 GAPPWfy6/5QZB+KvR7XD6q2/M/d2Rdr3QdVKnQ210d2U/qow3fDelF5kNSP57Cs+M+6Q v6dmN8taUSS/FIOTNkOPRfgaRqaoX+c4rZDdYTHXTjk7O1HTCcDnHAfnL9uUbLal46bv 8X2A== X-Gm-Message-State: AOJu0YzDcHUvvG+xOQPHYu7ZjJShi4lkSaJ4srZVLPNA4tqbWCUB+7l/ p/nV4jOrZ8Pc3GNwJNwYps0BsDyq01m48NF+wYI= X-Google-Smtp-Source: AGHT+IGy97riSrkQtFLtBGDBviyNTvNwXOLl5pEQ9wyGuhVbpjKKAx0JWFij8ft91rYeyD2yA+QN+g== X-Received: by 2002:a05:6a20:9750:b0:153:353e:5e39 with SMTP id hs16-20020a056a20975000b00153353e5e39mr11708438pzc.51.1696339324189; Tue, 03 Oct 2023 06:22:04 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH v2 2/2] target/riscv/kvm: support KVM_GET_REG_LIST Date: Tue, 3 Oct 2023 10:21:48 -0300 Message-ID: <20231003132148.797921-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231003132148.797921-1-dbarboza@ventanamicro.com> References: <20231003132148.797921-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1696339348416100003 Content-Type: text/plain; charset="utf-8" KVM for RISC-V started supporting KVM_GET_REG_LIST in Linux 6.6. It consists of a KVM ioctl() that retrieves a list of all available regs for get_one_reg/set_one_reg. Regs that aren't present in the list aren't supported in the host. This simplifies our lives when initing the KVM regs since we don't have to always attempt a KVM_GET_ONE_REG for all regs QEMU knows. We'll only attempt a get_one_reg() if we're sure the reg is supported, i.e. it was retrieved by KVM_GET_REG_LIST. Any error in get_one_reg() will then always considered fatal, instead of having to handle special error codes that might indicate a non-fatal failure. Start by moving the current kvm_riscv_init_multiext_cfg() logic into a new kvm_riscv_read_multiext_legacy() helper. We'll prioritize using KVM_GET_REG_LIST, so check if we have it available and, in case we don't, use the legacy() logic. Otherwise, retrieve the available reg list and use it to check if the host supports our known KVM regs, doing the usual get_one_reg() for the supported regs and setting cpu->cfg accordingly. Signed-off-by: Daniel Henrique Barboza Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- target/riscv/kvm/kvm-cpu.c | 96 +++++++++++++++++++++++++++++++++++++- 1 file changed, 95 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index c3daf74fe9..090d617627 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -771,7 +771,8 @@ static void kvm_riscv_read_cbomz_blksize(RISCVCPU *cpu,= KVMScratchCPU *kvmcpu, } } =20 -static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmc= pu) +static void kvm_riscv_read_multiext_legacy(RISCVCPU *cpu, + KVMScratchCPU *kvmcpu) { CPURISCVState *env =3D &cpu->env; uint64_t val; @@ -812,6 +813,99 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu,= KVMScratchCPU *kvmcpu) } } =20 +static int uint64_cmp(const void *a, const void *b) +{ + uint64_t val1 =3D *(const uint64_t *)a; + uint64_t val2 =3D *(const uint64_t *)b; + + if (val1 < val2) { + return -1; + } + + if (val1 > val2) { + return 1; + } + + return 0; +} + +static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmc= pu) +{ + KVMCPUConfig *multi_ext_cfg; + struct kvm_one_reg reg; + struct kvm_reg_list rl_struct; + struct kvm_reg_list *reglist; + uint64_t val, reg_id, *reg_search; + int i, ret; + + rl_struct.n =3D 0; + ret =3D ioctl(kvmcpu->cpufd, KVM_GET_REG_LIST, &rl_struct); + + /* + * If KVM_GET_REG_LIST isn't supported we'll get errno 22 + * (EINVAL). Use read_legacy() in this case. + */ + if (errno =3D=3D EINVAL) { + return kvm_riscv_read_multiext_legacy(cpu, kvmcpu); + } else if (errno !=3D E2BIG) { + /* + * E2BIG is an expected error message for the API since we + * don't know the number of registers. The right amount will + * be written in rl_struct.n. + * + * Error out if we get any other errno. + */ + error_report("Error when accessing get-reg-list, code: %s", + strerrorname_np(errno)); + exit(EXIT_FAILURE); + } + + reglist =3D g_malloc(sizeof(struct kvm_reg_list) + + rl_struct.n * sizeof(uint64_t)); + reglist->n =3D rl_struct.n; + ret =3D ioctl(kvmcpu->cpufd, KVM_GET_REG_LIST, reglist); + if (ret) { + error_report("Error when reading KVM_GET_REG_LIST, code %s ", + strerrorname_np(errno)); + exit(EXIT_FAILURE); + } + + /* sort reglist to use bsearch() */ + qsort(®list->reg, reglist->n, sizeof(uint64_t), uint64_cmp); + + for (i =3D 0; i < ARRAY_SIZE(kvm_multi_ext_cfgs); i++) { + multi_ext_cfg =3D &kvm_multi_ext_cfgs[i]; + reg_id =3D kvm_riscv_reg_id(&cpu->env, KVM_REG_RISCV_ISA_EXT, + multi_ext_cfg->kvm_reg_id); + reg_search =3D bsearch(®_id, reglist->reg, reglist->n, + sizeof(uint64_t), uint64_cmp); + if (!reg_search) { + continue; + } + + reg.id =3D reg_id; + reg.addr =3D (uint64_t)&val; + ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); + if (ret !=3D 0) { + error_report("Unable to read ISA_EXT KVM register %s, " + "error code: %s", multi_ext_cfg->name, + strerrorname_np(errno)); + exit(EXIT_FAILURE); + } + + multi_ext_cfg->supported =3D true; + kvm_cpu_cfg_set(cpu, multi_ext_cfg, val); + } + + if (cpu->cfg.ext_icbom) { + kvm_riscv_read_cbomz_blksize(cpu, kvmcpu, &kvm_cbom_blocksize); + } + + if (cpu->cfg.ext_icboz) { + kvm_riscv_read_cbomz_blksize(cpu, kvmcpu, &kvm_cboz_blocksize); + } +} + static void riscv_init_kvm_registers(Object *cpu_obj) { RISCVCPU *cpu =3D RISCV_CPU(cpu_obj); --=20 2.41.0