From nobody Fri Sep 20 22:15:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1696332867; cv=none; d=zohomail.com; s=zohoarc; b=LPPatmQMOyI0Ylji9Iv7rsfGtco+twO5BzQ9yfjMcu++NDvh+JWQ+/GTZdY1JvRdn2JNY2/tVRHwQ25uLApNqAxnC/vuPLDdGBeBSc2Dm5Kvv0PGr6SOqIkmLE+Rvkfd5v+fmEXvgLIpubbUmDsG6eqaENJFbwczNSOUY97tjHI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1696332867; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=gV+m8svtmPot68FeOXZ+bfhc1uQobNg9HVkxHtgK/qA=; b=eKGY++ohEwTkIDPnQYZ/juf2ae4vjY6KIT30VJMvypHYhRafjJ+lev0klZx1Dr5GubHuU0zIhQ4w4WouAEtd055ZJkvB0/GeXEGIs7X84x6zk+SIzHIm+B7ZfJAUyaRLpj0zfyKgilgmD0Hh7mvep1koQJ0lL8bYbug6N6M3Htc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1696332867263692.4323266761253; Tue, 3 Oct 2023 04:34:27 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qndeR-0006Aj-G2; Tue, 03 Oct 2023 07:33:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qndeP-00069a-CE for qemu-devel@nongnu.org; Tue, 03 Oct 2023 07:33:17 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qndeM-0003c0-SS for qemu-devel@nongnu.org; Tue, 03 Oct 2023 07:33:17 -0400 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-1c60f1a2652so5990455ad.0 for ; Tue, 03 Oct 2023 04:33:12 -0700 (PDT) Received: from grind.. ([177.94.15.124]) by smtp.gmail.com with ESMTPSA id b12-20020a170902b60c00b001b850c9d7b3sm1285506pls.249.2023.10.03.04.33.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 04:33:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1696332791; x=1696937591; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gV+m8svtmPot68FeOXZ+bfhc1uQobNg9HVkxHtgK/qA=; b=RDDT+uZPqDJ0Ksj1PhDCeMlLXh5g+IJPrgULXZkr9zmqiWqN0n99dJ9UlD62kRDyZa 8Trdhcd7IQ1ntp4X/D4qqBn3pJpoK0vDab2xg5COXaIhc44TC7lC0LFbqO3FyQf30yXx axXbdH9sjA/N4R635X9C/hHFdG69eWPR5yRpXS9zoJfNzTCcECcpxBl6BKioDeuJfaMZ yQ3OTkEl8qgeEjfEt2GslXgwlPPhI+iCA/M4E5gcJLqqW/ofIyYu0l1DSBw0Owhcesur voxQXn/6RpzCZagXZIRzki/R9XtUxA7om0IklkbnF92GyM/Y8sd5PVcH2JXU/FViRhTV /fRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696332791; x=1696937591; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gV+m8svtmPot68FeOXZ+bfhc1uQobNg9HVkxHtgK/qA=; b=c9Ashb8FMW8sWGQ2XGYlgr7tdj3X5IkzjXDIhQ42Bz3dMkISJYTUqG/Js41+Y66L6h pgjaHD990lUqf1AYIo9qA9e+6wfdfkt7oV3Ef8H0cp6lq9YEnLMi5f2d4d/xV5JMfLGj PT8w3IOv1rKUvlzvUUvIxjUCWZkHuSvIlNSGHdY27E5M6jSirIWrXM0BxLuOXOQ/RnZd l181rV92su1PRYHoo5LkBkAvqst/zw31kqKfrKOV5vwYYmrgOVcmRTAQhhRTjC1ska0b +1p6AcJ3g6HeJehAMQbwHVUo97lJOQOwZybCAGuGHicLcVUKNvJgc7g4MsnBmKyvB0PG +Jqg== X-Gm-Message-State: AOJu0YywbP9y/CzLgQzmvHjT1R1FceVDh9+6CeAjrqMbXCnCIAalLhmd O3yhlmMQbuhaj4BZvNXJKPgJ/JJer6khst638l0= X-Google-Smtp-Source: AGHT+IE7p18GUpBZ7Hg3IKtl253FzI/aeltXQm1SxqBZh5iTiIgXNl3Z8VC6BOjFujnre9Hnw/0deg== X-Received: by 2002:a17:902:e5d1:b0:1c3:e5bf:a9fe with SMTP id u17-20020a170902e5d100b001c3e5bfa9femr3622911plf.30.1696332791305; Tue, 03 Oct 2023 04:33:11 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 1/2] target/riscv/kvm: improve 'init_multiext_cfg' error msg Date: Tue, 3 Oct 2023 08:32:58 -0300 Message-ID: <20231003113259.771539-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231003113259.771539-1-dbarboza@ventanamicro.com> References: <20231003113259.771539-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1696332868014100001 Content-Type: text/plain; charset="utf-8" Our error message is returning the value of 'ret', which will be always -1 in case of error, and will not be that useful: qemu-system-riscv64: Unable to read ISA_EXT KVM register ssaia, error -1 Improve the error message by outputting 'errno' instead of 'ret'. Use strerrorname_np() to output the error name instead of the error code. This will give us what we need to know right away: qemu-system-riscv64: Unable to read ISA_EXT KVM register ssaia, error code:= ENOENT Use "error_setg(&error_fatal, ..." since it'll both print the error and do an exit(EXIT_FAILURE) in one single call, allowing us to remove error_report() and exit(). Finally, given that we're going to exit(1) in this condition instead of attempting to recover, remove the 'kvm_riscv_destroy_scratch_vcpu()' call. Signed-off-by: Daniel Henrique Barboza --- target/riscv/kvm/kvm-cpu.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index c6615cb807..847cb2876a 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -791,10 +791,9 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu,= KVMScratchCPU *kvmcpu) multi_ext_cfg->supported =3D false; val =3D false; } else { - error_report("Unable to read ISA_EXT KVM register %s, " - "error %d", multi_ext_cfg->name, ret); - kvm_riscv_destroy_scratch_vcpu(kvmcpu); - exit(EXIT_FAILURE); + error_setg(&error_fatal, "Unable to read ISA_EXT " + "KVM register %s, error code: %s", + multi_ext_cfg->name, strerrorname_np(errno)); } } else { multi_ext_cfg->supported =3D true; --=20 2.41.0 From nobody Fri Sep 20 22:15:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1696332861; cv=none; d=zohomail.com; s=zohoarc; b=kviVK+a7+ZPp0avQNfsz51oX18WAltxRwocJb4TCAJ67UI7/v807fBQ/k857l338npiFkEpNhimwnFQzZeBsFoUctmTHVtXmcYUFOLkBRa3xm3VxeW1nvJCfQ4lI5OO6w86EsPJUpG3oRPhPPuNPpEYvLGK5LDfJAuOkY1bHBe8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1696332861; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=JZBRPCwV1eqkJZCkaxgIVZPnxaps6chr3AJZy3D7g9g=; b=ZCp/JMPxdIkxhXT6jnf9e9WIlcQEDlR1mGFwj8W9izIvSwMZdiebZR4c5BZKpX4LEHwhA8/GvGoJd7JAgkAPvuodnLNsYScGD7h03K4az1Xm8mRfXcmRqW+CBF8whM0ASGnpPIak19Z9VTpkckv4MmSCvBFGzBXo0l1IpSuF0EQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169633286180555.56918363383113; Tue, 3 Oct 2023 04:34:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qndeX-0006EQ-Bk; Tue, 03 Oct 2023 07:33:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qndeT-0006De-R2 for qemu-devel@nongnu.org; Tue, 03 Oct 2023 07:33:21 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qndeO-0003cO-Kw for qemu-devel@nongnu.org; Tue, 03 Oct 2023 07:33:21 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-578b4981526so494482a12.0 for ; Tue, 03 Oct 2023 04:33:16 -0700 (PDT) Received: from grind.. ([177.94.15.124]) by smtp.gmail.com with ESMTPSA id b12-20020a170902b60c00b001b850c9d7b3sm1285506pls.249.2023.10.03.04.33.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 04:33:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1696332795; x=1696937595; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JZBRPCwV1eqkJZCkaxgIVZPnxaps6chr3AJZy3D7g9g=; b=Z2ZNBoFD++v0eeVa25vnve8ECPMXy2A0TImPD8EtdKkRXx6rXZ7IDIwneppdJdK2cU NflferaEtk0W2kfB53sADvgkqvJU+k1FrKN7hnqZvlduOlXoE3018LxRsdjX+mk/aqnJ sMuoQb/nPcaSAP27BxKOacF64uxRv2DCB/jWBpf7dai3Bc5AgiA8d6ZmyHM3y3L5VC+y Dj6x6ksLb7F4mlU9NbPaemReOsV8TbTU2FZb6p5WClYDt+t4y2srSjDCJ7wVksNBGwC+ A2E7AunFbXJdOF5V8YpV1W0agDK2SogQyPi2bLXZHjtl8o+zsu8Wol1caEW7qji5MzUe bX0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696332795; x=1696937595; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JZBRPCwV1eqkJZCkaxgIVZPnxaps6chr3AJZy3D7g9g=; b=K5UPbLiI5pcRbe3LMGYQPBQWOhaNeOmwqH48LY4Hd7c8/Z0FQlCu0CLz16j6rj+LSA MsBO2l1CoWZV+9jVQZRoaSbCtc4dijlTkD5aUFM/ugzwVlM6V9cXsbpLazBvxJY+fF7P AGjv2sCcMgWjmFJsGsx9xThEeKxlRP5s2hZjPvA2Kk03r8fv8QdCE6BA/fOkOeC71O3n b2j7EsAf1Mhv/1oKk0/r87bhZwiedPoS9DRV6ZGptDpk2xz2G8+vmqZY/yXi0PvwjkE2 oo8JhbOYj/lOiMEzwlmShIPwC78drr44HqnSfDKGiQlWQLTO93VUxUlUDmCWPmXr8V5r 6Evw== X-Gm-Message-State: AOJu0Yzm0L3juYeQS1haO6bAPApL7w0jKzBfwxtidZRQ9hZhXJcsUJfB s5bOfEQ/HdYrggPS7dmcAbwYYxN2ss3lQOTZGnU= X-Google-Smtp-Source: AGHT+IEDGjzJOiD9EGjpDg+C4jOGQjm46vFt1UaSM2e81v0jqW4EdIe6NY0eYceHkiov38D2yPuDlQ== X-Received: by 2002:a05:6a21:3d8d:b0:140:a25:1c1d with SMTP id bj13-20020a056a213d8d00b001400a251c1dmr12360975pzc.51.1696332794692; Tue, 03 Oct 2023 04:33:14 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 2/2] target/riscv/kvm: support KVM_GET_REG_LIST Date: Tue, 3 Oct 2023 08:32:59 -0300 Message-ID: <20231003113259.771539-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231003113259.771539-1-dbarboza@ventanamicro.com> References: <20231003113259.771539-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=dbarboza@ventanamicro.com; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1696332864026100002 Content-Type: text/plain; charset="utf-8" KVM for RISC-V started supporting KVM_GET_REG_LIST in Linux 6.6. It consists of a KVM ioctl() that retrieves a list of all available regs for get_one_reg/set_one_reg. Regs that aren't present in the list aren't supported in the host. This simplifies our lives when initing the KVM regs since we don't have to always attempt a KVM_GET_ONE_REG for all regs QEMU knows. We'll only attempt a get_one_reg() if we're sure the reg is supported, i.e. it was retrieved by KVM_GET_REG_LIST. Any error in get_one_reg() will then always considered fatal, instead of having to handle special error codes that might indicate a non-fatal failure. Start by moving the current kvm_riscv_init_multiext_cfg() logic into a new kvm_riscv_read_multiext_legacy() helper. We'll prioritize using KVM_GET_REG_LIST, so check if we have it available and, in case we don't, use the legacy() logic. Otherwise, retrieve the available reg list and use it to check if the host supports our known KVM regs, doing the usual get_one_reg() for the supported regs and setting cpu->cfg accordingly. Signed-off-by: Daniel Henrique Barboza --- target/riscv/kvm/kvm-cpu.c | 93 +++++++++++++++++++++++++++++++++++++- 1 file changed, 92 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c index 847cb2876a..bef6610e1a 100644 --- a/target/riscv/kvm/kvm-cpu.c +++ b/target/riscv/kvm/kvm-cpu.c @@ -771,7 +771,8 @@ static void kvm_riscv_read_cbomz_blksize(RISCVCPU *cpu,= KVMScratchCPU *kvmcpu, } } =20 -static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmc= pu) +static void kvm_riscv_read_multiext_legacy(RISCVCPU *cpu, + KVMScratchCPU *kvmcpu) { CPURISCVState *env =3D &cpu->env; uint64_t val; @@ -811,6 +812,96 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu,= KVMScratchCPU *kvmcpu) } } =20 +static int uint64_cmp(const void *a, const void *b) +{ + uint64_t val1 =3D *(const uint64_t *)a; + uint64_t val2 =3D *(const uint64_t *)b; + + if (val1 < val2) { + return -1; + } + + if (val1 > val2) { + return 1; + } + + return 0; +} + +static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmc= pu) +{ + KVMCPUConfig *multi_ext_cfg; + struct kvm_one_reg reg; + struct kvm_reg_list rl_struct; + struct kvm_reg_list *reglist; + uint64_t val, reg_id, *reg_search; + int i, ret; + + rl_struct.n =3D 0; + ret =3D ioctl(kvmcpu->cpufd, KVM_GET_REG_LIST, &rl_struct); + + /* + * If KVM_GET_REG_LIST isn't supported we'll get errno 22 + * (EINVAL). Use read_legacy() in this case. + */ + if (errno =3D=3D EINVAL) { + return kvm_riscv_read_multiext_legacy(cpu, kvmcpu); + } else if (errno !=3D E2BIG) { + /* + * E2BIG is an expected error message for the API since we + * don't know the number of registers. The right amount will + * be written in rl_struct.n. + * + * Error out if we get any other errno. + */ + error_setg(&error_fatal, "Error when accessing get-reg-list, " + "code: %s", strerrorname_np(errno)); + } + + reglist =3D g_malloc(sizeof(struct kvm_reg_list) + + rl_struct.n * sizeof(uint64_t)); + reglist->n =3D rl_struct.n; + ret =3D ioctl(kvmcpu->cpufd, KVM_GET_REG_LIST, reglist); + if (ret) { + error_setg(&error_fatal, "Error when reading KVM_GET_REG_LIST, " + "code %s ", strerrorname_np(errno)); + } + + /* sort reglist to use bsearch() */ + qsort(®list->reg, reglist->n, sizeof(uint64_t), uint64_cmp); + + for (i =3D 0; i < ARRAY_SIZE(kvm_multi_ext_cfgs); i++) { + multi_ext_cfg =3D &kvm_multi_ext_cfgs[i]; + reg_id =3D kvm_riscv_reg_id(&cpu->env, KVM_REG_RISCV_ISA_EXT, + multi_ext_cfg->kvm_reg_id); + reg_search =3D bsearch(®_id, reglist->reg, reglist->n, + sizeof(uint64_t), uint64_cmp); + if (!reg_search) { + continue; + } + + reg.id =3D reg_id; + reg.addr =3D (uint64_t)&val; + ret =3D ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®); + if (ret !=3D 0) { + error_setg(&error_fatal, "Unable to read ISA_EXT " + "KVM register %s, error code: %s", + multi_ext_cfg->name, strerrorname_np(errno)); + } + + multi_ext_cfg->supported =3D true; + kvm_cpu_cfg_set(cpu, multi_ext_cfg, val); + } + + if (cpu->cfg.ext_icbom) { + kvm_riscv_read_cbomz_blksize(cpu, kvmcpu, &kvm_cbom_blocksize); + } + + if (cpu->cfg.ext_icboz) { + kvm_riscv_read_cbomz_blksize(cpu, kvmcpu, &kvm_cboz_blocksize); + } +} + static void riscv_init_kvm_registers(Object *cpu_obj) { RISCVCPU *cpu =3D RISCV_CPU(cpu_obj); --=20 2.41.0