[RFC PATCH 0/3] target/ppc: Change CR registers from i32 to tl

Nicholas Piggin posted 3 patches 7 months, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230913005814.413113-1-npiggin@gmail.com
Maintainers: Daniel Henrique Barboza <danielhb413@gmail.com>, "Cédric Le Goater" <clg@kaod.org>, David Gibson <david@gibson.dropbear.id.au>, Greg Kurz <groug@kaod.org>, Nicholas Piggin <npiggin@gmail.com>
target/ppc/cpu.h                             |   2 +-
target/ppc/cpu_init.c                        |   2 +-
target/ppc/dfp_helper.c                      |  12 +-
target/ppc/fpu_helper.c                      |  38 +--
target/ppc/helper.h                          | 124 +++++-----
target/ppc/int_helper.c                      |  58 ++---
target/ppc/machine.c                         |   2 +-
target/ppc/translate.c                       | 239 +++++++++----------
target/ppc/translate/fixedpoint-impl.c.inc   |   3 +-
target/ppc/translate/fp-impl.c.inc           |  31 +--
target/ppc/translate/spe-impl.c.inc          |  18 +-
target/ppc/translate/storage-ctrl-impl.c.inc |   4 +-
target/ppc/translate/vmx-impl.c.inc          |  24 +-
target/ppc/translate/vsx-impl.c.inc          |   6 +-
15 files changed, 267 insertions(+), 298 deletions(-)
[RFC PATCH 0/3] target/ppc: Change CR registers from i32 to tl
Posted by Nicholas Piggin 7 months, 2 weeks ago
This is a bit of churn so I might leave it for later in the cycle (or
defer if we get a lot of other changes) since it's a relatively
mechanical change. So don't spend time reviewing details, I'm just
wondering about concept and general approach.

I'm not sure the history of why these are 32-bit, maybe better code gen
on 32-bit host emulating 64-bit? If so, that shouldn't be so important
now that most people use 64-bit systems to develop and test with.

Thanks,
Nick

Nicholas Piggin (3):
  target/ppc: Change CR registers from i32 to tl
  target/ppc: Use FP CR1 update helper more widely
  target/ppc: Optimise after CR register tl conversion

 target/ppc/cpu.h                             |   2 +-
 target/ppc/cpu_init.c                        |   2 +-
 target/ppc/dfp_helper.c                      |  12 +-
 target/ppc/fpu_helper.c                      |  38 +--
 target/ppc/helper.h                          | 124 +++++-----
 target/ppc/int_helper.c                      |  58 ++---
 target/ppc/machine.c                         |   2 +-
 target/ppc/translate.c                       | 239 +++++++++----------
 target/ppc/translate/fixedpoint-impl.c.inc   |   3 +-
 target/ppc/translate/fp-impl.c.inc           |  31 +--
 target/ppc/translate/spe-impl.c.inc          |  18 +-
 target/ppc/translate/storage-ctrl-impl.c.inc |   4 +-
 target/ppc/translate/vmx-impl.c.inc          |  24 +-
 target/ppc/translate/vsx-impl.c.inc          |   6 +-
 15 files changed, 267 insertions(+), 298 deletions(-)

-- 
2.40.1
Re: [RFC PATCH 0/3] target/ppc: Change CR registers from i32 to tl
Posted by Richard Henderson 7 months, 2 weeks ago
On 9/12/23 17:58, Nicholas Piggin wrote:
> This is a bit of churn so I might leave it for later in the cycle (or
> defer if we get a lot of other changes) since it's a relatively
> mechanical change. So don't spend time reviewing details, I'm just
> wondering about concept and general approach.
> 
> I'm not sure the history of why these are 32-bit, maybe better code gen
> on 32-bit host emulating 64-bit? If so, that shouldn't be so important
> now that most people use 64-bit systems to develop and test with.

It was probably in order to save space, but I have no specific knowledge.

What does this do to the generated code?  I suspect, without looking, that it doesn't 
change things much at all on e.g. a ppc64 host, and for an x86_64 host merely changes the 
types of some instructions (which, considering the rex64 encoding, might consume a few 
more bytes).


r~