[PATCH 0/7] target/arm: hwcaps updates, FEAT_HBC

Peter Maydell posted 7 patches 7 months, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230911135340.1139553-1-peter.maydell@linaro.org
Maintainers: Laurent Vivier <laurent@vivier.eu>, Peter Maydell <peter.maydell@linaro.org>, Alexander Graf <agraf@csgraf.de>, Paolo Bonzini <pbonzini@redhat.com>
docs/system/arm/emulation.rst  |  1 +
target/arm/cpu.h               | 28 ++++++++++++++
target/arm/tcg/a64.decode      |  3 +-
linux-user/elfload.c           | 71 ++++++++++++++++++++++++++++++----
target/arm/helper.c            | 15 +++++--
target/arm/hvf/hvf.c           |  1 +
target/arm/kvm64.c             |  2 +
target/arm/tcg/cpu64.c         |  4 ++
target/arm/tcg/translate-a64.c |  4 ++
9 files changed, 118 insertions(+), 11 deletions(-)
[PATCH 0/7] target/arm: hwcaps updates, FEAT_HBC
Posted by Peter Maydell 7 months, 2 weeks ago
This patchset started off as "implement FEAT_HBC" but I ended
up finding I needed to do a bit of cleanup regarding the elf
hwcaps bits, so most of the patchset is that cleanup and the
FEAT_HBC is the simple patch at the end.

Patch 1 is the ID_AA64ISAR2_EL1 that's been on the list multiple
times already. It's in a target-arm pullreq that's already on
the list, so I've only included it here so the series compiles
as a standalone patchset.

Patch 2 is a bugfix for some errors in feature string names
in the emulated /proc/cpuinfo.

Patches 3-6 update our definitions of hwcap bit values from the
current Linux kernel source tree, our ID register field definitions
from the current public system register XML, and make sure we're
in sync with the kernel about what hwcap bits we report and what
ID register fields we expose to user-only guest processes.
(The only actual bug fixed here is some missing arm32 hwcap bits,
but the rest of the changes are useful to, for instance, let us
add FEAT_HBC support.)

Patch 7 is the actual FEAT_HBC support. This feature is a variant
on the B.cond conditional branch that provides some hint
information to the branch predictor; since we don't do branch
prediction this is easy for us to implement.

Patch 7 will have an obvious trivial textual conflict with
the FEAT_MOPS work; I suspect this will get in first, since it's
much simpler. I also forgot about the hwcap for FEAT_MOPS, but
once these patches are applied that is a one-liner fix to add
the GET_FEATURE_ID(aa64_mops, ARM_HWCAP2_A64_MOPS).

thanks
-- PMM

Aaron Lindsay (1):
  target/arm: Add ID_AA64ISAR2_EL1

Peter Maydell (6):
  linux-user/elfload.c: Correct SME feature names reported in cpuinfo
  linux-user/elfload.c: Add missing arm and arm64 hwcap values
  linux-user/elfload.c: Report previously missing arm32 hwcaps
  target/arm: Update AArch64 ID register field definitions
  target/arm: Update user-mode ID reg mask values
  target/arm: Implement FEAT_HBC

 docs/system/arm/emulation.rst  |  1 +
 target/arm/cpu.h               | 28 ++++++++++++++
 target/arm/tcg/a64.decode      |  3 +-
 linux-user/elfload.c           | 71 ++++++++++++++++++++++++++++++----
 target/arm/helper.c            | 15 +++++--
 target/arm/hvf/hvf.c           |  1 +
 target/arm/kvm64.c             |  2 +
 target/arm/tcg/cpu64.c         |  4 ++
 target/arm/tcg/translate-a64.c |  4 ++
 9 files changed, 118 insertions(+), 11 deletions(-)

-- 
2.34.1
Re: [PATCH 0/7] target/arm: hwcaps updates, FEAT_HBC
Posted by Richard Henderson 7 months, 2 weeks ago
On 9/11/23 06:53, Peter Maydell wrote:
> Peter Maydell (6):
>    linux-user/elfload.c: Correct SME feature names reported in cpuinfo
>    linux-user/elfload.c: Add missing arm and arm64 hwcap values
>    linux-user/elfload.c: Report previously missing arm32 hwcaps
>    target/arm: Update AArch64 ID register field definitions
>    target/arm: Update user-mode ID reg mask values
>    target/arm: Implement FEAT_HBC

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~