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[PATCH v3] hw/loongarch: Add virtio-mmio bus support

Tianrui Zhao posted 1 patch 7 months, 2 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230911085903.664996-1-zhaotianrui@loongson.cn
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Xiaojuan Yang <yangxiaojuan@loongson.cn>, Song Gao <gaosong@loongson.cn>
hw/loongarch/Kconfig       |  1 +
hw/loongarch/acpi-build.c  | 25 +++++++++++++++++++++++++
hw/loongarch/virt.c        | 28 ++++++++++++++++++++++++++++
include/hw/pci-host/ls7a.h |  4 ++++
4 files changed, 58 insertions(+)
[PATCH v3] hw/loongarch: Add virtio-mmio bus support
Posted by Tianrui Zhao 7 months, 2 weeks ago 
Add virtio-mmio bus support for LoongArch, so that devices
could be added in the virtio-mmio bus.

Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
Change-Id: Ib882005106562e0dfe74122a7fa2430fa081bfb2
---
 hw/loongarch/Kconfig       |  1 +
 hw/loongarch/acpi-build.c  | 25 +++++++++++++++++++++++++
 hw/loongarch/virt.c        | 28 ++++++++++++++++++++++++++++
 include/hw/pci-host/ls7a.h |  4 ++++
 4 files changed, 58 insertions(+)

diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index 1e7c5b43c5..01ab8ce8e7 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -22,3 +22,4 @@ config LOONGARCH_VIRT
     select DIMM
     select PFLASH_CFI01
     select ACPI_HMAT
+    select VIRTIO_MMIO
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index ae292fc543..d033fc2271 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -363,6 +363,30 @@ static void acpi_dsdt_add_tpm(Aml *scope, LoongArchMachineState *vms)
 }
 #endif
 
+static void acpi_dsdt_add_virtio(Aml *scope)
+{
+    int i;
+    hwaddr base = VIRT_VIRTIO_MMIO_BASE;
+    hwaddr size = VIRT_VIRTIO_MMIO_SIZE;
+
+    for (i = 0; i < VIRT_VIRTIO_MMIO_NUM; i++) {
+        uint32_t irq = VIRT_VIRTIO_MMIO_IRQ + i;
+        Aml *dev = aml_device("VR%02u", i);
+
+        aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005")));
+        aml_append(dev, aml_name_decl("_UID", aml_int(i)));
+        aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
+
+        Aml *crs = aml_resource_template();
+        aml_append(crs, aml_memory32_fixed(base, size, AML_READ_WRITE));
+        aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
+                   AML_EXCLUSIVE, &irq, 1));
+        aml_append(dev, aml_name_decl("_CRS", crs));
+        aml_append(scope, dev);
+        base += size;
+    }
+}
+
 /* build DSDT */
 static void
 build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
@@ -381,6 +405,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
 #ifdef CONFIG_TPM
     acpi_dsdt_add_tpm(dsdt, lams);
 #endif
+    acpi_dsdt_add_virtio(dsdt);
     /* System State Package */
     scope = aml_scope("\\");
     pkg = aml_package(4);
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 2629128aed..ffef3222da 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -116,6 +116,25 @@ static void fdt_add_rtc_node(LoongArchMachineState *lams)
     g_free(nodename);
 }
 
+static void fdt_add_virtio_mmio_node(LoongArchMachineState *lams)
+{
+    int i;
+    MachineState *ms = MACHINE(lams);
+
+    for (i = VIRT_VIRTIO_MMIO_NUM - 1; i >= 0; i--) {
+        char *nodename;
+        hwaddr base = VIRT_VIRTIO_MMIO_BASE + i * VIRT_VIRTIO_MMIO_SIZE;
+
+        nodename = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
+        qemu_fdt_add_subnode(ms->fdt, nodename);
+        qemu_fdt_setprop_string(ms->fdt, nodename,
+                                "compatible", "virtio,mmio");
+        qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
+                                     2, base, 2, VIRT_VIRTIO_MMIO_SIZE);
+        g_free(nodename);
+    }
+}
+
 static void fdt_add_uart_node(LoongArchMachineState *lams)
 {
     char *nodename;
@@ -560,6 +579,15 @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
                          VIRT_RTC_IRQ - VIRT_GSI_BASE));
     fdt_add_rtc_node(lams);
 
+    /* virtio-mmio device */
+    for (i = 0; i < VIRT_VIRTIO_MMIO_NUM; i++) {
+        hwaddr virtio_base = VIRT_VIRTIO_MMIO_BASE + i * VIRT_VIRTIO_MMIO_SIZE;
+        int virtio_irq = VIRT_VIRTIO_MMIO_IRQ - VIRT_GSI_BASE + i;
+        sysbus_create_simple("virtio-mmio", virtio_base,
+                              qdev_get_gpio_in(pch_pic, virtio_irq));
+    }
+    fdt_add_virtio_mmio_node(lams);
+
     pm_mem = g_new(MemoryRegion, 1);
     memory_region_init_io(pm_mem, NULL, &loongarch_virt_pm_ops,
                           NULL, "loongarch_virt_pm", PM_SIZE);
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index e753449593..96506b9a4c 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -42,6 +42,10 @@
 #define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
 #define VIRT_RTC_LEN             0x100
 #define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 4)
+#define VIRT_VIRTIO_MMIO_IRQ     (VIRT_GSI_BASE + 7)
+#define VIRT_VIRTIO_MMIO_BASE    0x1e200000
+#define VIRT_VIRTIO_MMIO_SIZE    0x200
+#define VIRT_VIRTIO_MMIO_NUM     4
 
 #define VIRT_PLATFORM_BUS_BASEADDRESS   0x16000000
 #define VIRT_PLATFORM_BUS_SIZE          0x2000000
-- 
2.39.1
Re: [PATCH v3] hw/loongarch: Add virtio-mmio bus support
Posted by gaosong 7 months, 2 weeks ago 
在 2023/9/11 下午4:59, Tianrui Zhao 写道:
> +static void fdt_add_virtio_mmio_node(LoongArchMachineState *lams)
> +{
> +    int i;
> +    MachineState *ms = MACHINE(lams);
> +
> +    for (i = VIRT_VIRTIO_MMIO_NUM - 1; i >= 0; i--) {
> +        char *nodename;
> +        hwaddr base = VIRT_VIRTIO_MMIO_BASE + i * VIRT_VIRTIO_MMIO_SIZE;
> +
> +        nodename = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
> +        qemu_fdt_add_subnode(ms->fdt, nodename);
> +        qemu_fdt_setprop_string(ms->fdt, nodename,
> +                                "compatible", "virtio,mmio");
> +        qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
> +                                     2, base, 2, VIRT_VIRTIO_MMIO_SIZE);
Missing node interrupts.

Thanks.
Song Gao

> +        g_free(nodename);
> +    }
> +}
Re: [PATCH v3] hw/loongarch: Add virtio-mmio bus support
Posted by gaosong 7 months, 2 weeks ago 
在 2023/9/11 下午4:59, Tianrui Zhao 写道:
> Add virtio-mmio bus support for LoongArch, so that devices
> could be added in the virtio-mmio bus.
> 
> Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
> Change-Id: Ib882005106562e0dfe74122a7fa2430fa081bfb2
> ---
>   hw/loongarch/Kconfig       |  1 +
>   hw/loongarch/acpi-build.c  | 25 +++++++++++++++++++++++++
>   hw/loongarch/virt.c        | 28 ++++++++++++++++++++++++++++
>   include/hw/pci-host/ls7a.h |  4 ++++
>   4 files changed, 58 insertions(+)
> 
Drop Change-Id, and update virt.rst ('- 4 virtio-mmio transport devices')

Reviewed-by: Song Gao <gaosong@loongson.cn>

> diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
> index 1e7c5b43c5..01ab8ce8e7 100644
> --- a/hw/loongarch/Kconfig
> +++ b/hw/loongarch/Kconfig
> @@ -22,3 +22,4 @@ config LOONGARCH_VIRT
>       select DIMM
>       select PFLASH_CFI01
>       select ACPI_HMAT
> +    select VIRTIO_MMIO
> diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
> index ae292fc543..d033fc2271 100644
> --- a/hw/loongarch/acpi-build.c
> +++ b/hw/loongarch/acpi-build.c
> @@ -363,6 +363,30 @@ static void acpi_dsdt_add_tpm(Aml *scope, LoongArchMachineState *vms)
>   }
>   #endif
>   
> +static void acpi_dsdt_add_virtio(Aml *scope)
> +{
> +    int i;
> +    hwaddr base = VIRT_VIRTIO_MMIO_BASE;
> +    hwaddr size = VIRT_VIRTIO_MMIO_SIZE;
> +
> +    for (i = 0; i < VIRT_VIRTIO_MMIO_NUM; i++) {
> +        uint32_t irq = VIRT_VIRTIO_MMIO_IRQ + i;
> +        Aml *dev = aml_device("VR%02u", i);
> +
> +        aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005")));
> +        aml_append(dev, aml_name_decl("_UID", aml_int(i)));
> +        aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
> +
> +        Aml *crs = aml_resource_template();
> +        aml_append(crs, aml_memory32_fixed(base, size, AML_READ_WRITE));
> +        aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
> +                   AML_EXCLUSIVE, &irq, 1));
> +        aml_append(dev, aml_name_decl("_CRS", crs));
> +        aml_append(scope, dev);
> +        base += size;
> +    }
> +}
> +
>   /* build DSDT */
>   static void
>   build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
> @@ -381,6 +405,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
>   #ifdef CONFIG_TPM
>       acpi_dsdt_add_tpm(dsdt, lams);
>   #endif
> +    acpi_dsdt_add_virtio(dsdt);
>       /* System State Package */
>       scope = aml_scope("\\");
>       pkg = aml_package(4);
> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
> index 2629128aed..ffef3222da 100644
> --- a/hw/loongarch/virt.c
> +++ b/hw/loongarch/virt.c
> @@ -116,6 +116,25 @@ static void fdt_add_rtc_node(LoongArchMachineState *lams)
>       g_free(nodename);
>   }
>   
> +static void fdt_add_virtio_mmio_node(LoongArchMachineState *lams)
> +{
> +    int i;
> +    MachineState *ms = MACHINE(lams);
> +
> +    for (i = VIRT_VIRTIO_MMIO_NUM - 1; i >= 0; i--) {
> +        char *nodename;
> +        hwaddr base = VIRT_VIRTIO_MMIO_BASE + i * VIRT_VIRTIO_MMIO_SIZE;
> +
> +        nodename = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
> +        qemu_fdt_add_subnode(ms->fdt, nodename);
> +        qemu_fdt_setprop_string(ms->fdt, nodename,
> +                                "compatible", "virtio,mmio");
> +        qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
> +                                     2, base, 2, VIRT_VIRTIO_MMIO_SIZE);
> +        g_free(nodename);
> +    }
> +}
> +
>   static void fdt_add_uart_node(LoongArchMachineState *lams)
>   {
>       char *nodename;
> @@ -560,6 +579,15 @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
>                            VIRT_RTC_IRQ - VIRT_GSI_BASE));
>       fdt_add_rtc_node(lams);
>   
> +    /* virtio-mmio device */
> +    for (i = 0; i < VIRT_VIRTIO_MMIO_NUM; i++) {
> +        hwaddr virtio_base = VIRT_VIRTIO_MMIO_BASE + i * VIRT_VIRTIO_MMIO_SIZE;
> +        int virtio_irq = VIRT_VIRTIO_MMIO_IRQ - VIRT_GSI_BASE + i;
> +        sysbus_create_simple("virtio-mmio", virtio_base,
> +                              qdev_get_gpio_in(pch_pic, virtio_irq));
> +    }
> +    fdt_add_virtio_mmio_node(lams);
> +
>       pm_mem = g_new(MemoryRegion, 1);
>       memory_region_init_io(pm_mem, NULL, &loongarch_virt_pm_ops,
>                             NULL, "loongarch_virt_pm", PM_SIZE);
> diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
> index e753449593..96506b9a4c 100644
> --- a/include/hw/pci-host/ls7a.h
> +++ b/include/hw/pci-host/ls7a.h
> @@ -42,6 +42,10 @@
>   #define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
>   #define VIRT_RTC_LEN             0x100
>   #define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 4)
> +#define VIRT_VIRTIO_MMIO_IRQ     (VIRT_GSI_BASE + 7)
> +#define VIRT_VIRTIO_MMIO_BASE    0x1e200000
> +#define VIRT_VIRTIO_MMIO_SIZE    0x200
> +#define VIRT_VIRTIO_MMIO_NUM     4
> 

how about set num is 8 or larger?

virt machine

arm  : 32
openrisc : 8
riscv: 8



>   #define VIRT_PLATFORM_BUS_BASEADDRESS   0x16000000
>   #define VIRT_PLATFORM_BUS_SIZE          0x2000000
>

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