An MSI from I/O APIC may not exactly equal to APIC_DEFAULT_ADDRESS. In
fact, Windows 17763.3650 configures I/O APIC to set the dest_mode bit.
Check only the 12 bits that are known to be fixed for I/O APIC-generated
MSIs.

Fixes: 577c470f43 ("x86_iommu/amd: Prepare for interrupt remap support")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
 hw/i386/amd_iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 4655cd801f..3ac0d0098d 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1268,7 +1268,7 @@ static int amdvi_int_remap_msi(AMDVIState *iommu,
         return -AMDVI_IR_ERR;
     }
 
-    if ((origin->address & AMDVI_MSI_ADDR_LO_MASK) != APIC_DEFAULT_ADDRESS) {
+    if ((origin->address & 0xfff00000) != APIC_DEFAULT_ADDRESS) {
         trace_amdvi_err("MSI is not from IOAPIC.");
         return -AMDVI_IR_ERR;
     }
-- 
2.41.0

Hi Akihiko,

Adding Peter.

On 9/9/23 18:23, Akihiko Odaki wrote:
> An MSI from I/O APIC may not exactly equal to APIC_DEFAULT_ADDRESS. In
> fact, Windows 17763.3650 configures I/O APIC to set the dest_mode bit.
> Check only the 12 bits that are known to be fixed for I/O APIC-generated
> MSIs.
> 
> Fixes: 577c470f43 ("x86_iommu/amd: Prepare for interrupt remap support")
> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> ---
>   hw/i386/amd_iommu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 4655cd801f..3ac0d0098d 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -1268,7 +1268,7 @@ static int amdvi_int_remap_msi(AMDVIState *iommu,
>           return -AMDVI_IR_ERR;
>       }
>   
> -    if ((origin->address & AMDVI_MSI_ADDR_LO_MASK) != APIC_DEFAULT_ADDRESS) {
> +    if ((origin->address & 0xfff00000) != APIC_DEFAULT_ADDRESS) {
>           trace_amdvi_err("MSI is not from IOAPIC.");
>           return -AMDVI_IR_ERR;
>       }

Could you add a definition? Maybe:

  -- >8 --
diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
index 6da893ee57..85d491e585 100644
--- a/hw/i386/amd_iommu.h
+++ b/hw/i386/amd_iommu.h
@@ -210,6 +210,7 @@
  #define AMDVI_INT_ADDR_FIRST    0xfee00000
  #define AMDVI_INT_ADDR_LAST     0xfeefffff
  #define AMDVI_INT_ADDR_SIZE     (AMDVI_INT_ADDR_LAST - 
AMDVI_INT_ADDR_FIRST + 1)
+#define AMDVI_INT_ADDR_MASK     ~(AMDVI_INT_ADDR_SIZE - 1)
  #define AMDVI_MSI_ADDR_HI_MASK  (0xffffffff00000000ULL)
  #define AMDVI_MSI_ADDR_LO_MASK  (0x00000000ffffffffULL)

diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 9c77304438..093b4fb18f 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1252,7 +1252,7 @@ static int amdvi_int_remap_msi(AMDVIState *iommu,
          return -AMDVI_IR_ERR;
      }

-    if ((origin->address & AMDVI_MSI_ADDR_LO_MASK) != 
APIC_DEFAULT_ADDRESS) {
+    if ((origin->address & AMDVI_INT_ADDR_MASK) != APIC_DEFAULT_ADDRESS) {
          trace_amdvi_err("MSI is not from IOAPIC.");
          return -AMDVI_IR_ERR;
      }
---

?

On 2023/09/10 1:23, Akihiko Odaki wrote:
> An MSI from I/O APIC may not exactly equal to APIC_DEFAULT_ADDRESS. In
> fact, Windows 17763.3650 configures I/O APIC to set the dest_mode bit.
> Check only the 12 bits that are known to be fixed for I/O APIC-generated
> MSIs.
> 
> Fixes: 577c470f43 ("x86_iommu/amd: Prepare for interrupt remap support")
> Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> ---
>   hw/i386/amd_iommu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 4655cd801f..3ac0d0098d 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -1268,7 +1268,7 @@ static int amdvi_int_remap_msi(AMDVIState *iommu,
>           return -AMDVI_IR_ERR;
>       }
>   
> -    if ((origin->address & AMDVI_MSI_ADDR_LO_MASK) != APIC_DEFAULT_ADDRESS) {
> +    if ((origin->address & 0xfff00000) != APIC_DEFAULT_ADDRESS) {
>           trace_amdvi_err("MSI is not from IOAPIC.");
>           return -AMDVI_IR_ERR;
>       }

Hi, can anyone interested in x86 review this?

Regards,
Akihiko Odaki