Hi; here's the latest arm pullreq...

-- PMM

The following changes since commit 03a3a62fbd0aa5227e978eef3c67d3978aec9e5f:

  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2023-09-07 10:29:06 -0400)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230908

for you to fetch changes up to c8f2eb5d414b788420b938f2ffdde891aa6c3ae8:

  arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE (2023-09-08 16:41:36 +0100)

----------------------------------------------------------------
target-arm queue:
 * New CPU type: cortex-a710
 * Implement new architectural features:
    - FEAT_PACQARMA3
    - FEAT_EPAC
    - FEAT_Pauth2
    - FEAT_FPAC
    - FEAT_FPACCOMBINE
    - FEAT_TIDCP1
 * Xilinx Versal: Model the CFU/CFI
 * Implement RMR_ELx registers
 * Implement handling of HCR_EL2.TIDCP trap bit
 * arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE
 * hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()
 * target/arm: Do not use gen_mte_checkN in trans_STGP
 * arm64: Restore trapless ptimer access

----------------------------------------------------------------
Aaron Lindsay (6):
      target/arm: Add ID_AA64ISAR2_EL1
      target/arm: Add feature detection for FEAT_Pauth2 and extensions
      target/arm: Implement FEAT_EPAC
      target/arm: Implement FEAT_Pauth2
      target/arm: Inform helpers whether a PAC instruction is 'combined'
      target/arm: Implement FEAT_FPAC and FEAT_FPACCOMBINE

Colton Lewis (1):
      arm64: Restore trapless ptimer access

Francisco Iglesias (8):
      hw/misc: Introduce the Xilinx CFI interface
      hw/misc: Introduce a model of Xilinx Versal's CFU_APB
      hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal CFU_FDRO
      hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal's CFU_SFR
      hw/misc: Introduce a model of Xilinx Versal's CFRAME_REG
      hw/misc: Introduce a model of Xilinx Versal's CFRAME_BCAST_REG
      hw/arm/xlnx-versal: Connect the CFU_APB, CFU_FDRO and CFU_SFR
      hw/arm/versal: Connect the CFRAME_REG and CFRAME_BCAST_REG

Philippe Mathieu-Daudé (1):
      hw/intc/arm_gicv3_its: Avoid maybe-uninitialized error in get_vte()

Richard Henderson (9):
      tests/tcg/aarch64: Adjust pauth tests for FEAT_FPAC
      target/arm: Don't change pauth features when changing algorithm
      target/arm: Implement FEAT_PACQARMA3
      target/arm: Do not use gen_mte_checkN in trans_STGP
      target/arm: Implement RMR_ELx
      target/arm: Implement cortex-a710
      target/arm: Implement HCR_EL2.TIDCP
      target/arm: Implement FEAT_TIDCP1
      target/arm: Enable SCTLR_EL1.TIDCP for user-only

Shameer Kolothum (1):
      arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE

 MAINTAINERS                              |  10 +
 docs/system/arm/cpu-features.rst         |  21 +-
 docs/system/arm/emulation.rst            |   8 +
 docs/system/arm/virt.rst                 |   1 +
 include/hw/arm/xlnx-versal.h             |  85 +++
 include/hw/misc/xlnx-cfi-if.h            |  59 +++
 include/hw/misc/xlnx-versal-cframe-reg.h | 303 +++++++++++
 include/hw/misc/xlnx-versal-cfu.h        | 258 ++++++++++
 include/sysemu/kvm_int.h                 |   1 +
 target/arm/cpu.h                         |  54 +-
 target/arm/helper.h                      |   2 +
 target/arm/syndrome.h                    |   7 +
 target/arm/tcg/helper-a64.h              |   4 +
 tests/tcg/aarch64/pauth.h                |  23 +
 accel/kvm/kvm-all.c                      |   1 +
 hw/arm/virt.c                            |   1 +
 hw/arm/xlnx-versal.c                     | 155 +++++-
 hw/intc/arm_gicv3_its.c                  |  15 +-
 hw/misc/xlnx-cfi-if.c                    |  34 ++
 hw/misc/xlnx-versal-cframe-reg.c         | 858 +++++++++++++++++++++++++++++++
 hw/misc/xlnx-versal-cfu.c                | 563 ++++++++++++++++++++
 target/arm/arm-qmp-cmds.c                |   2 +-
 target/arm/cpu.c                         |   4 +
 target/arm/cpu64.c                       |  86 +++-
 target/arm/helper.c                      |  68 ++-
 target/arm/hvf/hvf.c                     |   1 +
 target/arm/kvm.c                         |  61 +++
 target/arm/kvm64.c                       |   3 +
 target/arm/tcg/cpu64.c                   | 215 ++++++++
 target/arm/tcg/op_helper.c               |  33 ++
 target/arm/tcg/pauth_helper.c            | 180 +++++--
 target/arm/tcg/translate-a64.c           |  74 +--
 target/arm/tcg/translate.c               |  33 ++
 tests/qtest/arm-cpu-features.c           |  12 +-
 tests/tcg/aarch64/pauth-2.c              |  54 +-
 tests/tcg/aarch64/pauth-4.c              |  18 +-
 tests/tcg/aarch64/pauth-5.c              |  10 +
 hw/misc/meson.build                      |   3 +
 qemu-options.hx                          |  15 +
 tests/tcg/aarch64/Makefile.target        |   6 +-
 40 files changed, 3184 insertions(+), 157 deletions(-)
 create mode 100644 include/hw/misc/xlnx-cfi-if.h
 create mode 100644 include/hw/misc/xlnx-versal-cframe-reg.h
 create mode 100644 include/hw/misc/xlnx-versal-cfu.h
 create mode 100644 tests/tcg/aarch64/pauth.h
 create mode 100644 hw/misc/xlnx-cfi-if.c
 create mode 100644 hw/misc/xlnx-versal-cframe-reg.c
 create mode 100644 hw/misc/xlnx-versal-cfu.c

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.2 for any user-visible changes.