[PATCH v4 00/48] Add LoongArch LASX instructions

Song Gao posted 48 patches 8 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230830084902.2113960-1-gaosong@loongson.cn
Maintainers: Laurent Vivier <laurent@vivier.eu>, Song Gao <gaosong@loongson.cn>, Xiaojuan Yang <yangxiaojuan@loongson.cn>
There is a newer version of this series
target/loongarch/cpu.h                       |   26 +-
target/loongarch/helper.h                    |  689 ++--
target/loongarch/internals.h                 |   22 -
target/loongarch/translate.h                 |    1 +
target/loongarch/vec.h                       |   98 +
target/loongarch/insns.decode                |  782 ++++
linux-user/loongarch64/signal.c              |    1 +
target/loongarch/cpu.c                       |    4 +
target/loongarch/disas.c                     |  925 +++++
target/loongarch/gdbstub.c                   |    1 +
target/loongarch/lsx_helper.c                | 3004 ---------------
target/loongarch/machine.c                   |   36 +-
target/loongarch/translate.c                 |    5 +
target/loongarch/vec_helper.c                | 3431 ++++++++++++++++++
target/loongarch/insn_trans/trans_lasx.c.inc | 1054 ++++++
target/loongarch/insn_trans/trans_lsx.c.inc  | 2060 ++++++-----
target/loongarch/meson.build                 |    2 +-
17 files changed, 7766 insertions(+), 4375 deletions(-)
create mode 100644 target/loongarch/vec.h
delete mode 100644 target/loongarch/lsx_helper.c
create mode 100644 target/loongarch/vec_helper.c
create mode 100644 target/loongarch/insn_trans/trans_lasx.c.inc
[PATCH v4 00/48] Add LoongArch LASX instructions
Posted by Song Gao 8 months ago
Hi,

This series adds LoongArch LASX instructions.

About test:
We use RISU test the LoongArch LASX instructions.

QEMU:
    https://github.com/loongson/qemu/tree/tcg-old-abi-support-lasx
RISU:
    https://github.com/loongson/risu/tree/loongarch-suport-lasx

Please review, Thanks.

Changes for v4:
- Rebase;
- Add avail_LASX to check.

Changes for v3:
- Add a new patch 9, rename lsx_helper.c to vec_helper.c,
  and use gen_helper_gvec_* series functions;
- Use i < oprsz / (BIT / 8) in loop;
- Some helper functions use loop;
- patch 46: use tcg_gen_qemu_ld/st_i64 for xvld/xvst{x};
- R-b.

Changes for v2:
- Expand the definition of VReg to be 256 bits.
- Use more LSX functions.
- R-b.

Song Gao (48):
  target/loongarch: Add LASX data support
  target/loongarch: meson.build support build LASX
  target/loongarch: Add CHECK_ASXE maccro for check LASX enable
  target/loongarch: Add avail_LASX to check LASX instructions
  target/loongarch: Implement xvadd/xvsub
  target/loongarch: Implement xvreplgr2vr
  target/loongarch: Implement xvaddi/xvsubi
  target/loongarch: Implement xvneg
  target/loongarch: Implement xvsadd/xvssub
  target/loongarch: rename lsx_helper.c to vec_helper.c
  target/loongarch: Implement xvhaddw/xvhsubw
  target/loongarch: Implement xvaddw/xvsubw
  target/loongarch: Implement xavg/xvagr
  target/loongarch: Implement xvabsd
  target/loongarch: Implement xvadda
  target/loongarch: Implement xvmax/xvmin
  target/loongarch: Implement xvmul/xvmuh/xvmulw{ev/od}
  target/loongarch: Implement xvmadd/xvmsub/xvmaddw{ev/od}
  target/loongarch; Implement xvdiv/xvmod
  target/loongarch: Implement xvsat
  target/loongarch: Implement xvexth
  target/loongarch: Implement vext2xv
  target/loongarch: Implement xvsigncov
  target/loongarch: Implement xvmskltz/xvmskgez/xvmsknz
  target/loognarch: Implement xvldi
  target/loongarch: Implement LASX logic instructions
  target/loongarch: Implement xvsll xvsrl xvsra xvrotr
  target/loongarch: Implement xvsllwil xvextl
  target/loongarch: Implement xvsrlr xvsrar
  target/loongarch: Implement xvsrln xvsran
  target/loongarch: Implement xvsrlrn xvsrarn
  target/loongarch: Implement xvssrln xvssran
  target/loongarch: Implement xvssrlrn xvssrarn
  target/loongarch: Implement xvclo xvclz
  target/loongarch: Implement xvpcnt
  target/loongarch: Implement xvbitclr xvbitset xvbitrev
  target/loongarch: Implement xvfrstp
  target/loongarch: Implement LASX fpu arith instructions
  target/loongarch: Implement LASX fpu fcvt instructions
  target/loongarch: Implement xvseq xvsle xvslt
  target/loongarch: Implement xvfcmp
  target/loongarch: Implement xvbitsel xvset
  target/loongarch: Implement xvinsgr2vr xvpickve2gr
  target/loongarch: Implement xvreplve xvinsve0 xvpickve xvb{sll/srl}v
  target/loongarch: Implement xvpack xvpick xvilv{l/h}
  target/loongarch: Implement xvshuf xvperm{i} xvshuf4i xvextrins
  target/loongarch: Implement xvld xvst
  target/loongarch: CPUCFG support LASX

 target/loongarch/cpu.h                       |   26 +-
 target/loongarch/helper.h                    |  689 ++--
 target/loongarch/internals.h                 |   22 -
 target/loongarch/translate.h                 |    1 +
 target/loongarch/vec.h                       |   98 +
 target/loongarch/insns.decode                |  782 ++++
 linux-user/loongarch64/signal.c              |    1 +
 target/loongarch/cpu.c                       |    4 +
 target/loongarch/disas.c                     |  925 +++++
 target/loongarch/gdbstub.c                   |    1 +
 target/loongarch/lsx_helper.c                | 3004 ---------------
 target/loongarch/machine.c                   |   36 +-
 target/loongarch/translate.c                 |    5 +
 target/loongarch/vec_helper.c                | 3431 ++++++++++++++++++
 target/loongarch/insn_trans/trans_lasx.c.inc | 1054 ++++++
 target/loongarch/insn_trans/trans_lsx.c.inc  | 2060 ++++++-----
 target/loongarch/meson.build                 |    2 +-
 17 files changed, 7766 insertions(+), 4375 deletions(-)
 create mode 100644 target/loongarch/vec.h
 delete mode 100644 target/loongarch/lsx_helper.c
 create mode 100644 target/loongarch/vec_helper.c
 create mode 100644 target/loongarch/insn_trans/trans_lasx.c.inc

-- 
2.39.1