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Tue, 29 Aug 2023 00:13:29 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Aug 2023 21:13:21 -0700 Received: from pc.sh.intel.com ([10.238.200.75]) by orsmga004.jf.intel.com with ESMTP; 28 Aug 2023 21:13:18 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1693282402; x=1724818402; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=q4/mCZYrIqKP2Rle4FHQfcUbdw3Q+l03oL7jOOLmsxM=; b=l3UDxT0Im4vI0yuBVtMEgRt4/3/OzQmlNnFF0+qn1w8JI/IfN5qkSVls ckRPN7vSRXWDSYYqRYzryos5Eplh7xs1plAZQtFDBdB47dqYNZQwnFVoD cI0ZUyMumkdhFbp/mCOQ+kmasDqGINgV97XALU/19tB9G1kXENdTLuuN8 LrekISTQemRHbF248/IKEzQqaf0Q73wqXRQWvld9L0S6dQ+wS0NjPPiOq lvp5dvCCdumTIBDvJTtjlbalYEGtKVerlUaz2OFOWbmNjw3uLeAHJKipS ACB1+9eNh6NJBjyqjKj7MA49JMzFUbRe8w+yOx9ZV/2fH7j20q2AJ+o8a g==; X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="439220465" X-IronPort-AV: E=Sophos;i="6.02,208,1688454000"; d="scan'208";a="439220465" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="862087930" X-IronPort-AV: E=Sophos;i="6.02,208,1688454000"; d="scan'208";a="862087930" From: Qian Wen To: qemu-devel@nongnu.org Cc: xiaoyao.li@intel.com, zhao1.liu@intel.com, pbonzini@redhat.com, richard.henderson@linaro.org, babu.moger@amd.com, Qian Wen , Isaku Yamahata Subject: [PATCH v4 1/2] target/i386: Avoid cpu number overflow in legacy topology Date: Tue, 29 Aug 2023 12:24:04 +0800 Message-Id: <20230829042405.932523-2-qian.wen@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230829042405.932523-1-qian.wen@intel.com> References: <20230829042405.932523-1-qian.wen@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.31; envelope-from=qian.wen@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1693282467454100002 Content-Type: text/plain; charset="utf-8" The legacy topology enumerated by CPUID.1.EBX[23:16] is defined in SDM Vol2: Bits 23-16: Maximum number of addressable IDs for logical processors in this physical package. When threads_per_socket > 255, it will 1) overwrite bits[31:24] which is apic_id, 2) bits [23:16] get truncated. Specifically, if launching the VM with -smp 256, the value written to EBX[23:16] is 0 because of data overflow. If the guest only supports legacy topology, without V2 Extended Topology enumerated by CPUID.0x1f or Extended Topology enumerated by CPUID.0x0b to support over 255 CPUs, the return of the kernel invoking cpu_smt_allowed() is false and APs (application processors) will fail to bring up. Then only CPU 0 is online, and others are offline. For example, launch VM via: qemu-system-x86_64 -M q35,accel=3Dkvm,kernel-irqchip=3Dsplit \ -cpu qemu64,cpuid-0xb=3Doff -smp 256 -m 32G \ -drive file=3Dguest.img,if=3Dnone,id=3Dvirtio-disk0,format=3Draw \ -device virtio-blk-pci,drive=3Dvirtio-disk0,bootindex=3D1 --nographic The guest shows: CPU(s): 256 On-line CPU(s) list: 0 Off-line CPU(s) list: 1-255 To avoid this issue caused by overflow, limit the max value written to EBX[23:16] to 255 as the HW does. Signed-off-by: Qian Wen Reviewed-by: Zhao Liu Reviewed-by: Xiaoyao Li Reviewed-by: Isaku Yamahata --- target/i386/cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 00f913b638..fc0437bdb1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6012,6 +6012,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, uint32_t die_offset; uint32_t limit; uint32_t signature[3]; + uint32_t threads_per_socket; X86CPUTopoInfo topo_info; =20 topo_info.dies_per_pkg =3D env->nr_dies; @@ -6053,8 +6054,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, *ecx |=3D CPUID_EXT_OSXSAVE; } *edx =3D env->features[FEAT_1_EDX]; - if (cs->nr_cores * cs->nr_threads > 1) { - *ebx |=3D (cs->nr_cores * cs->nr_threads) << 16; + threads_per_socket =3D cs->nr_cores * cs->nr_threads; + if (threads_per_socket > 1) { + *ebx |=3D MIN(threads_per_socket, 255) << 16; *edx |=3D CPUID_HT; } if (!cpu->enable_pmu) { --=20 2.25.1 From nobody Thu May 16 02:39:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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d="scan'208";a="439220486" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10816"; a="862087986" X-IronPort-AV: E=Sophos;i="6.02,208,1688454000"; d="scan'208";a="862087986" From: Qian Wen To: qemu-devel@nongnu.org Cc: xiaoyao.li@intel.com, zhao1.liu@intel.com, pbonzini@redhat.com, richard.henderson@linaro.org, babu.moger@amd.com, Qian Wen , Isaku Yamahata Subject: [PATCH v4 2/2] target/i386: Avoid overflow of the cache parameter enumerated by leaf 4 Date: Tue, 29 Aug 2023 12:24:05 +0800 Message-Id: <20230829042405.932523-3-qian.wen@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230829042405.932523-1-qian.wen@intel.com> References: <20230829042405.932523-1-qian.wen@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.31; envelope-from=qian.wen@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1693282461238100001 Content-Type: text/plain; charset="utf-8" According to SDM, CPUID.0x4:EAX[31:26] indicates the Maximum number of addressable IDs for processor cores in the physical package. If we launch over 64 cores VM, the 6-bit field will overflow, and the wrong core_id number will be reported. Since the HW reports 0x3f when the intel processor has over 64 cores, limit the max value written to EBX[31:26] to 63, so max num_cores should be 64. Signed-off-by: Qian Wen Reviewed-by: Zhao Liu Reviewed-by: Xiaoyao Li Reviewed-by: Isaku Yamahata --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fc0437bdb1..90fe0a6a46 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -248,7 +248,7 @@ static void encode_cache_cpuid4(CPUCacheInfo *cache, *eax =3D CACHE_TYPE(cache->type) | CACHE_LEVEL(cache->level) | (cache->self_init ? CACHE_SELF_INIT_LEVEL : 0) | - ((num_cores - 1) << 26) | + ((MIN(num_cores, 64) - 1) << 26) | ((num_apic_ids - 1) << 14); =20 assert(cache->line_size > 0); --=20 2.25.1