Typo applied byte-wise shift instead of double-word shift.
Cc: qemu-stable@nongnu.org
Fixes: 631e565450c ("target/arm: Create gen_gvec_[us]sra")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1779
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index b71ac2d0d5..39541ecdf0 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -3053,7 +3053,7 @@ void gen_gvec_ssra(unsigned vece, uint32_t rd_ofs, uint32_t rm_ofs,
.vece = MO_32 },
{ .fni8 = gen_ssra64_i64,
.fniv = gen_ssra_vec,
- .fno = gen_helper_gvec_ssra_b,
+ .fno = gen_helper_gvec_ssra_d,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
.opt_opc = vecop_list,
.load_dest = true,
--
2.34.1
On Mon, 21 Aug 2023 at 03:20, Richard Henderson <richard.henderson@linaro.org> wrote: > > Typo applied byte-wise shift instead of double-word shift. > > Cc: qemu-stable@nongnu.org > Fixes: 631e565450c ("target/arm: Create gen_gvec_[us]sra") > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1779 > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/tcg/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Applied to target-arm-for-8.2 with the gitlab URL fixed, thanks. -- PMM
On 21/8/23 04:20, Richard Henderson wrote: > Typo applied byte-wise shift instead of double-word shift. > > Cc: qemu-stable@nongnu.org > Fixes: 631e565450c ("target/arm: Create gen_gvec_[us]sra") > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1779 > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/tcg/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On 8/20/23 19:20, Richard Henderson wrote: > Typo applied byte-wise shift instead of double-word shift. > > Cc: qemu-stable@nongnu.org > Fixes: 631e565450c ("target/arm: Create gen_gvec_[us]sra") > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1779 Bah. #1737 > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/tcg/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c > index b71ac2d0d5..39541ecdf0 100644 > --- a/target/arm/tcg/translate.c > +++ b/target/arm/tcg/translate.c > @@ -3053,7 +3053,7 @@ void gen_gvec_ssra(unsigned vece, uint32_t rd_ofs, uint32_t rm_ofs, > .vece = MO_32 }, > { .fni8 = gen_ssra64_i64, > .fniv = gen_ssra_vec, > - .fno = gen_helper_gvec_ssra_b, > + .fno = gen_helper_gvec_ssra_d, > .prefer_i64 = TCG_TARGET_REG_BITS == 64, > .opt_opc = vecop_list, > .load_dest = true,
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