Hi,

I decided to spin a new version of this work after chatting with Conor
about some log messages about 'vector version is not specified' message
when using the 'max' CPU.

For this particular CPU we should set an appropriate value for the vector
version right at cpu_init(), but doing that isn't enough to avoid that
log message. A new patch (9) was added to tune in RVV validation code to
skip the message if a CPU already set env->vext_ver.

Patches missing acks: 9, 11, 12

Changes from v6:
- patch 9 (new)
  - change RVV vext_ver handling to avoid msg logs if the CPU sets a
    specific env->vext_ver
- patch 10 (former 9)
  - set env->vext_ver in riscv_init_max_cpu_extensions()
- v5 link: https://lore.kernel.org/qemu-riscv/20230720171933.404398-1-dbarboza@ventanamicro.com/

Daniel Henrique Barboza (12):
  target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[]
  target/riscv/cpu.c: skip 'bool' check when filtering KVM props
  target/riscv/cpu.c: split kvm prop handling to its own helper
  target/riscv/cpu.c: del DEFINE_PROP_END_OF_LIST() from
    riscv_cpu_extensions
  target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[]
  target/riscv/cpu.c: split non-ratified exts from
    riscv_cpu_extensions[]
  target/riscv/cpu.c: add ADD_CPU_QDEV_PROPERTIES_ARRAY() macro
  target/riscv/cpu.c: add ADD_UNAVAIL_KVM_PROP_ARRAY() macro
  target/riscv/cpu.c: limit cfg->vext_spec log message
  target/riscv: add 'max' CPU type
  avocado, risc-v: add opensbi tests for 'max' CPU
  target/riscv: deprecate the 'any' CPU type

 docs/about/deprecated.rst      |  12 +++
 target/riscv/cpu-qom.h         |   1 +
 target/riscv/cpu.c             | 188 +++++++++++++++++++++++++--------
 tests/avocado/riscv_opensbi.py |  16 +++
 4 files changed, 171 insertions(+), 46 deletions(-)

-- 
2.41.0