[PATCH v3] hw/ide/piix: properly initialize the BMIBA register

Olaf Hering posted 1 patch 10 months, 1 week ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230712074721.14728-1-olaf@aepfle.de
Maintainers: John Snow <jsnow@redhat.com>
hw/ide/piix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH v3] hw/ide/piix: properly initialize the BMIBA register
Posted by Olaf Hering 10 months, 1 week ago
According to the 82371FB documentation (82371FB.pdf, 2.3.9. BMIBA-BUS
MASTER INTERFACE BASE ADDRESS REGISTER, April 1997), the register is
32bit wide. To properly reset it to default values, all 32bit need to be
cleared. Bit #0 "Resource Type Indicator (RTE)" needs to be enabled.

The initial change wrote just the lower 8 bit, leaving parts of the "Bus
Master Interface Base Address" address at bit 15:4 unchanged.

Fixes: e6a71ae327 ("Add support for 82371FB (Step A1) and Improved support for 82371SB (Function 1)")

Signed-off-by: Olaf Hering <olaf@aepfle.de>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/ide/piix.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 151f206046..4e5e12935f 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -117,7 +117,7 @@ static void piix_ide_reset(DeviceState *dev)
     pci_set_word(pci_conf + PCI_COMMAND, 0x0000);
     pci_set_word(pci_conf + PCI_STATUS,
                  PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_FAST_BACK);
-    pci_set_byte(pci_conf + 0x20, 0x01);  /* BMIBA: 20-23h */
+    pci_set_long(pci_conf + 0x20, 0x1);  /* BMIBA: 20-23h */
 }
 
 static bool pci_piix_init_bus(PCIIDEState *d, unsigned i, Error **errp)

base-commit: 887cba855bb6ff4775256f7968409281350b568c
prerequisite-patch-id: daed167f888bd89b010a2e890e3edd97872cfc05
prerequisite-patch-id: 532640812ba7cd0303414c77450923f6abcb5119
prerequisite-patch-id: abf2f4ed52b072599c49d993de902e6dd7f2b560
Re: [PATCH v3] hw/ide/piix: properly initialize the BMIBA register
Posted by Paolo Bonzini 10 months, 1 week ago
> According to the 82371FB documentation (82371FB.pdf, 2.3.9. BMIBA-BUS
> MASTER INTERFACE BASE ADDRESS REGISTER, April 1997), the register is
> 32bit wide. To properly reset it to default values, all 32bit need to be
> cleared. Bit #0 "Resource Type Indicator (RTE)" needs to be enabled.

Queued, thanks.

Cc: qemu-stable@nongnu.org

Paolo
Re: [PATCH v3] hw/ide/piix: properly initialize the BMIBA register
Posted by Philippe Mathieu-Daudé 10 months, 1 week ago
On 12/7/23 09:47, Olaf Hering wrote:
> According to the 82371FB documentation (82371FB.pdf, 2.3.9. BMIBA-BUS
> MASTER INTERFACE BASE ADDRESS REGISTER, April 1997), the register is
> 32bit wide. To properly reset it to default values, all 32bit need to be
> cleared. Bit #0 "Resource Type Indicator (RTE)" needs to be enabled.
> 
> The initial change wrote just the lower 8 bit, leaving parts of the "Bus
> Master Interface Base Address" address at bit 15:4 unchanged.
> 
> Fixes: e6a71ae327 ("Add support for 82371FB (Step A1) and Improved support for 82371SB (Function 1)")
> 
> Signed-off-by: Olaf Hering <olaf@aepfle.de>
> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
> ---
>   hw/ide/piix.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

I can take this patch via mips-fixes.