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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::232; envelope-from=gurchetansingh@chromium.org; helo=mail-oi1-x232.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044317523100004 Content-Type: text/plain; charset="utf-8" From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' to allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Antonio Caggiano Reviewed-by: Gurchetan Singh Signed-off-by: Gurchetan Singh Reviewed-by: Akihiko Odaki --- hw/virtio/virtio-pci.c | 18 ++++++++++++++++++ include/hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index edbc0daa18..da8c9ea12d 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1435,6 +1435,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *pr= oxy, return offset; } =20 +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap =3D { + .cap.cap_len =3D sizeof cap, + .cap.cfg_type =3D VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + + cap.cap.bar =3D bar; + cap.cap.length =3D cpu_to_le32(length); + cap.length_hi =3D cpu_to_le32(length >> 32); + cap.cap.offset =3D cpu_to_le32(offset); + cap.offset_hi =3D cpu_to_le32(offset >> 32); + cap.cap.id =3D id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index ab2051b64b..5a3f182f99 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -264,4 +264,8 @@ unsigned virtio_pci_optimal_num_queues(unsigned fixed_q= ueues); void virtio_pci_set_guest_notifier_fd_handler(VirtIODevice *vdev, VirtQueu= e *vq, int n, bool assign, bool with_irqfd); + +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, uint8_t bar, uint64_t of= fset, + uint64_t length, uint8_t id); + #endif --=20 2.41.0.255.g8b1d071c50-goog From nobody Sun May 19 15:58:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=chromium.org ARC-Seal: i=1; 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Mon, 10 Jul 2023 19:56:54 -0700 (PDT) From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: --cc=kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org, shentey@gmail.com Subject: [PATCH v1 2/9] virtio-gpu: CONTEXT_INIT feature Date: Mon, 10 Jul 2023 19:56:42 -0700 Message-Id: <20230711025649.708-3-gurchetansingh@chromium.org> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230711025649.708-1-gurchetansingh@chromium.org> References: <20230711025649.708-1-gurchetansingh@chromium.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=gurchetansingh@chromium.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044304374100003 From: Antonio Caggiano The feature can be enabled when a backend wants it. Signed-off-by: Antonio Caggiano Reviewed-by: Marc-Andr=C3=A9 Lureau Signed-off-by: Gurchetan Singh Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Akihiko Odaki --- hw/display/virtio-gpu-base.c | 3 +++ include/hw/virtio/virtio-gpu.h | 3 +++ 2 files changed, 6 insertions(+) diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index a29f191aa8..6c5f1f327f 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -215,6 +215,9 @@ virtio_gpu_base_get_features(VirtIODevice *vdev, uint64= _t features, if (virtio_gpu_blob_enabled(g->conf)) { features |=3D (1 << VIRTIO_GPU_F_RESOURCE_BLOB); } + if (virtio_gpu_context_init_enabled(g->conf)) { + features |=3D (1 << VIRTIO_GPU_F_CONTEXT_INIT); + } =20 return features; } diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 7a5f8056ea..8f9b3e4ac6 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -93,6 +93,7 @@ enum virtio_gpu_base_conf_flags { VIRTIO_GPU_FLAG_EDID_ENABLED, VIRTIO_GPU_FLAG_DMABUF_ENABLED, VIRTIO_GPU_FLAG_BLOB_ENABLED, + VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED, }; =20 #define virtio_gpu_virgl_enabled(_cfg) \ @@ -105,6 +106,8 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) #define virtio_gpu_blob_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) +#define virtio_gpu_context_init_enabled(_cfg) \ + (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED)) =20 struct virtio_gpu_base_conf { uint32_t max_outputs; --=20 2.41.0.255.g8b1d071c50-goog From nobody Sun May 19 15:58:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=chromium.org ARC-Seal: i=1; a=rsa-sha256; t=1689044279; cv=none; d=zohomail.com; s=zohoarc; b=GwuJuAKMq2ILhf87JQRHOWGeP8XwYs00JL19HW1rU2JhlUNxUBMz1zxfV7XovyCyjR/gYgAD2RA4ZbCzLcdDj77nDG09aKRF+kVZKhhU3uw6B3QNylY84yUPcUDmpnLWBitZDEPWQNNCS2I9/ZeE+yefd7mIJM0c+P+NdmDvoQs= ARC-Message-Signature: i=1; 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Mon, 10 Jul 2023 19:56:55 -0700 (PDT) From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: --cc=kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org, shentey@gmail.com Subject: [PATCH v1 3/9] virtio-gpu: hostmem Date: Mon, 10 Jul 2023 19:56:43 -0700 Message-Id: <20230711025649.708-4-gurchetansingh@chromium.org> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230711025649.708-1-gurchetansingh@chromium.org> References: <20230711025649.708-1-gurchetansingh@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=gurchetansingh@chromium.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044280208100001 Content-Type: text/plain; charset="utf-8" From: Gerd Hoffmann Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. Signed-off-by: Antonio Caggiano Acked-by: Michael S. Tsirkin --- hw/display/virtio-gpu-pci.c | 14 ++++++++++++++ hw/display/virtio-gpu.c | 1 + hw/display/virtio-vga.c | 33 ++++++++++++++++++++++++--------- include/hw/virtio/virtio-gpu.h | 5 +++++ 4 files changed, 44 insertions(+), 9 deletions(-) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 93f214ff58..da6a99f038 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *= vpci_dev, Error **errp) DeviceState *vdev =3D DEVICE(g); int i; =20 + if (virtio_gpu_hostmem_enabled(g->conf)) { + vpci_dev->msix_bar_idx =3D 1; + vpci_dev->modern_mem_bar_idx =3D 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + virtio_pci_force_virtio_1(vpci_dev); if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { return; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 347e17d490..23ef371da7 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1487,6 +1487,7 @@ static Property virtio_gpu_properties[] =3D { 256 * MiB), DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index e6fb0aa876..c8552ff760 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *v= pci_dev, Error **errp) pci_register_bar(&vpci_dev->pci_dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); =20 - /* - * Configure virtio bar and regions - * - * We use bar #2 for the mmio regions, to be compatible with stdvga. - * virtio regions are moved to the end of bar #2, to make room for - * the stdvga mmio registers at the start of bar #2. - */ - vpci_dev->modern_mem_bar_idx =3D 2; - vpci_dev->msix_bar_idx =3D 4; vpci_dev->modern_io_bar_idx =3D 5; =20 + if (!virtio_gpu_hostmem_enabled(g->conf)) { + /* + * Configure virtio bar and regions + * + * We use bar #2 for the mmio regions, to be compatible with stdvg= a. + * virtio regions are moved to the end of bar #2, to make room for + * the stdvga mmio registers at the start of bar #2. + */ + vpci_dev->modern_mem_bar_idx =3D 2; + vpci_dev->msix_bar_idx =3D 4; + } else { + vpci_dev->msix_bar_idx =3D 1; + vpci_dev->modern_mem_bar_idx =3D 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { /* * with page-per-vq=3Doff there is no padding space we can use diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 8f9b3e4ac6..1b16412f43 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -108,12 +108,15 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) #define virtio_gpu_context_init_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED)) +#define virtio_gpu_hostmem_enabled(_cfg) \ + (_cfg.hostmem > 0) =20 struct virtio_gpu_base_conf { uint32_t max_outputs; uint32_t flags; uint32_t xres; uint32_t yres; + uint64_t hostmem; }; =20 struct virtio_gpu_ctrl_command { @@ -137,6 +140,8 @@ struct VirtIOGPUBase { int renderer_blocked; int enable; =20 + MemoryRegion hostmem; + struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; =20 int enabled_output_bitmask; --=20 2.41.0.255.g8b1d071c50-goog From nobody Sun May 19 15:58:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=chromium.org ARC-Seal: i=1; a=rsa-sha256; t=1689044279; cv=none; d=zohomail.com; s=zohoarc; b=k6wfhlaDf5bh9f5V992igsWbbehtEEgBC5y2Xn2E1v/+Uf9jd6W1df4lLtBWfTwvNhJxNyI3658AMIQoNyNeripQSuM5ayXMBVLeHDLAsVHVtARKZRHpQ1WfNcSttkBC6DAAbFkZuA1sEVrLXvZ98awyPYmXoH+CW9QX9j2hPj0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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Mon, 10 Jul 2023 19:56:58 -0700 (PDT) From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: --cc=kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org, shentey@gmail.com Subject: [PATCH v1 4/9] virtio-gpu: blob prep Date: Mon, 10 Jul 2023 19:56:44 -0700 Message-Id: <20230711025649.708-5-gurchetansingh@chromium.org> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230711025649.708-1-gurchetansingh@chromium.org> References: <20230711025649.708-1-gurchetansingh@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=gurchetansingh@chromium.org; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044280235100003 Content-Type: text/plain; charset="utf-8" From: Antonio Caggiano This adds preparatory functions needed to: - decode blob cmds - tracking iovecs Signed-off-by: Antonio Caggiano Signed-off-by: Dmitry Osipenko Signed-off-by: Gurchetan Singh --- hw/display/virtio-gpu.c | 11 +++-------- include/hw/virtio/virtio-gpu-bswap.h | 18 ++++++++++++++++++ include/hw/virtio/virtio-gpu.h | 5 +++++ 3 files changed, 26 insertions(+), 8 deletions(-) diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 23ef371da7..32da46fefc 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -33,16 +33,11 @@ =20 #define VIRTIO_GPU_VM_VERSION 1 =20 -static struct virtio_gpu_simple_resource* -virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); static struct virtio_gpu_simple_resource * virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, bool require_backing, const char *caller, uint32_t *error); =20 -static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, - struct virtio_gpu_simple_resource *= res); - void virtio_gpu_update_cursor_data(VirtIOGPU *g, struct virtio_gpu_scanout *s, uint32_t resource_id) @@ -115,7 +110,7 @@ static void update_cursor(VirtIOGPU *g, struct virtio_g= pu_update_cursor *cursor) cursor->resource_id ? 1 : 0); } =20 -static struct virtio_gpu_simple_resource * +struct virtio_gpu_simple_resource * virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id) { struct virtio_gpu_simple_resource *res; @@ -919,8 +914,8 @@ void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, g_free(iov); } =20 -static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, - struct virtio_gpu_simple_resource *= res) +void virtio_gpu_cleanup_mapping(VirtIOGPU *g, + struct virtio_gpu_simple_resource *res) { virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt); res->iov =3D NULL; diff --git a/include/hw/virtio/virtio-gpu-bswap.h b/include/hw/virtio/virti= o-gpu-bswap.h index 9124108485..dd1975e2d4 100644 --- a/include/hw/virtio/virtio-gpu-bswap.h +++ b/include/hw/virtio/virtio-gpu-bswap.h @@ -63,10 +63,28 @@ virtio_gpu_create_blob_bswap(struct virtio_gpu_resource= _create_blob *cblob) { virtio_gpu_ctrl_hdr_bswap(&cblob->hdr); le32_to_cpus(&cblob->resource_id); + le32_to_cpus(&cblob->blob_mem); le32_to_cpus(&cblob->blob_flags); + le32_to_cpus(&cblob->nr_entries); + le64_to_cpus(&cblob->blob_id); le64_to_cpus(&cblob->size); } =20 +static inline void +virtio_gpu_map_blob_bswap(struct virtio_gpu_resource_map_blob *mblob) +{ + virtio_gpu_ctrl_hdr_bswap(&mblob->hdr); + le32_to_cpus(&mblob->resource_id); + le64_to_cpus(&mblob->offset); +} + +static inline void +virtio_gpu_unmap_blob_bswap(struct virtio_gpu_resource_unmap_blob *ublob) +{ + virtio_gpu_ctrl_hdr_bswap(&ublob->hdr); + le32_to_cpus(&ublob->resource_id); +} + static inline void virtio_gpu_scanout_blob_bswap(struct virtio_gpu_set_scanout_blob *ssb) { diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 1b16412f43..5927ca1864 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -251,6 +251,9 @@ void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, struct virtio_gpu_resp_display_info *dpy_info); =20 /* virtio-gpu.c */ +struct virtio_gpu_simple_resource * +virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); + void virtio_gpu_ctrl_response(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd, struct virtio_gpu_ctrl_hdr *resp, @@ -269,6 +272,8 @@ int virtio_gpu_create_mapping_iov(VirtIOGPU *g, uint32_t *niov); void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, struct iovec *iov, uint32_t count); +void virtio_gpu_cleanup_mapping(VirtIOGPU *g, + struct virtio_gpu_simple_resource *res); void virtio_gpu_process_cmdq(VirtIOGPU *g); void virtio_gpu_device_realize(DeviceState *qdev, Error **errp); void virtio_gpu_reset(VirtIODevice *vdev); --=20 2.41.0.255.g8b1d071c50-goog From nobody Sun May 19 15:58:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=chromium.org ARC-Seal: i=1; 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Mon, 10 Jul 2023 19:56:59 -0700 (PDT) From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: --cc=kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org, shentey@gmail.com Subject: [PATCH v1 5/9] gfxstream + rutabaga prep: added need defintions, fields, and options Date: Mon, 10 Jul 2023 19:56:45 -0700 Message-Id: <20230711025649.708-6-gurchetansingh@chromium.org> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230711025649.708-1-gurchetansingh@chromium.org> References: <20230711025649.708-1-gurchetansingh@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::c2f; envelope-from=gurchetansingh@chromium.org; helo=mail-oo1-xc2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044310378100003 Content-Type: text/plain; charset="utf-8" This modifies the common virtio-gpu.h file have the fields and defintions needed by gfxstream/rutabaga, by VirtioGpuRutabaga. - a colon separated list of capset names, defined in the virtio spec - a wayland socket path to enable guest Wayland passthrough The command to run these would be: -device virtio-vga-rutabaga,capset_names=3Dgfxstream:cross-domain, \ wayland_socket_path=3D/run/user/1000/wayland-0,hostmem=3D8G \ Signed-off-by: Gurchetan Singh --- v2: void *rutabaga --> struct rutabaga *rutabaga (Akihiko) have a separate rutabaga device instead of using GL device (Bernard) include/hw/virtio/virtio-gpu.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 5927ca1864..5a1b15ccb9 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -38,6 +38,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUGL, VIRTIO_GPU_GL) #define TYPE_VHOST_USER_GPU "vhost-user-gpu" OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU, VHOST_USER_GPU) =20 +#define TYPE_VIRTIO_GPU_RUTABAGA "virtio-gpu-rutabaga-device" +OBJECT_DECLARE_SIMPLE_TYPE(VirtioGpuRutabaga, VIRTIO_GPU_RUTABAGA) + struct virtio_gpu_simple_resource { uint32_t resource_id; uint32_t width; @@ -94,6 +97,7 @@ enum virtio_gpu_base_conf_flags { VIRTIO_GPU_FLAG_DMABUF_ENABLED, VIRTIO_GPU_FLAG_BLOB_ENABLED, VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED, + VIRTIO_GPU_FLAG_RUTABAGA_ENABLED, }; =20 #define virtio_gpu_virgl_enabled(_cfg) \ @@ -108,6 +112,8 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) #define virtio_gpu_context_init_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED)) +#define virtio_gpu_rutabaga_enabled(_cfg) \ + (_cfg.flags & (1 << VIRTIO_GPU_FLAG_RUTABAGA_ENABLED)) #define virtio_gpu_hostmem_enabled(_cfg) \ (_cfg.hostmem > 0) =20 @@ -229,6 +235,21 @@ struct VhostUserGPU { bool backend_blocked; }; =20 +struct rutabaga; + +struct VirtioGpuRutabaga { + struct VirtIOGPU parent_obj; + + bool rutabaga_active; + char *capset_names; + char *wayland_socket_path; + char *wsi; + bool headless; + uint32_t num_capsets; + struct rutabaga *rutabaga; + AioContext *ctx; +}; + #define VIRTIO_GPU_FILL_CMD(out) do { \ size_t s; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::d32; envelope-from=gurchetansingh@chromium.org; helo=mail-io1-xd32.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044280270100005 Content-Type: text/plain; charset="utf-8" This adds initial support for gfxstream and cross-domain. Both features rely on virtio-gpu blob resources and context types, which are also implemented in this patch. gfxstream has a long and illustrious history in Android graphics paravirtualization. It has been powering graphics in the Android Studio Emulator for more than a decade, which is the main developer platform. Originally conceived by Jesse Hall, it was first known as "EmuGL" [a]. The key design characteristic was a 1:1 threading model and auto-generation, which fit nicely with the OpenGLES spec. It also allowed easy layering with ANGLE on the host, which provides the GLES implementations on Windows or MacOS enviroments. gfxstream has traditionally been maintained by a single engineer, and between 2015 to 2021, the goldfish throne passed to Frank Yang. Historians often remark this glorious reign ("pax gfxstreama" is the academic term) was comparable to that of Augustus and the both Queen Elizabeths. Just to name a few accomplishments in a resplendent panoply: higher versions of GLES, address space graphics, snapshot support and CTS compliant Vulkan [b]. One major drawback was the use of out-of-tree goldfish drivers. Android engineers didn't know much about DRM/KMS and especially TTM so a simple guest to host pipe was conceived. Luckily, virtio-gpu 3D started to emerge in 2016 due to the work of the Mesa/virglrenderer communities. In 2018, the initial virtio-gpu port of gfxstream was done by Cuttlefish enthusiast Alistair Delva. It was a symbol compatible replacement of virglrenderer [c] and named "AVDVirglrenderer". This implementation forms the basis of the current gfxstream host implementation still in use today. cross-domain support follows a similar arc. Originally conceived by Wayland aficionado David Reveman and crosvm enjoyer Zach Reizner in 2018, it initially relied on the downstream "virtio-wl" device. In 2020 and 2021, virtio-gpu was extended to include blob resources and multiple timelines by yours truly, features gfxstream/cross-domain both require to function correctly. Right now, we stand at the precipice of a truly fantastic possibility: the Android Emulator powered by upstream QEMU and upstream Linux kernel. gfxstream will then be packaged properfully, and app developers can even fix gfxstream bugs on their own if they encounter them. It's been quite the ride, my friends. Where will gfxstream head next, nobody really knows. I wouldn't be surprised if it's around for another decade, maintained by a new generation of Android graphics enthusiasts. Technical details: - Very simple initial display integration: just used Pixman - Largely, 1:1 mapping of virtio-gpu hypercalls to rutabaga function calls [a] https://android-review.googlesource.com/c/platform/development/+/34470 [b] https://android-review.googlesource.com/q/topic:%22vulkan-hostconnectio= n-start%22 [c] https://android-review.googlesource.com/c/device/generic/goldfish-openg= l/+/761927 Signed-off-by: Gurchetan Singh --- v2: Incorported various suggestions by Akihiko Odaki and Bernard Berschow - Removed GET_VIRTIO_GPU_GL / GET_RUTABAGA macros - Used error_report(..) - Used g_autofree to fix leaks on error paths - Removed unnecessary casts - added virtio-gpu-pci-rutabaga.c + virtio-vga-rutabaga.c files hw/display/virtio-gpu-pci-rutabaga.c | 48 ++ hw/display/virtio-gpu-rutabaga.c | 1088 ++++++++++++++++++++++++++ hw/display/virtio-vga-rutabaga.c | 52 ++ 3 files changed, 1188 insertions(+) create mode 100644 hw/display/virtio-gpu-pci-rutabaga.c create mode 100644 hw/display/virtio-gpu-rutabaga.c create mode 100644 hw/display/virtio-vga-rutabaga.c diff --git a/hw/display/virtio-gpu-pci-rutabaga.c b/hw/display/virtio-gpu-p= ci-rutabaga.c new file mode 100644 index 0000000000..5765bef266 --- /dev/null +++ b/hw/display/virtio-gpu-pci-rutabaga.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/module.h" +#include "hw/pci/pci.h" +#include "hw/qdev-properties.h" +#include "hw/virtio/virtio.h" +#include "hw/virtio/virtio-bus.h" +#include "hw/virtio/virtio-gpu-pci.h" +#include "qom/object.h" + +#define TYPE_VIRTIO_GPU_RUTABAGA_PCI "virtio-gpu-rutabaga-pci" +typedef struct VirtIOGPURUTABAGAPCI VirtIOGPURUTABAGAPCI; +DECLARE_INSTANCE_CHECKER(VirtIOGPURUTABAGAPCI, VIRTIO_GPU_RUTABAGA_PCI, + TYPE_VIRTIO_GPU_RUTABAGA_PCI) + +struct VirtIOGPURUTABAGAPCI { + VirtIOGPUPCIBase parent_obj; + VirtioGpuRutabaga vdev; +}; + +static void virtio_gpu_rutabaga_initfn(Object *obj) +{ + VirtIOGPURUTABAGAPCI *dev =3D VIRTIO_GPU_RUTABAGA_PCI(obj); + + virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), + TYPE_VIRTIO_GPU_RUTABAGA); + VIRTIO_GPU_PCI_BASE(obj)->vgpu =3D VIRTIO_GPU_BASE(&dev->vdev); +} + +static const VirtioPCIDeviceTypeInfo virtio_gpu_rutabaga_pci_info =3D { + .generic_name =3D TYPE_VIRTIO_GPU_RUTABAGA_PCI, + .parent =3D TYPE_VIRTIO_GPU_PCI_BASE, + .instance_size =3D sizeof(VirtIOGPURUTABAGAPCI), + .instance_init =3D virtio_gpu_rutabaga_initfn, +}; +module_obj(TYPE_VIRTIO_GPU_RUTABAGA_PCI); +module_kconfig(VIRTIO_PCI); + +static void virtio_gpu_rutabaga_pci_register_types(void) +{ + virtio_pci_types_register(&virtio_gpu_rutabaga_pci_info); +} + +type_init(virtio_gpu_rutabaga_pci_register_types) + +module_dep("hw-display-virtio-gpu-pci"); diff --git a/hw/display/virtio-gpu-rutabaga.c b/hw/display/virtio-gpu-rutab= aga.c new file mode 100644 index 0000000000..b60a30a093 --- /dev/null +++ b/hw/display/virtio-gpu-rutabaga.c @@ -0,0 +1,1088 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include "qemu/osdep.h" +#include "qemu/error-report.h" +#include "qemu/iov.h" +#include "trace.h" +#include "hw/virtio/virtio.h" +#include "hw/virtio/virtio-gpu.h" +#include "hw/virtio/virtio-gpu-pixman.h" +#include "hw/virtio/virtio-iommu.h" + +#include +#include + +#define CHECK(condition, cmd) = \ + do { = \ + if (!condition) { = \ + error_report("CHECK failed in %s() %s:" "%d", __func__, = \ + __FILE__, __LINE__); = \ + cmd->error =3D VIRTIO_GPU_RESP_ERR_UNSPEC; = \ + return; = \ + } = \ + } while (0) + +#define CHECK_RESULT(result, cmd) CHECK(result =3D=3D 0, cmd) + +#define MAX_SLOTS 4096 + +struct MemoryRegionInfo { + int used; + MemoryRegion mr; + uint32_t resource_id; +}; + +static struct MemoryRegionInfo memory_regions[MAX_SLOTS]; + +struct rutabaga_aio_data { + struct VirtioGpuRutabaga *vr; + struct rutabaga_fence fence; +}; + +static void +virtio_gpu_rutabaga_update_cursor(VirtIOGPU *g, struct virtio_gpu_scanout = *s, + uint32_t resource_id) +{ + struct virtio_gpu_simple_resource *res; + struct rutabaga_transfer transfer =3D { 0 }; + struct iovec transfer_iovec; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + res =3D virtio_gpu_find_resource(g, resource_id); + if (!res) { + return; + } + + if (res->width !=3D s->current_cursor->width || + res->height !=3D s->current_cursor->height) { + return; + } + + transfer.x =3D 0; + transfer.y =3D 0; + transfer.z =3D 0; + transfer.w =3D res->width; + transfer.h =3D res->height; + transfer.d =3D 1; + + transfer_iovec.iov_base =3D (void *)s->current_cursor->data; + transfer_iovec.iov_len =3D res->width * res->height * 4; + + rutabaga_resource_transfer_read(vr->rutabaga, 0, + resource_id, &transfer, + &transfer_iovec); +} + +static void +virtio_gpu_rutabaga_gl_flushed(VirtIOGPUBase *b) +{ + VirtIOGPU *g =3D VIRTIO_GPU(b); + virtio_gpu_process_cmdq(g); +} + +static void +rutabaga_cmd_create_resource_2d(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct rutabaga_create_3d rc_3d =3D { 0 }; + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_create_2d c2d; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(c2d); + trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format, + c2d.width, c2d.height); + + rc_3d.target =3D 2; + rc_3d.format =3D c2d.format; + rc_3d.bind =3D (1 << 1); + rc_3d.width =3D c2d.width; + rc_3d.height =3D c2d.height; + rc_3d.depth =3D 1; + rc_3d.array_size =3D 1; + rc_3d.last_level =3D 0; + rc_3d.nr_samples =3D 0; + rc_3d.flags =3D VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP; + + result =3D rutabaga_resource_create_3d(vr->rutabaga, c2d.resource_id, = &rc_3d); + CHECK_RESULT(result, cmd); + + res =3D g_new0(struct virtio_gpu_simple_resource, 1); + res->width =3D c2d.width; + res->height =3D c2d.height; + res->format =3D c2d.format; + res->resource_id =3D c2d.resource_id; + + QTAILQ_INSERT_HEAD(&g->reslist, res, next); +} + +static void +rutabaga_cmd_create_resource_3d(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct rutabaga_create_3d rc_3d =3D { 0 }; + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_create_3d c3d; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(c3d); + + trace_virtio_gpu_cmd_res_create_3d(c3d.resource_id, c3d.format, + c3d.width, c3d.height, c3d.depth); + + rc_3d.target =3D c3d.target; + rc_3d.format =3D c3d.format; + rc_3d.bind =3D c3d.bind; + rc_3d.width =3D c3d.width; + rc_3d.height =3D c3d.height; + rc_3d.depth =3D c3d.depth; + rc_3d.array_size =3D c3d.array_size; + rc_3d.last_level =3D c3d.last_level; + rc_3d.nr_samples =3D c3d.nr_samples; + rc_3d.flags =3D c3d.flags; + + result =3D rutabaga_resource_create_3d(vr->rutabaga, c3d.resource_id, = &rc_3d); + CHECK_RESULT(result, cmd); + + res =3D g_new0(struct virtio_gpu_simple_resource, 1); + res->width =3D c3d.width; + res->height =3D c3d.height; + res->format =3D c3d.format; + res->resource_id =3D c3d.resource_id; + + QTAILQ_INSERT_HEAD(&g->reslist, res, next); +} + +static void +rutabaga_cmd_resource_unref(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_unref unref; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(unref); + + trace_virtio_gpu_cmd_res_unref(unref.resource_id); + + res =3D virtio_gpu_find_resource(g, unref.resource_id); + CHECK(res, cmd); + + result =3D rutabaga_resource_unref(vr->rutabaga, unref.resource_id); + CHECK_RESULT(result, cmd); + + if (res->image) { + pixman_image_unref(res->image); + } + + QTAILQ_REMOVE(&g->reslist, res, next); + g_free(res); +} + +static void +rutabaga_cmd_context_create(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct virtio_gpu_ctx_create cc; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(cc); + trace_virtio_gpu_cmd_ctx_create(cc.hdr.ctx_id, + cc.debug_name); + + result =3D rutabaga_context_create(vr->rutabaga, cc.hdr.ctx_id, + cc.context_init, cc.debug_name, cc.nl= en); + CHECK_RESULT(result, cmd); +} + +static void +rutabaga_cmd_context_destroy(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct virtio_gpu_ctx_destroy cd; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(cd); + trace_virtio_gpu_cmd_ctx_destroy(cd.hdr.ctx_id); + + result =3D rutabaga_context_destroy(vr->rutabaga, cd.hdr.ctx_id); + CHECK_RESULT(result, cmd); +} + +static void +rutabaga_cmd_resource_flush(VirtIOGPU *g, struct virtio_gpu_ctrl_command *= cmd) +{ + int32_t result, i; + struct virtio_gpu_scanout *scanout =3D NULL; + struct virtio_gpu_simple_resource *res; + struct rutabaga_transfer transfer =3D { 0 }; + struct iovec transfer_iovec; + struct virtio_gpu_resource_flush rf; + bool found =3D false; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + if (vr->headless) { + return; + } + + VIRTIO_GPU_FILL_CMD(rf); + trace_virtio_gpu_cmd_res_flush(rf.resource_id, + rf.r.width, rf.r.height, rf.r.x, rf.r.y= ); + + res =3D virtio_gpu_find_resource(g, rf.resource_id); + CHECK(res, cmd); + + for (i =3D 0; i < g->parent_obj.conf.max_outputs; i++) { + scanout =3D &g->parent_obj.scanout[i]; + if (i =3D=3D res->scanout_bitmask) { + found =3D true; + break; + } + } + + if (!found) { + return; + } + + transfer.x =3D 0; + transfer.y =3D 0; + transfer.z =3D 0; + transfer.w =3D res->width; + transfer.h =3D res->height; + transfer.d =3D 1; + + transfer_iovec.iov_base =3D (void *)pixman_image_get_data(res->image); + transfer_iovec.iov_len =3D res->width * res->height * 4; + + result =3D rutabaga_resource_transfer_read(vr->rutabaga, 0, + rf.resource_id, &transfer, + &transfer_iovec); + CHECK_RESULT(result, cmd); + dpy_gfx_update_full(scanout->con); +} + +static void +rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_scanout *scanout =3D NULL; + struct virtio_gpu_set_scanout ss; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + if (vr->headless) { + return; + } + + VIRTIO_GPU_FILL_CMD(ss); + trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id, + ss.r.width, ss.r.height, ss.r.x, ss.r= .y); + + scanout =3D &g->parent_obj.scanout[ss.scanout_id]; + g->parent_obj.enable =3D 1; + + if (ss.resource_id =3D=3D 0) { + return; + } + + res =3D virtio_gpu_find_resource(g, ss.resource_id); + CHECK(res, cmd); + + if (!res->image) { + pixman_format_code_t pformat; + pformat =3D virtio_gpu_get_pixman_format(res->format); + CHECK(pformat, cmd); + + res->image =3D pixman_image_create_bits(pformat, + res->width, + res->height, + NULL, 0); + CHECK(res->image, cmd); + pixman_image_ref(res->image); + } + + /* realloc the surface ptr */ + scanout->ds =3D qemu_create_displaysurface_pixman(res->image); + dpy_gfx_replace_surface(scanout->con, NULL); + dpy_gfx_replace_surface(scanout->con, scanout->ds); + res->scanout_bitmask =3D ss.scanout_id; +} + +static void +rutabaga_cmd_submit_3d(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct virtio_gpu_cmd_submit cs; + g_autofree uint8_t *buf =3D NULL; + size_t s; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(cs); + trace_virtio_gpu_cmd_ctx_submit(cs.hdr.ctx_id, cs.size); + + buf =3D g_new0(uint8_t, cs.size); + s =3D iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, + sizeof(cs), buf, cs.size); + CHECK((s =3D=3D cs.size), cmd); + + result =3D rutabaga_submit_command(vr->rutabaga, cs.hdr.ctx_id, buf, c= s.size); + CHECK_RESULT(result, cmd); +} + +static void +rutabaga_cmd_transfer_to_host_2d(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct rutabaga_transfer transfer =3D { 0 }; + struct virtio_gpu_transfer_to_host_2d t2d; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(t2d); + trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id); + + transfer.x =3D t2d.r.x; + transfer.y =3D t2d.r.y; + transfer.z =3D 0; + transfer.w =3D t2d.r.width; + transfer.h =3D t2d.r.height; + transfer.d =3D 1; + + result =3D rutabaga_resource_transfer_write(vr->rutabaga, 0, t2d.resou= rce_id, + &transfer); + CHECK_RESULT(result, cmd); +} + +static void +rutabaga_cmd_transfer_to_host_3d(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct rutabaga_transfer transfer =3D { 0 }; + struct virtio_gpu_transfer_host_3d t3d; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(t3d); + trace_virtio_gpu_cmd_res_xfer_toh_3d(t3d.resource_id); + + transfer.x =3D t3d.box.x; + transfer.y =3D t3d.box.y; + transfer.z =3D t3d.box.z; + transfer.w =3D t3d.box.w; + transfer.h =3D t3d.box.h; + transfer.d =3D t3d.box.d; + transfer.level =3D t3d.level; + transfer.stride =3D t3d.stride; + transfer.layer_stride =3D t3d.layer_stride; + transfer.offset =3D t3d.offset; + + result =3D rutabaga_resource_transfer_write(vr->rutabaga, t3d.hdr.ctx_= id, + t3d.resource_id, &transfer); + CHECK_RESULT(result, cmd); +} + +static void +rutabaga_cmd_transfer_from_host_3d(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct rutabaga_transfer transfer =3D { 0 }; + struct virtio_gpu_transfer_host_3d t3d; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(t3d); + trace_virtio_gpu_cmd_res_xfer_fromh_3d(t3d.resource_id); + + transfer.x =3D t3d.box.x; + transfer.y =3D t3d.box.y; + transfer.z =3D t3d.box.z; + transfer.w =3D t3d.box.w; + transfer.h =3D t3d.box.h; + transfer.d =3D t3d.box.d; + transfer.level =3D t3d.level; + transfer.stride =3D t3d.stride; + transfer.layer_stride =3D t3d.layer_stride; + transfer.offset =3D t3d.offset; + + result =3D rutabaga_resource_transfer_read(vr->rutabaga, t3d.hdr.ctx_i= d, + t3d.resource_id, &transfer, N= ULL); + CHECK_RESULT(result, cmd); +} + +static void +rutabaga_cmd_attach_backing(VirtIOGPU *g, struct virtio_gpu_ctrl_command *= cmd) +{ + struct rutabaga_iovecs vecs =3D { 0 }; + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_attach_backing att_rb; + struct iovec *res_iovs; + uint32_t res_niov; + int ret; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(att_rb); + trace_virtio_gpu_cmd_res_back_attach(att_rb.resource_id); + + res =3D virtio_gpu_find_resource(g, att_rb.resource_id); + CHECK(res, cmd); + CHECK(!res->iov, cmd); + + ret =3D virtio_gpu_create_mapping_iov(g, att_rb.nr_entries, sizeof(att= _rb), + cmd, NULL, &res_iovs, &res_niov); + CHECK_RESULT(ret, cmd); + + vecs.iovecs =3D res_iovs; + vecs.num_iovecs =3D res_niov; + + ret =3D rutabaga_resource_attach_backing(vr->rutabaga, att_rb.resource= _id, + &vecs); + if (ret !=3D 0) { + virtio_gpu_cleanup_mapping_iov(g, res_iovs, res_niov); + } +} + +static void +rutabaga_cmd_detach_backing(VirtIOGPU *g, struct virtio_gpu_ctrl_command *= cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_detach_backing detach_rb; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(detach_rb); + trace_virtio_gpu_cmd_res_back_detach(detach_rb.resource_id); + + res =3D virtio_gpu_find_resource(g, detach_rb.resource_id); + CHECK(res, cmd); + + rutabaga_resource_detach_backing(vr->rutabaga, + detach_rb.resource_id); + + virtio_gpu_cleanup_mapping(g, res); +} + +static void +rutabaga_cmd_ctx_attach_resource(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct virtio_gpu_ctx_resource att_res; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(att_res); + trace_virtio_gpu_cmd_ctx_res_attach(att_res.hdr.ctx_id, + att_res.resource_id); + + result =3D rutabaga_context_attach_resource(vr->rutabaga, att_res.hdr.= ctx_id, + att_res.resource_id); + CHECK_RESULT(result, cmd); +} + +static void +rutabaga_cmd_ctx_detach_resource(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct virtio_gpu_ctx_resource det_res; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(det_res); + trace_virtio_gpu_cmd_ctx_res_detach(det_res.hdr.ctx_id, + det_res.resource_id); + + result =3D rutabaga_context_detach_resource(vr->rutabaga, det_res.hdr.= ctx_id, + det_res.resource_id); + CHECK_RESULT(result, cmd); +} + +static void +rutabaga_cmd_get_capset_info(VirtIOGPU *g, struct virtio_gpu_ctrl_command = *cmd) +{ + int32_t result; + struct virtio_gpu_get_capset_info info; + struct virtio_gpu_resp_capset_info resp; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(info); + + result =3D rutabaga_get_capset_info(vr->rutabaga, info.capset_index, + &resp.capset_id, &resp.capset_max_ve= rsion, + &resp.capset_max_size); + CHECK_RESULT(result, cmd); + + resp.hdr.type =3D VIRTIO_GPU_RESP_OK_CAPSET_INFO; + virtio_gpu_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); +} + +static void +rutabaga_cmd_get_capset(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + struct virtio_gpu_get_capset gc; + struct virtio_gpu_resp_capset *resp; + uint32_t capset_size; + uint32_t current_id; + bool found =3D false; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(gc); + for (uint32_t i =3D 0; i < vr->num_capsets; i++) { + result =3D rutabaga_get_capset_info(vr->rutabaga, i, + ¤t_id, &capset_size, + &capset_size); + CHECK_RESULT(result, cmd); + + if (current_id =3D=3D gc.capset_id) { + found =3D true; + break; + } + } + + if (!found) { + error_report("capset not found!"); + return; + } + + resp =3D g_malloc0(sizeof(*resp) + capset_size); + resp->hdr.type =3D VIRTIO_GPU_RESP_OK_CAPSET; + rutabaga_get_capset(vr->rutabaga, gc.capset_id, gc.capset_version, + (uint8_t *)resp->capset_data, capset_size); + + virtio_gpu_ctrl_response(g, cmd, &resp->hdr, sizeof(*resp) + capset_si= ze); + g_free(resp); +} + +static void +rutabaga_cmd_resource_create_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int result; + struct rutabaga_iovecs vecs =3D { 0 }; + g_autofree struct virtio_gpu_simple_resource *res =3D NULL; + struct virtio_gpu_simple_resource *resource; + struct virtio_gpu_resource_create_blob cblob; + struct rutabaga_create_blob rc_blob =3D { 0 }; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(cblob); + trace_virtio_gpu_cmd_res_create_blob(cblob.resource_id, cblob.size); + + CHECK(cblob.resource_id !=3D 0, cmd); + + res =3D g_new0(struct virtio_gpu_simple_resource, 1); + + res->resource_id =3D cblob.resource_id; + res->blob_size =3D cblob.size; + + if (cblob.blob_mem !=3D VIRTIO_GPU_BLOB_MEM_HOST3D) { + result =3D virtio_gpu_create_mapping_iov(g, cblob.nr_entries, + sizeof(cblob), cmd, &res->a= ddrs, + &res->iov, &res->iov_cnt); + CHECK_RESULT(result, cmd); + } + + rc_blob.blob_id =3D cblob.blob_id; + rc_blob.blob_mem =3D cblob.blob_mem; + rc_blob.blob_flags =3D cblob.blob_flags; + rc_blob.size =3D cblob.size; + + vecs.iovecs =3D res->iov; + vecs.num_iovecs =3D res->iov_cnt; + + result =3D rutabaga_resource_create_blob(vr->rutabaga, cblob.hdr.ctx_i= d, + cblob.resource_id, &rc_blob, &v= ecs, + NULL); + CHECK_RESULT(result, cmd); + resource =3D g_steal_pointer(&res); + QTAILQ_INSERT_HEAD(&g->reslist, resource, next); +} + +static void +rutabaga_cmd_resource_map_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + uint32_t slot =3D 0; + struct virtio_gpu_simple_resource *res; + struct rutabaga_mapping mapping =3D { 0 }; + struct virtio_gpu_resource_map_blob mblob; + struct virtio_gpu_resp_map_info resp; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(mblob); + + CHECK(mblob.resource_id !=3D 0, cmd); + + res =3D virtio_gpu_find_resource(g, mblob.resource_id); + CHECK(res, cmd); + + result =3D rutabaga_resource_map(vr->rutabaga, mblob.resource_id, &map= ping); + CHECK_RESULT(result, cmd); + + for (slot =3D 0; slot < MAX_SLOTS; slot++) { + if (memory_regions[slot].used) { + continue; + } + + MemoryRegion *mr =3D &(memory_regions[slot].mr); + memory_region_init_ram_ptr(mr, NULL, "blob", mapping.size, + (void *)mapping.ptr); + memory_region_add_subregion(&g->parent_obj.hostmem, + mblob.offset, mr); + memory_regions[slot].resource_id =3D mblob.resource_id; + memory_regions[slot].used =3D 1; + break; + } + + CHECK((slot < MAX_SLOTS), cmd); + + memset(&resp, 0, sizeof(resp)); + resp.hdr.type =3D VIRTIO_GPU_RESP_OK_MAP_INFO; + result =3D rutabaga_resource_map_info(vr->rutabaga, mblob.resource_id, + &resp.map_info); + + CHECK_RESULT(result, cmd); + virtio_gpu_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); +} + +static void +rutabaga_cmd_resource_unmap_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + int32_t result; + uint32_t slot =3D 0; + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_unmap_blob ublob; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(ublob); + + CHECK(ublob.resource_id !=3D 0, cmd); + + res =3D virtio_gpu_find_resource(g, ublob.resource_id); + CHECK(res, cmd); + + for (slot =3D 0; slot < MAX_SLOTS; slot++) { + if (memory_regions[slot].resource_id !=3D ublob.resource_id) { + continue; + } + + MemoryRegion *mr =3D &(memory_regions[slot].mr); + memory_region_del_subregion(&g->parent_obj.hostmem, mr); + + memory_regions[slot].resource_id =3D 0; + memory_regions[slot].used =3D 0; + break; + } + + CHECK((slot < MAX_SLOTS), cmd); + result =3D rutabaga_resource_unmap(vr->rutabaga, res->resource_id); + CHECK_RESULT(result, cmd); +} + +static void +virtio_gpu_rutabaga_process_cmd(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct rutabaga_fence fence =3D { 0 }; + int32_t result; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr); + + switch (cmd->cmd_hdr.type) { + case VIRTIO_GPU_CMD_CTX_CREATE: + rutabaga_cmd_context_create(g, cmd); + break; + case VIRTIO_GPU_CMD_CTX_DESTROY: + rutabaga_cmd_context_destroy(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: + rutabaga_cmd_create_resource_2d(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_CREATE_3D: + rutabaga_cmd_create_resource_3d(g, cmd); + break; + case VIRTIO_GPU_CMD_SUBMIT_3D: + rutabaga_cmd_submit_3d(g, cmd); + break; + case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: + rutabaga_cmd_transfer_to_host_2d(g, cmd); + break; + case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D: + rutabaga_cmd_transfer_to_host_3d(g, cmd); + break; + case VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D: + rutabaga_cmd_transfer_from_host_3d(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING: + rutabaga_cmd_attach_backing(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING: + rutabaga_cmd_detach_backing(g, cmd); + break; + case VIRTIO_GPU_CMD_SET_SCANOUT: + rutabaga_cmd_set_scanout(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_FLUSH: + rutabaga_cmd_resource_flush(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_UNREF: + rutabaga_cmd_resource_unref(g, cmd); + break; + case VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE: + rutabaga_cmd_ctx_attach_resource(g, cmd); + break; + case VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE: + rutabaga_cmd_ctx_detach_resource(g, cmd); + break; + case VIRTIO_GPU_CMD_GET_CAPSET_INFO: + rutabaga_cmd_get_capset_info(g, cmd); + break; + case VIRTIO_GPU_CMD_GET_CAPSET: + rutabaga_cmd_get_capset(g, cmd); + break; + case VIRTIO_GPU_CMD_GET_DISPLAY_INFO: + virtio_gpu_get_display_info(g, cmd); + break; + case VIRTIO_GPU_CMD_GET_EDID: + virtio_gpu_get_edid(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB: + rutabaga_cmd_resource_create_blob(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB: + rutabaga_cmd_resource_map_blob(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_UNMAP_BLOB: + rutabaga_cmd_resource_unmap_blob(g, cmd); + break; + default: + cmd->error =3D VIRTIO_GPU_RESP_ERR_UNSPEC; + break; + } + + if (cmd->finished) { + return; + } + if (cmd->error) { + error_report("%s: ctrl 0x%x, error 0x%x", __func__, + cmd->cmd_hdr.type, cmd->error); + virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error); + return; + } + if (!(cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE)) { + virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA); + return; + } + + fence.flags =3D cmd->cmd_hdr.flags; + fence.ctx_id =3D cmd->cmd_hdr.ctx_id; + fence.fence_id =3D cmd->cmd_hdr.fence_id; + fence.ring_idx =3D cmd->cmd_hdr.ring_idx; + + trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type); + + result =3D rutabaga_create_fence(vr->rutabaga, &fence); + CHECK_RESULT(result, cmd); +} + +static void +virtio_gpu_rutabaga_aio_cb(void *opaque) +{ + struct rutabaga_aio_data *data =3D (struct rutabaga_aio_data *)opaque; + VirtIOGPU *g =3D (VirtIOGPU *)data->vr; + struct rutabaga_fence fence_data =3D data->fence; + struct virtio_gpu_ctrl_command *cmd, *tmp; + + uint32_t signaled_ctx_specific =3D fence_data.flags & + RUTABAGA_FLAG_INFO_RING_IDX; + + QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) { + /* + * Due to context specific timelines. + */ + uint32_t target_ctx_specific =3D cmd->cmd_hdr.flags & + RUTABAGA_FLAG_INFO_RING_IDX; + + if (signaled_ctx_specific !=3D target_ctx_specific) { + continue; + } + + if (signaled_ctx_specific && + (cmd->cmd_hdr.ring_idx !=3D fence_data.ring_idx)) { + continue; + } + + if (cmd->cmd_hdr.fence_id > fence_data.fence_id) { + continue; + } + + trace_virtio_gpu_fence_resp(cmd->cmd_hdr.fence_id); + virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA); + QTAILQ_REMOVE(&g->fenceq, cmd, next); + g_free(cmd); + } + + g_free(data); +} + +static void +virtio_gpu_rutabaga_fence_cb(uint64_t user_data, + struct rutabaga_fence fence_data) { + struct rutabaga_aio_data *data; + VirtIOGPU *g =3D (VirtIOGPU *)user_data; + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + /* + * gfxstream and both cross-domain (and even newer versions virglrende= rer: + * see VIRGL_RENDERER_ASYNC_FENCE_CB) like to signal fence completion = on + * threads ("callback threads") that are different from the thread that + * processes the command queue ("main thread"). + * + * crosvm and other virtio-gpu 1.1implementations enable callback thre= ads + * via locking. However, on QEMU a deadlock is observed if + * virtio_gpu_ctrl_response_nodata(..) [used in the fence callback] is= used + * from a thread that is not the main thread. + * + * The reason is QEMU's internal locking is designed to work with QEMU + * threads (see rcu_register_thread()) and not generic C/C++/Rust thre= ads. + * For now, we can workaround this by scheduling the return of the + * fence descriptors on the main thread. + */ + + data =3D g_new0(struct rutabaga_aio_data, 1); + data->vr =3D vr; + data->fence =3D fence_data; + aio_bh_schedule_oneshot_full(vr->ctx, virtio_gpu_rutabaga_aio_cb, + (void *)data, "aio"); +} + +static int virtio_gpu_rutabaga_init(VirtIOGPU *g) +{ + int result; + uint64_t capset_mask; + struct rutabaga_channels channels =3D { 0 }; + struct rutabaga_builder builder =3D { 0 }; + + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + vr->rutabaga =3D NULL; + + if (!vr->capset_names) { + return -EINVAL; + } + + builder.wsi =3D RUTABAGA_WSI_SURFACELESS; + /* + * Currently, if WSI is specified, the only valid strings are "surface= less" + * or "headless". Surfaceless doesn't create a native window surface,= but + * does copy from the render target to the Pixman buffer if a virtio-g= pu + * 2D hypercall is issued. Surfacless is the default. + * + * Headless is like surfaceless, but doesn't copy to the Pixman buffer= . The + * use case is automated testing environments where there is no need t= o view + * results. + * + * In the future, more performant virtio-gpu 2D UI integration may be = added. + */ + if (vr->wsi) { + if (!strcmp(vr->wsi, "surfaceless")) { + vr->headless =3D false; + } else if (strcmp(vr->wsi, "headless")) { + vr->headless =3D true; + } else { + return -EINVAL; + } + } + + result =3D rutabaga_calculate_capset_mask(vr->capset_names, &capset_ma= sk); + if (result) { + return result; + } + + /* + * rutabaga-0.1.1 is only compiled/tested with gfxstream and cross-dom= ain + * support. Future versions may change this to have more context types= if + * there is any interest. + */ + if (capset_mask & (BIT(RUTABAGA_CAPSET_VIRGL) | + BIT(RUTABAGA_CAPSET_VIRGL2) | + BIT(RUTABAGA_CAPSET_VENUS) | + BIT(RUTABAGA_CAPSET_DRM))) { + return -EINVAL; + } + + builder.user_data =3D (uint64_t)(uintptr_t *)(void *)g; + builder.fence_cb =3D virtio_gpu_rutabaga_fence_cb; + builder.capset_mask =3D capset_mask; + + if (vr->wayland_socket_path) { + if ((builder.capset_mask & (1 << RUTABAGA_CAPSET_CROSS_DOMAIN)) = =3D=3D 0) { + return -EINVAL; + } + + channels.channels =3D + (struct rutabaga_channel *)calloc(1, sizeof(struct rutabaga_chan= nel)); + channels.num_channels =3D 1; + channels.channels[0].channel_name =3D vr->wayland_socket_path; + channels.channels[0].channel_type =3D RUTABAGA_CHANNEL_TYPE_WAYLAN= D; + builder.channels =3D &channels; + } + + result =3D rutabaga_init(&builder, &vr->rutabaga); + if (builder.capset_mask & (1 << RUTABAGA_CAPSET_CROSS_DOMAIN)) { + free(channels.channels); + } + + memset(&memory_regions, 0, MAX_SLOTS * sizeof(struct MemoryRegionInfo)= ); + vr->ctx =3D qemu_get_aio_context(); + return result; +} + +static int virtio_gpu_rutabaga_get_num_capsets(VirtIOGPU *g) +{ + int result; + uint32_t num_capsets; + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + + if (!vr->rutabaga_active) { + result =3D virtio_gpu_rutabaga_init(g); + if (result) { + error_report("Failed to init rutabaga"); + return 0; + } + + vr->rutabaga_active =3D true; + } + + result =3D rutabaga_get_num_capsets(vr->rutabaga, &num_capsets); + if (result) { + error_report("Failed to get capsets"); + return 0; + } + vr->num_capsets =3D num_capsets; + return num_capsets; +} + +static void virtio_gpu_rutabaga_handle_ctrl(VirtIODevice *vdev, VirtQueue = *vq) +{ + VirtIOGPU *g =3D VIRTIO_GPU(vdev); + VirtioGpuRutabaga *vr =3D VIRTIO_GPU_RUTABAGA(g); + struct virtio_gpu_ctrl_command *cmd; + + if (!virtio_queue_ready(vq)) { + return; + } + + if (!vr->rutabaga_active) { + int result =3D virtio_gpu_rutabaga_init(g); + if (!result) { + vr->rutabaga_active =3D true; + } + } + + if (!vr->rutabaga_active) { + return; + } + + cmd =3D virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); + while (cmd) { + cmd->vq =3D vq; + cmd->error =3D 0; + cmd->finished =3D false; + QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next); + cmd =3D virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); + } + + virtio_gpu_process_cmdq(g); +} + +static void virtio_gpu_rutabaga_realize(DeviceState *qdev, Error **errp) +{ + int num_capsets; + VirtIOGPUBase *bdev =3D VIRTIO_GPU_BASE(qdev); + VirtIOGPU *gpudev =3D VIRTIO_GPU(qdev); + + num_capsets =3D virtio_gpu_rutabaga_get_num_capsets(gpudev); + if (!num_capsets) { + return; + } + +#if HOST_BIG_ENDIAN + error_setg(errp, "rutabaga is not supported on bigendian platforms"); + return; +#endif + + bdev->conf.flags |=3D (1 << VIRTIO_GPU_FLAG_RUTABAGA_ENABLED); + bdev->conf.flags |=3D (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED); + bdev->conf.flags |=3D (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED); + + bdev->virtio_config.num_capsets =3D num_capsets; + virtio_gpu_device_realize(qdev, errp); +} + +static Property virtio_gpu_rutabaga_properties[] =3D { + DEFINE_PROP_STRING("capset_names", VirtioGpuRutabaga, capset_names), + DEFINE_PROP_STRING("wayland_socket_path", VirtioGpuRutabaga, + wayland_socket_path), + DEFINE_PROP_STRING("wsi", VirtioGpuRutabaga, wsi), + DEFINE_PROP_END_OF_LIST(), +}; + +static void virtio_gpu_rutabaga_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + VirtioDeviceClass *vdc =3D VIRTIO_DEVICE_CLASS(klass); + VirtIOGPUBaseClass *vbc =3D VIRTIO_GPU_BASE_CLASS(klass); + VirtIOGPUClass *vgc =3D VIRTIO_GPU_CLASS(klass); + + vbc->gl_flushed =3D virtio_gpu_rutabaga_gl_flushed; + vgc->handle_ctrl =3D virtio_gpu_rutabaga_handle_ctrl; + vgc->process_cmd =3D virtio_gpu_rutabaga_process_cmd; + vgc->update_cursor_data =3D virtio_gpu_rutabaga_update_cursor; + + vdc->realize =3D virtio_gpu_rutabaga_realize; + device_class_set_props(dc, virtio_gpu_rutabaga_properties); +} + +static const TypeInfo virtio_gpu_rutabaga_info =3D { + .name =3D TYPE_VIRTIO_GPU_RUTABAGA, + .parent =3D TYPE_VIRTIO_GPU, + .instance_size =3D sizeof(VirtioGpuRutabaga), + .class_init =3D virtio_gpu_rutabaga_class_init, +}; +module_obj(TYPE_VIRTIO_GPU_RUTABAGA); +module_kconfig(VIRTIO_GPU); + +static void virtio_register_types(void) +{ + type_register_static(&virtio_gpu_rutabaga_info); +} + +type_init(virtio_register_types) + +module_dep("hw-display-virtio-gpu"); diff --git a/hw/display/virtio-vga-rutabaga.c b/hw/display/virtio-vga-rutab= aga.c new file mode 100644 index 0000000000..01831bd03f --- /dev/null +++ b/hw/display/virtio-vga-rutabaga.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include "qemu/osdep.h" +#include "hw/pci/pci.h" +#include "hw/qdev-properties.h" +#include "hw/virtio/virtio-gpu.h" +#include "hw/display/vga.h" +#include "qapi/error.h" +#include "qemu/module.h" +#include "virtio-vga.h" +#include "qom/object.h" + +#define TYPE_VIRTIO_VGA_RUTABAGA "virtio-vga-rutabaga" + +typedef struct VirtIOVGARUTABAGA VirtIOVGARUTABAGA; +DECLARE_INSTANCE_CHECKER(VirtIOVGARUTABAGA, VIRTIO_VGA_RUTABAGA, + TYPE_VIRTIO_VGA_RUTABAGA) + +struct VirtIOVGARUTABAGA { + VirtIOVGABase parent_obj; + + VirtioGpuRutabaga vdev; +}; + +static void virtio_vga_rutabaga_inst_initfn(Object *obj) +{ + VirtIOVGARUTABAGA *dev =3D VIRTIO_VGA_RUTABAGA(obj); + + virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), + TYPE_VIRTIO_GPU_RUTABAGA); + VIRTIO_VGA_BASE(dev)->vgpu =3D VIRTIO_GPU_BASE(&dev->vdev); +} + +static VirtioPCIDeviceTypeInfo virtio_vga_rutabaga_info =3D { + .generic_name =3D TYPE_VIRTIO_VGA_RUTABAGA, + .parent =3D TYPE_VIRTIO_VGA_BASE, + .instance_size =3D sizeof(VirtIOVGARUTABAGA), + .instance_init =3D virtio_vga_rutabaga_inst_initfn, +}; +module_obj(TYPE_VIRTIO_VGA_RUTABAGA); +module_kconfig(VIRTIO_VGA); + +static void virtio_vga_register_types(void) +{ + if (have_vga) { + virtio_pci_types_register(&virtio_vga_rutabaga_info); + } +} + +type_init(virtio_vga_register_types) + +module_dep("hw-display-virtio-vga"); --=20 2.41.0.255.g8b1d071c50-goog From nobody Sun May 19 15:58:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=chromium.org ARC-Seal: i=1; a=rsa-sha256; t=1689044290; cv=none; d=zohomail.com; s=zohoarc; b=YfSc2tx3bs4uw7xu0LdLzQtDwq98FkH8LK6bBH31SwCU79nkq8z+88PNbJg1f8lYVhBb0sObrdNjSIeVxubbhKPQBuBmRk3n4uGHfaVmG6mqrq8sVZS8Q+cMQM/EBB46FHiyI7TIk5a1AFJDaUzj9Vv0mLKt0w1xAPvsNSWT0lI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1689044290; 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<20230711025649.708-1-gurchetansingh@chromium.org> References: <20230711025649.708-1-gurchetansingh@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::231; envelope-from=gurchetansingh@chromium.org; helo=mail-oi1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044291963100003 Content-Type: text/plain; charset="utf-8" - Add meson detection of rutabaga_gfx - Build virtio-gpu-rutabaga.c + associated vga/pci files when present Signed-off-by: Gurchetan Singh --- hw/display/meson.build | 22 ++++++++++++++++++++++ meson.build | 7 +++++++ meson_options.txt | 2 ++ scripts/meson-buildoptions.sh | 3 +++ 4 files changed, 34 insertions(+) diff --git a/hw/display/meson.build b/hw/display/meson.build index 413ba4ab24..10e41e4eef 100644 --- a/hw/display/meson.build +++ b/hw/display/meson.build @@ -79,6 +79,13 @@ if config_all_devices.has_key('CONFIG_VIRTIO_GPU') if_true: [files('virtio-gpu-gl.c', 'virtio-gpu-vi= rgl.c'), pixman, virgl]) hw_display_modules +=3D {'virtio-gpu-gl': virtio_gpu_gl_ss} endif + + if rutabaga.found() + virtio_gpu_rutabaga_ss =3D ss.source_set() + virtio_gpu_rutabaga_ss.add(when: ['CONFIG_VIRTIO_GPU', rutabaga], + if_true: [files('virtio-gpu-rutabaga.c'), pixman]) + hw_display_modules +=3D {'virtio-gpu-rutabaga': virtio_gpu_rutabaga_ss} + endif endif =20 if config_all_devices.has_key('CONFIG_VIRTIO_PCI') @@ -95,6 +102,12 @@ if config_all_devices.has_key('CONFIG_VIRTIO_PCI') if_true: [files('virtio-gpu-pci-gl.c'), pixma= n]) hw_display_modules +=3D {'virtio-gpu-pci-gl': virtio_gpu_pci_gl_ss} endif + if rutabaga.found() + virtio_gpu_pci_rutabaga_ss =3D ss.source_set() + virtio_gpu_pci_rutabaga_ss.add(when: ['CONFIG_VIRTIO_GPU', 'CONFIG_VIR= TIO_PCI', rutabaga], + if_true: [files('virtio-gpu-pci-rutabaga.c'), pixma= n]) + hw_display_modules +=3D {'virtio-gpu-pci-rutabaga': virtio_gpu_pci_rut= abaga_ss} + endif endif =20 if config_all_devices.has_key('CONFIG_VIRTIO_VGA') @@ -113,6 +126,15 @@ if config_all_devices.has_key('CONFIG_VIRTIO_VGA') virtio_vga_gl_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'), if_false: files('acpi-vga-stub= .c')) hw_display_modules +=3D {'virtio-vga-gl': virtio_vga_gl_ss} + + if rutabaga.found() + virtio_vga_rutabaga_ss =3D ss.source_set() + virtio_vga_rutabaga_ss.add(when: ['CONFIG_VIRTIO_VGA', rutabaga], + if_true: [files('virtio-vga-rutabaga.c'), pixman]) + virtio_vga_rutabaga_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-v= ga.c'), + if_false: files('acpi-v= ga-stub.c')) + hw_display_modules +=3D {'virtio-vga-rutabaga': virtio_vga_rutabaga_ss} + endif endif =20 system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_lcdc.c')) diff --git a/meson.build b/meson.build index 5fcdb37a71..c7b4811220 100644 --- a/meson.build +++ b/meson.build @@ -1069,6 +1069,12 @@ if not get_option('virglrenderer').auto() or have_sy= stem or have_vhost_user_gpu dependencies: virgl)) endif endif +rutabaga =3D not_found +if not get_option('rutabaga_gfx').auto() or have_system or have_vhost_user= _gpu + rutabaga =3D dependency('rutabaga_gfx_ffi', + method: 'pkg-config', + required: get_option('rutabaga_gfx')) +endif blkio =3D not_found if not get_option('blkio').auto() or have_block blkio =3D dependency('blkio', @@ -4272,6 +4278,7 @@ summary_info +=3D {'libtasn1': tasn1} summary_info +=3D {'PAM': pam} summary_info +=3D {'iconv support': iconv} summary_info +=3D {'virgl support': virgl} +summary_info +=3D {'rutabaga support': rutabaga} summary_info +=3D {'blkio support': blkio} summary_info +=3D {'curl support': curl} summary_info +=3D {'Multipath support': mpathpersist} diff --git a/meson_options.txt b/meson_options.txt index bbb5c7e886..d7998655a8 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -224,6 +224,8 @@ option('vmnet', type : 'feature', value : 'auto', description: 'vmnet.framework network backend support') option('virglrenderer', type : 'feature', value : 'auto', description: 'virgl rendering support') +option('rutabaga_gfx', type : 'feature', value : 'auto', + description: 'rutabaga_gfx support') option('png', type : 'feature', value : 'auto', description: 'PNG support with libpng') option('vnc', type : 'feature', value : 'auto', diff --git a/scripts/meson-buildoptions.sh b/scripts/meson-buildoptions.sh index 7dd5709ef4..92af437271 100644 --- a/scripts/meson-buildoptions.sh +++ b/scripts/meson-buildoptions.sh @@ -154,6 +154,7 @@ meson_options_help() { printf "%s\n" ' rbd Ceph block device driver' printf "%s\n" ' rdma Enable RDMA-based migration' printf "%s\n" ' replication replication support' + printf "%s\n" ' rutabaga-gfx rutabaga_gfx support' printf "%s\n" ' sdl SDL user interface' printf "%s\n" ' sdl-image SDL Image support for icons' printf "%s\n" ' seccomp seccomp support' @@ -419,6 +420,8 @@ _meson_option_parse() { --disable-replication) printf "%s" -Dreplication=3Ddisabled ;; --enable-rng-none) printf "%s" -Drng_none=3Dtrue ;; --disable-rng-none) printf "%s" -Drng_none=3Dfalse ;; + --enable-rutabaga-gfx) printf "%s" -Drutabaga_gfx=3Denabled ;; + --disable-rutabaga-gfx) printf "%s" -Drutabaga_gfx=3Ddisabled ;; --enable-safe-stack) printf "%s" -Dsafe_stack=3Dtrue ;; --disable-safe-stack) printf "%s" -Dsafe_stack=3Dfalse ;; --enable-sanitizers) printf "%s" -Dsanitizers=3Dtrue ;; --=20 2.41.0.255.g8b1d071c50-goog From nobody Sun May 19 15:58:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=chromium.org ARC-Seal: i=1; a=rsa-sha256; t=1689044280; cv=none; d=zohomail.com; s=zohoarc; b=bwPQtm9hFhgu1HA72dda6g9rYFvdkEBczpn3SKUrDx+0DMqV9SU2C8M+wJQJbVKN3WBq0VWh2bYsLLBt4aHfr0hTr1F/l6OL8j1amPxwbUPrmFi+5a/qWswABqp1j7fkIFL00ucQuado62L7ZcZhnuBdUFinSuVeOqhopTxqeAw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1689044280; 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oTMbNTgITld508EIFhVR7hiFspAWaW42MDq0qhYeJDiWU5c9ibzEeXLWAr9frL04I/gU 0Ncz7UJT/xD0CcoQ2t+d1+JYT/fwk7KmX2g/wzU/rRNJteBt9PGIKVWeVoq3wmGekGuA 2Q5Q== X-Gm-Message-State: ABy/qLZUgbs8ONGmxDQMMuDrTAJh2mo2fvInpiBCCZ+YmIcEyuJl+EME Bq8ITY35sbuS4S+532VWJHkpCMYihug82olSMgA= X-Google-Smtp-Source: APBJJlH6wxXYqjdz8ZVpO+V3EudH7hzP/x8bMJRfXNGMIpTvuDaOcK4Trgdm+stNzoqNHgpodQXP3Q== X-Received: by 2002:a05:6a00:1948:b0:67a:553d:3bc3 with SMTP id s8-20020a056a00194800b0067a553d3bc3mr15746512pfk.6.1689044225566; Mon, 10 Jul 2023 19:57:05 -0700 (PDT) From: Gurchetan Singh To: qemu-devel@nongnu.org Cc: --cc=kraxel@redhat.com, marcandre.lureau@redhat.com, akihiko.odaki@gmail.com, dmitry.osipenko@collabora.com, ray.huang@amd.com, alex.bennee@linaro.org, shentey@gmail.com Subject: [PATCH v1 8/9] gfxstream + rutabaga: enable rutabaga Date: Mon, 10 Jul 2023 19:56:48 -0700 Message-Id: <20230711025649.708-9-gurchetansingh@chromium.org> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20230711025649.708-1-gurchetansingh@chromium.org> References: <20230711025649.708-1-gurchetansingh@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=gurchetansingh@chromium.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044282204100015 Content-Type: text/plain; charset="utf-8" This change enables rutabaga to receive virtio-gpu-3d hypercalls when it is active. Signed-off-by: Gurchetan Singh --- hw/display/virtio-gpu-base.c | 3 ++- hw/display/virtio-gpu.c | 5 +++-- softmmu/qdev-monitor.c | 3 +++ softmmu/vl.c | 1 + 4 files changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index 6c5f1f327f..7913d9b82e 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -206,7 +206,8 @@ virtio_gpu_base_get_features(VirtIODevice *vdev, uint64= _t features, { VirtIOGPUBase *g =3D VIRTIO_GPU_BASE(vdev); =20 - if (virtio_gpu_virgl_enabled(g->conf)) { + if (virtio_gpu_virgl_enabled(g->conf) || + virtio_gpu_rutabaga_enabled(g->conf)) { features |=3D (1 << VIRTIO_GPU_F_VIRGL); } if (virtio_gpu_edid_enabled(g->conf)) { diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 32da46fefc..068f4aeb7e 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1374,8 +1374,9 @@ void virtio_gpu_device_realize(DeviceState *qdev, Err= or **errp) VirtIOGPU *g =3D VIRTIO_GPU(qdev); =20 if (virtio_gpu_blob_enabled(g->parent_obj.conf)) { - if (!virtio_gpu_have_udmabuf()) { - error_setg(errp, "cannot enable blob resources without udmabuf= "); + if (!virtio_gpu_have_udmabuf() && + !virtio_gpu_rutabaga_enabled(g->parent_obj.conf)) { + error_setg(errp, "need udmabuf or rutabaga for blob resources"= ); return; } =20 diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c index 74f4e41338..246f0b051d 100644 --- a/softmmu/qdev-monitor.c +++ b/softmmu/qdev-monitor.c @@ -86,6 +86,9 @@ static const QDevAlias qdev_alias_table[] =3D { { "virtio-gpu-pci", "virtio-gpu", QEMU_ARCH_VIRTIO_PCI }, { "virtio-gpu-gl-device", "virtio-gpu-gl", QEMU_ARCH_VIRTIO_MMIO }, { "virtio-gpu-gl-pci", "virtio-gpu-gl", QEMU_ARCH_VIRTIO_PCI }, + { "virtio-gpu-rutabaga-device", "virtio-gpu-rutabaga", + QEMU_ARCH_VIRTIO_MMIO }, + { "virtio-gpu-rutabaga-pci", "virtio-gpu-rutabaga", QEMU_ARCH_VIRTIO_P= CI }, { "virtio-input-host-device", "virtio-input-host", QEMU_ARCH_VIRTIO_MM= IO }, { "virtio-input-host-ccw", "virtio-input-host", QEMU_ARCH_VIRTIO_CCW }, { "virtio-input-host-pci", "virtio-input-host", QEMU_ARCH_VIRTIO_PCI }, diff --git a/softmmu/vl.c b/softmmu/vl.c index b0b96f67fa..2f98eefdf3 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -216,6 +216,7 @@ static struct { { .driver =3D "ati-vga", .flag =3D &default_vga }, { .driver =3D "vhost-user-vga", .flag =3D &default_vga }, { .driver =3D "virtio-vga-gl", .flag =3D &default_vga }, + { .driver =3D "virtio-vga-rutabaga", .flag =3D &default_vga }, }; =20 static QemuOptsList qemu_rtc_opts =3D { --=20 2.41.0.255.g8b1d071c50-goog From nobody Sun May 19 15:58:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=chromium.org ARC-Seal: i=1; a=rsa-sha256; t=1689044315; cv=none; d=zohomail.com; s=zohoarc; b=Yb8jpzFESrhKfUKbi2dW11Xm/HnjMStqPQr0ufJek61BwyIgp29r0iutpAfAQ3kwD64nletZzdnrnWZms1YXclp1vWSs6m9Q/4Kq8uellzSTY1XMGoq88kSBE5pf6ttyzuEbyL5ENzM4x8BKhBdvj9Ma+RfYX4yePAPZ2pcp368= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1689044315; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=JjLMhETVE4SGvOiHi76JURucMgHFf5TrgNuBMjUglz8=; b=JicyxJ3jy66nREwLryp9eM4qmNAQC3kNCJcXBOSPvsqO6HTLeOHThRLelNJtMc2PqSsA1NrYlMmfGSDFV0GnA6++DziukYY3pjEaHgWj0/qIIzImasaxjt/AnlplicIzYemuHoUoo+a79YSCMtzji7dCdnrNqn+SCQa9/8tDKVE= ARC-Authentication-Results: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::22b; envelope-from=gurchetansingh@chromium.org; helo=mail-oi1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @chromium.org) X-ZM-MESSAGEID: 1689044317527100005 Content-Type: text/plain; charset="utf-8" This adds basic documentation for virtio-gpu. Suggested-by: Akihiko Odaki Signed-off-by: Gurchetan Singh --- docs/system/device-emulation.rst | 1 + docs/system/devices/virtio-gpu.rst | 80 ++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+) create mode 100644 docs/system/devices/virtio-gpu.rst diff --git a/docs/system/device-emulation.rst b/docs/system/device-emulatio= n.rst index 4491c4cbf7..1167f3a9f2 100644 --- a/docs/system/device-emulation.rst +++ b/docs/system/device-emulation.rst @@ -91,6 +91,7 @@ Emulated Devices devices/nvme.rst devices/usb.rst devices/vhost-user.rst + devices/virtio-gpu.rst devices/virtio-pmem.rst devices/vhost-user-rng.rst devices/canokey.rst diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virti= o-gpu.rst new file mode 100644 index 0000000000..2426039540 --- /dev/null +++ b/docs/system/devices/virtio-gpu.rst @@ -0,0 +1,80 @@ +.. + SPDX-License-Identifier: GPL-2.0 + +virtio-gpu +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +This document explains the setup and usage of the virtio-gpu device. +The virtio-gpu device paravirtualizes the GPU and display controller. + +Linux kernel support +-------------------- + +virtio-gpu requires a guest Linux kernel built with the +``CONFIG_DRM_VIRTIO_GPU`` option. + +QEMU virtio-gpu variants +------------------------ + +There are many virtio-gpu device variants, listed below: + + * ``virtio-vga`` + * ``virtio-gpu-pci`` + * ``virtio-vga-gl`` + * ``virtio-gpu-gl-pci`` + * ``virtio-vga-rutabaga`` + * ``virtio-gpu-rutabaga-pci`` + * ``vhost-user-vga`` + * ``vhost-user-gl-pci`` + +QEMU provides a 2D virtio-gpu backend, and two accelerated backends: +virglrenderer ('gl' device label) and rutabaga_gfx ('rutabaga' device +label). There is also a vhost-user backend that runs the 2D device +in a separate process. Each device type as VGA or PCI variant. This +document uses the PCI variant in examples. + +virtio-gpu 2d +------------- + +The default 2D mode uses a guest software renderer (llvmpipe, lavapipe, +Swiftshader) to provide the OpenGL/Vulkan implementations. + +.. parsed-literal:: + -device virtio-gpu-pci + +virtio-gpu virglrenderer +------------------------ + +When using virgl accelerated graphics mode, OpenGL API calls are translated +into an intermediate representation (see `Gallium3D`_). The intermediate +representation is communicated to the host and the `virglrenderer`_ library +on the host translates the intermediate representation back to OpenGL API +calls. + +.. parsed-literal:: + -device virtio-gpu-gl-pci + +.. _Gallium3D: https://www.freedesktop.org/wiki/Software/gallium/ +.. _virglrenderer: https://gitlab.freedesktop.org/virgl/virglrenderer/ + +virtio-gpu rutabaga +------------------- + +virtio-gpu can also leverage `rutabaga_gfx`_ to provide `gfxstream`_ rende= ring +and `Wayland display passthrough`_. With the gfxstream rendering mode, GL= ES +and Vulkan calls are forwarded directly to the host with minimal modificat= ion. + +Please refer the `crosvm book`_ on how to setup the guest for Wayland +passthrough (QEMU uses the same implementation). + +This device does require host blob support (``hostmem`` field below), but = not +all capsets (``capset_names`` below) have to enabled when starting the dev= ice. + +.. parsed-literal:: + -device virtio-gpu-rutabaga-pci,capset_names=3Dgfxstream-vulkan:cross-= domain,\\ + hostmem=3D8G,wayland_socket_path=3D"$XDG_RUNTIME_DIR/$WAYLAND_DISPLA= Y" + +.. _rutabaga_gfx: https://github.com/google/crosvm/blob/main/rutabaga_gfx/= ffi/src/include/rutabaga_gfx_ffi.h +.. _gfxstream: https://android.googlesource.com/platform/hardware/google/g= fxstream/ +.. _Wayland display passthrough: https://www.youtube.com/watch?v=3DOZJiHMt= IQ2M +.. _crosvm book: https://crosvm.dev/book/devices/wayland.html --=20 2.41.0.255.g8b1d071c50-goog