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Tsirkin" , Marcel Apfelbaum Cc: Ani Sinha , jusual@redhat.com, imammedo@redhat.com, qemu-devel@nongnu.org Subject: [PATCH v2] hw/pci: prevent hotplug of devices on pcie-root-ports on the wrong slot Date: Thu, 15 Jun 2023 10:46:45 +0530 Message-Id: <20230615051645.4798-1-anisinha@redhat.com> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=anisinha@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1686806240672100001 Content-Type: text/plain; charset="utf-8" PCIE root ports and other upstream ports only allow one device on slot 0. When hotplugging a device on a pcie root port, make sure that the device address passed always represents slot 0. Any other slot value would be illegal on a root port. CC: jusual@redhat.com CC: imammedo@redhat.com Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=3D2128929 Signed-off-by: Ani Sinha --- hw/pci/pci.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) changelog: v2: feedback from mst included. diff --git a/hw/pci/pci.c b/hw/pci/pci.c index bf38905b7d..66999352cc 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -64,6 +64,7 @@ bool pci_available =3D true; static char *pcibus_get_dev_path(DeviceState *dev); static char *pcibus_get_fw_dev_path(DeviceState *dev); static void pcibus_reset(BusState *qbus); +static bool pcie_has_upstream_port(PCIDevice *dev); =20 static Property pci_props[] =3D { DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), @@ -1182,6 +1183,11 @@ static PCIDevice *do_pci_register_device(PCIDevice *= pci_dev, } else if (dev->hotplugged && !pci_is_vf(pci_dev) && pci_get_function_0(pci_dev)) { + /* + * populating function 0 triggers a bus scan from the guest that + * exposes other non-zero functions. Hence we need to ensure that + * function 0 is available. + */ error_setg(errp, "PCI: slot %d function 0 already occupied by %s," " new func %s cannot be exposed to guest.", PCI_SLOT(pci_get_function_0(pci_dev)->devfn), @@ -1189,6 +1195,16 @@ static PCIDevice *do_pci_register_device(PCIDevice *= pci_dev, name); =20 return NULL; + } else if (dev->hotplugged && + !pci_is_vf(pci_dev) && + pcie_has_upstream_port(pci_dev) && PCI_SLOT(devfn)) { + /* + * If the device is being plugged into an upstream PCIE port, + * like a pcie root port, we only support one device at slot 0 + */ + error_setg(errp, "PCI: slot %d is not valid for %s", + PCI_SLOT(devfn), name); + return NULL; } =20 pci_dev->devfn =3D devfn; --=20 2.39.1