target/riscv/cpu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
We initialize cur_pmmask as -1(UINT32_MAX/UINT64_MAX) and regard it
as if pointer mask is disabled in current implementation. However,
the addresses for vector load/store will be adjusted to zero in this
case and -1(UINT32_MAX/UINT64_MAX) is valid value for pmmask when
pointer mask is enabled.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
---
target/riscv/cpu_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 09ea227ceb..acbcb7ed76 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -133,7 +133,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
flags = FIELD_DP32(flags, TB_FLAGS, FS, fs);
flags = FIELD_DP32(flags, TB_FLAGS, VS, vs);
flags = FIELD_DP32(flags, TB_FLAGS, XL, env->xl);
- if (env->cur_pmmask < (env->xl == MXL_RV32 ? UINT32_MAX : UINT64_MAX)) {
+ if (env->cur_pmmask != 0) {
flags = FIELD_DP32(flags, TB_FLAGS, PM_MASK_ENABLED, 1);
}
if (env->cur_pmbase != 0) {
@@ -145,7 +145,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
void riscv_cpu_update_mask(CPURISCVState *env)
{
- target_ulong mask = -1, base = 0;
+ target_ulong mask = 0, base = 0;
/*
* TODO: Current RVJ spec does not specify
* how the extension interacts with XLEN.
--
2.25.1
On Sat, Jun 10, 2023 at 7:48 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote: > > We initialize cur_pmmask as -1(UINT32_MAX/UINT64_MAX) and regard it > as if pointer mask is disabled in current implementation. However, > the addresses for vector load/store will be adjusted to zero in this > case and -1(UINT32_MAX/UINT64_MAX) is valid value for pmmask when > pointer mask is enabled. > > Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> > Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Thanks! Applied to riscv-to-apply.next Alistair > --- > target/riscv/cpu_helper.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c > index 09ea227ceb..acbcb7ed76 100644 > --- a/target/riscv/cpu_helper.c > +++ b/target/riscv/cpu_helper.c > @@ -133,7 +133,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, > flags = FIELD_DP32(flags, TB_FLAGS, FS, fs); > flags = FIELD_DP32(flags, TB_FLAGS, VS, vs); > flags = FIELD_DP32(flags, TB_FLAGS, XL, env->xl); > - if (env->cur_pmmask < (env->xl == MXL_RV32 ? UINT32_MAX : UINT64_MAX)) { > + if (env->cur_pmmask != 0) { > flags = FIELD_DP32(flags, TB_FLAGS, PM_MASK_ENABLED, 1); > } > if (env->cur_pmbase != 0) { > @@ -145,7 +145,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, > > void riscv_cpu_update_mask(CPURISCVState *env) > { > - target_ulong mask = -1, base = 0; > + target_ulong mask = 0, base = 0; > /* > * TODO: Current RVJ spec does not specify > * how the extension interacts with XLEN. > -- > 2.25.1 > >
On 2023/6/10 17:46, Weiwei Li wrote: > We initialize cur_pmmask as -1(UINT32_MAX/UINT64_MAX) and regard it > as if pointer mask is disabled in current implementation. However, > the addresses for vector load/store will be adjusted to zero in this > case and -1(UINT32_MAX/UINT64_MAX) is valid value for pmmask when > pointer mask is enabled. > > Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> > Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> > --- > target/riscv/cpu_helper.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c > index 09ea227ceb..acbcb7ed76 100644 > --- a/target/riscv/cpu_helper.c > +++ b/target/riscv/cpu_helper.c > @@ -133,7 +133,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, > flags = FIELD_DP32(flags, TB_FLAGS, FS, fs); > flags = FIELD_DP32(flags, TB_FLAGS, VS, vs); > flags = FIELD_DP32(flags, TB_FLAGS, XL, env->xl); > - if (env->cur_pmmask < (env->xl == MXL_RV32 ? UINT32_MAX : UINT64_MAX)) { > + if (env->cur_pmmask != 0) { > flags = FIELD_DP32(flags, TB_FLAGS, PM_MASK_ENABLED, 1); > } > if (env->cur_pmbase != 0) { > @@ -145,7 +145,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, > > void riscv_cpu_update_mask(CPURISCVState *env) > { > - target_ulong mask = -1, base = 0; > + target_ulong mask = 0, base = 0; Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Zhiwei > /* > * TODO: Current RVJ spec does not specify > * how the extension interacts with XLEN.
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