Hopefully these are getting close to ready now. There is still the
question about doing better with adding test cases for all this, I
haven't exactly got a good answer yet but I do have kvm-unit-tests
for most at least.

Thanks,
Nick

Nicholas Piggin (9):
  target/ppc: Fix width of some 32-bit SPRs
  target/ppc: Fix PMU MMCR0[PMCjCE] bit in hflags calculation
  target/ppc: Fix instruction loading endianness in alignment interrupt
  target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward
  target/ppc: Change partition-scope translate interface
  target/ppc: Add SRR1 prefix indication to interrupt handlers
  target/ppc: Implement HEIR SPR
  target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call
    interrupts
  target/ppc: Better CTRL SPR implementation

 target/ppc/cpu.h         |  1 +
 target/ppc/cpu_init.c    | 41 +++++++++++++----
 target/ppc/excp_helper.c | 98 ++++++++++++++++++++++++++++++++++++----
 target/ppc/helper_regs.c |  2 +-
 target/ppc/misc_helper.c |  4 +-
 target/ppc/mmu-radix64.c | 38 +++++++++++-----
 target/ppc/power8-pmu.c  |  6 ++-
 target/ppc/translate.c   |  9 +++-
 8 files changed, 164 insertions(+), 35 deletions(-)

-- 
2.40.1

On 5/15/23 06:26, Nicholas Piggin wrote:
> Hopefully these are getting close to ready now. There is still the
> question about doing better with adding test cases for all this, I
> haven't exactly got a good answer yet but I do have kvm-unit-tests
> for most at least.

Patches 1 and 4 queued to ppc-next. Thanks,


Daniel

> 
> Thanks,
> Nick
> 
> Nicholas Piggin (9):
>    target/ppc: Fix width of some 32-bit SPRs
>    target/ppc: Fix PMU MMCR0[PMCjCE] bit in hflags calculation
>    target/ppc: Fix instruction loading endianness in alignment interrupt
>    target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward
>    target/ppc: Change partition-scope translate interface
>    target/ppc: Add SRR1 prefix indication to interrupt handlers
>    target/ppc: Implement HEIR SPR
>    target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call
>      interrupts
>    target/ppc: Better CTRL SPR implementation
> 
>   target/ppc/cpu.h         |  1 +
>   target/ppc/cpu_init.c    | 41 +++++++++++++----
>   target/ppc/excp_helper.c | 98 ++++++++++++++++++++++++++++++++++++----
>   target/ppc/helper_regs.c |  2 +-
>   target/ppc/misc_helper.c |  4 +-
>   target/ppc/mmu-radix64.c | 38 +++++++++++-----
>   target/ppc/power8-pmu.c  |  6 ++-
>   target/ppc/translate.c   |  9 +++-
>   8 files changed, 164 insertions(+), 35 deletions(-)
>

On Sun May 28, 2023 at 4:05 AM AEST, Daniel Henrique Barboza wrote:
>
>
> On 5/15/23 06:26, Nicholas Piggin wrote:
> > Hopefully these are getting close to ready now. There is still the
> > question about doing better with adding test cases for all this, I
> > haven't exactly got a good answer yet but I do have kvm-unit-tests
> > for most at least.
>
> Patches 1 and 4 queued to ppc-next. Thanks,

Thanks Daniel, been taking a bit of time fixing up your your and
other comments for the other patches sorry. Much appreciate the help
so far.

Thanks,
Nick