[PATCH 00/20] target/arm: Start conversion of A64 decoder to decodetree

Peter Maydell posted 20 patches 11 months, 3 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230512144106.3608981-1-peter.maydell@linaro.org
Maintainers: Peter Maydell <peter.maydell@linaro.org>
target/arm/tcg/translate.h     |    5 +
target/arm/tcg/a64.decode      |  156 ++++
target/arm/tcg/translate-a64.c | 1318 ++++++++++++++------------------
target/arm/tcg/meson.build     |    1 +
4 files changed, 729 insertions(+), 751 deletions(-)
create mode 100644 target/arm/tcg/a64.decode
[PATCH 00/20] target/arm: Start conversion of A64 decoder to decodetree
Posted by Peter Maydell 11 months, 3 weeks ago
The A64 decoder is still an old-school hand-written one.
It's not too badly structured as these things go, but it's
still been noticeably harder to both add new instructions to
and to review patches for than a decodetree decoder. (This
is particularly clear when you have to review a patch that
adds an insn both to A32 and A64 -- one half of the patch
is a lot easier to understand than the other.)

I was looking at FEAT_MOPS, which is in the A64 load/store
area of the instruction set, and I really didn't fancy trying
to fit it into the old decoder. The instruction set is not
standing still, so we're going to have to keep adding
instructions for the foreseeable future. We should make
our lives easier by biting the bullet and converting this
to decodetree.

Past experience is that a decodetree conversion works out
to a lot of patches, so this series is just the first part,
which converts data-processing-immediate and branch insns.
Most of the first half is some older work from Richard Henderson,
which I rebased and tweaked a little. I definitely want to
convert the whole of the integer decode, but I might leave
the FP/SIMD insns for later.

thanks
-- PMM

Peter Maydell (11):
  target/arm: Create decodetree skeleton for A64
  target/arm: Pull calls to disas_sve() and disas_sme() out of legacy
    decoder
  target/arm: Convert Extract instructions to decodetree
  target/arm: Convert unconditional branch immediate to decodetree
  target/arm: Convert CBZ, CBNZ to decodetree
  target/arm: Convert TBZ, TBNZ to decodetree
  target/arm: Convert conditional branch insns to decodetree
  target/arm: Convert BR, BLR, RET to decodetree
  target/arm: Convert BRA[AB]Z, BLR[AB]Z, RETA[AB] to decodetree
  target/arm: Convert BRAA, BRAB, BLRAA, BLRAB to decodetree
  target/arm: Convert ERET, ERETAA, ERETAB to decodetree

Richard Henderson (9):
  target/arm: Split out disas_a64_legacy
  target/arm: Convert PC-rel addressing to decodetree
  target/arm: Split gen_add_CC and gen_sub_CC
  target/arm: Convert Add/subtract (immediate) to decodetree
  target/arm: Convert Add/subtract (immediate with tags) to decodetree
  target/arm: Replace bitmask64 with MAKE_64BIT_MASK
  target/arm: Convert Logical (immediate) to decodetree
  target/arm: Convert Move wide (immediate) to decodetree
  target/arm: Convert Bitfield to decodetree

 target/arm/tcg/translate.h     |    5 +
 target/arm/tcg/a64.decode      |  156 ++++
 target/arm/tcg/translate-a64.c | 1318 ++++++++++++++------------------
 target/arm/tcg/meson.build     |    1 +
 4 files changed, 729 insertions(+), 751 deletions(-)
 create mode 100644 target/arm/tcg/a64.decode

-- 
2.34.1