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d="scan'208";a="703097825" From: Yin Wang To: qemu-devel@nongnu.org Cc: Yin Wang , LIU Zhiwei , Weiwei Li , Palmer Dabbelt , Alistair Francis , Bin Meng , Daniel Henrique Barboza , qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs) Subject: [PATCH v3] hw/riscv: qemu crash when NUMA nodes exceed available CPUs Date: Fri, 12 May 2023 15:56:51 +0800 Message-Id: <20230512075652.1270585-1-yin.wang@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.65; envelope-from=yin.wang@intel.com; helo=mga03.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1683878275741100001 Content-Type: text/plain; charset="utf-8" Command "qemu-system-riscv64 -machine virt -m 2G -smp 1 -numa node,mem=3D1G -numa node,mem=3D1G" would trigger this problem.Backtrace with: #0 0x0000555555b5b1a4 in riscv_numa_get_default_cpu_node_id at ../hw/ris= cv/numa.c:211 #1 0x00005555558ce510 in machine_numa_finish_cpu_init at ../hw/core/mach= ine.c:1230 #2 0x00005555558ce9d3 in machine_run_board_init at ../hw/core/machine.c:= 1346 #3 0x0000555555aaedc3 in qemu_init_board at ../softmmu/vl.c:2513 #4 0x0000555555aaf064 in qmp_x_exit_preconfig at ../softmmu/vl.c:2609 #5 0x0000555555ab1916 in qemu_init at ../softmmu/vl.c:3617 #6 0x000055555585463b in main at ../softmmu/main.c:47 This commit fixes the issue by adding parameter checks. Signed-off-by: Yin Wang Reviewed-by: LIU Zhiwei Reviewed-by: Weiwei Li --- hw/riscv/numa.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/riscv/numa.c b/hw/riscv/numa.c index 4720102561..a1bb312cd0 100644 --- a/hw/riscv/numa.c +++ b/hw/riscv/numa.c @@ -207,6 +207,12 @@ int64_t riscv_numa_get_default_cpu_node_id(const Machi= neState *ms, int idx) { int64_t nidx =3D 0; =20 + if (ms->numa_state->num_nodes > ms->smp.cpus) { + error_report("Number of CPUs used by NUMA nodes (%d)" + " cannot exceed the number of available CPUs (%d).", + ms->numa_state->num_nodes, ms->smp.max_cpus); + exit(EXIT_FAILURE); + } if (ms->numa_state->num_nodes) { nidx =3D idx / (ms->smp.cpus / ms->numa_state->num_nodes); if (ms->numa_state->num_nodes <=3D nidx) { --=20 2.34.1