[PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state

Ivan Klokov posted 1 patch 1 year ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20230413133432.53771-1-ivan.klokov@syntacore.com
hw/intc/riscv_aplic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state
Posted by Ivan Klokov 1 year ago
Since g_new is used to initialize the RISCVAPLICState->state structure,
in some case we get behavior that is not as expected. This patch
changes this to g_new0, which allows to initialize the APLIC in the correct state.

Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com>
---
 hw/intc/riscv_aplic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index cfd007e629..71591d44bf 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -803,7 +803,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
 
     aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
     aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
-    aplic->state = g_new(uint32_t, aplic->num_irqs);
+    aplic->state = g_new0(uint32_t, aplic->num_irqs);
     aplic->target = g_new0(uint32_t, aplic->num_irqs);
     if (!aplic->msimode) {
         for (i = 0; i < aplic->num_irqs; i++) {
-- 
2.34.1
Re: [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state
Posted by Alistair Francis 1 year ago
On Thu, Apr 13, 2023 at 11:35 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> Since g_new is used to initialize the RISCVAPLICState->state structure,
> in some case we get behavior that is not as expected. This patch
> changes this to g_new0, which allows to initialize the APLIC in the correct state.
>
> Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/intc/riscv_aplic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index cfd007e629..71591d44bf 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -803,7 +803,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
>
>      aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
>      aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
> -    aplic->state = g_new(uint32_t, aplic->num_irqs);
> +    aplic->state = g_new0(uint32_t, aplic->num_irqs);
>      aplic->target = g_new0(uint32_t, aplic->num_irqs);
>      if (!aplic->msimode) {
>          for (i = 0; i < aplic->num_irqs; i++) {
> --
> 2.34.1
>
>
Re: [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state
Posted by Alistair Francis 1 year ago
On Thu, Apr 13, 2023 at 11:35 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> Since g_new is used to initialize the RISCVAPLICState->state structure,
> in some case we get behavior that is not as expected. This patch
> changes this to g_new0, which allows to initialize the APLIC in the correct state.
>
> Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  hw/intc/riscv_aplic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index cfd007e629..71591d44bf 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -803,7 +803,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
>
>      aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
>      aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
> -    aplic->state = g_new(uint32_t, aplic->num_irqs);
> +    aplic->state = g_new0(uint32_t, aplic->num_irqs);
>      aplic->target = g_new0(uint32_t, aplic->num_irqs);
>      if (!aplic->msimode) {
>          for (i = 0; i < aplic->num_irqs; i++) {
> --
> 2.34.1
>
>
Re: [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state
Posted by Anup Patel 1 year ago
On Thu, Apr 13, 2023 at 7:04 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> Since g_new is used to initialize the RISCVAPLICState->state structure,
> in some case we get behavior that is not as expected. This patch
> changes this to g_new0, which allows to initialize the APLIC in the correct state.
>
> Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  hw/intc/riscv_aplic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index cfd007e629..71591d44bf 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -803,7 +803,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
>
>      aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
>      aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
> -    aplic->state = g_new(uint32_t, aplic->num_irqs);
> +    aplic->state = g_new0(uint32_t, aplic->num_irqs);
>      aplic->target = g_new0(uint32_t, aplic->num_irqs);
>      if (!aplic->msimode) {
>          for (i = 0; i < aplic->num_irqs; i++) {
> --
> 2.34.1
>