target/riscv: Some CPURISCVState related cleanup and simplification

[PATCH 0/4] target/riscv: Some CPURISCVState related cleanup and simplification

Weiwei Li posted 4 patches 1 year, 1 month ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20230309071329.45932-1-liweiwei@iscas.ac.cn

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liweiwei@iscas.ac.cn>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>

target/riscv/cpu.c         |  6 +--
target/riscv/cpu.h         |  3 +-
target/riscv/cpu_helper.c  | 17 ++++----
target/riscv/csr.c         | 87 ++++++++++++--------------------------
target/riscv/gdbstub.c     |  4 +-
target/riscv/pmu.c         | 14 +++---
target/riscv/time_helper.c | 15 +++----
target/riscv/time_helper.h |  2 +-
8 files changed, 57 insertions(+), 91 deletions(-)

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[PATCH 0/4] target/riscv: Some CPURISCVState related cleanup and simplification

Posted by Weiwei Li 1 year, 1 month ago

The patchset tries to:

- Use riscv_cpu_cfg(env) instead of env_archcpu().cfg.
- Use env_archcpu() to get RISCVCPU pointer from env directly
- Use CPURISCVState as argument directly in riscv_cpu_update_mip and riscv_timer_write_timecmp to simplify type conversion
- Remove RISCVCPU argument of riscv_csrrw_check, and get cfg infomation from CPURISCVState directly

The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-cleanup-upstream

Weiwei Li (4):
  target/riscv: Avoid env_archcpu() when reading RISCVCPUConfig
  target/riscv: Simplify getting RISCVCPU pointer from env
  target/riscv: Simplify type conversion for CPURISCVState
  target/riscv: Simplify arguments for riscv_csrrw_check

 target/riscv/cpu.c         |  6 +--
 target/riscv/cpu.h         |  3 +-
 target/riscv/cpu_helper.c  | 17 ++++----
 target/riscv/csr.c         | 87 ++++++++++++--------------------------
 target/riscv/gdbstub.c     |  4 +-
 target/riscv/pmu.c         | 14 +++---
 target/riscv/time_helper.c | 15 +++----
 target/riscv/time_helper.h |  2 +-
 8 files changed, 57 insertions(+), 91 deletions(-)

-- 
2.25.1

Re: [PATCH 0/4] target/riscv: Some CPURISCVState related cleanup and simplification

Posted by Alistair Francis 1 year, 1 month ago

On Thu, Mar 9, 2023 at 5:15 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> The patchset tries to:
>
> - Use riscv_cpu_cfg(env) instead of env_archcpu().cfg.
> - Use env_archcpu() to get RISCVCPU pointer from env directly
> - Use CPURISCVState as argument directly in riscv_cpu_update_mip and riscv_timer_write_timecmp to simplify type conversion
> - Remove RISCVCPU argument of riscv_csrrw_check, and get cfg infomation from CPURISCVState directly
>
> The port is available here:
> https://github.com/plctlab/plct-qemu/tree/plct-cleanup-upstream
>
> Weiwei Li (4):
>   target/riscv: Avoid env_archcpu() when reading RISCVCPUConfig
>   target/riscv: Simplify getting RISCVCPU pointer from env
>   target/riscv: Simplify type conversion for CPURISCVState
>   target/riscv: Simplify arguments for riscv_csrrw_check

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/cpu.c         |  6 +--
>  target/riscv/cpu.h         |  3 +-
>  target/riscv/cpu_helper.c  | 17 ++++----
>  target/riscv/csr.c         | 87 ++++++++++++--------------------------
>  target/riscv/gdbstub.c     |  4 +-
>  target/riscv/pmu.c         | 14 +++---
>  target/riscv/time_helper.c | 15 +++----
>  target/riscv/time_helper.h |  2 +-
>  8 files changed, 57 insertions(+), 91 deletions(-)
>
> --
> 2.25.1
>
>