target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()

[PATCH] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()

Posted by Daniel Henrique Barboza 1 year, 2 months ago

We have a RISCVCPU *cpu pointer available at the start of the function.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 target/riscv/cpu_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index ad8d82662c..3a9472a2ff 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -60,7 +60,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
          * which is not supported by GVEC. So we set vl_eq_vlmax flag to true
          * only when maxsz >= 8 bytes.
          */
-        uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype);
+        uint32_t vlmax = vext_get_vlmax(cpu, env->vtype);
         uint32_t sew = FIELD_EX64(env->vtype, VTYPE, VSEW);
         uint32_t maxsz = vlmax << sew;
         bool vl_eq_vlmax = (env->vstart == 0) && (vlmax == env->vl) &&
-- 
2.39.1

Re: [PATCH] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()

Posted by Palmer Dabbelt 1 year, 2 months ago

On Fri, 10 Feb 2023 04:38:36 PST (-0800), dbarboza@ventanamicro.com wrote:
> We have a RISCVCPU *cpu pointer available at the start of the function.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
>  target/riscv/cpu_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index ad8d82662c..3a9472a2ff 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -60,7 +60,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
>           * which is not supported by GVEC. So we set vl_eq_vlmax flag to true
>           * only when maxsz >= 8 bytes.
>           */
> -        uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype);
> +        uint32_t vlmax = vext_get_vlmax(cpu, env->vtype);
>          uint32_t sew = FIELD_EX64(env->vtype, VTYPE, VSEW);
>          uint32_t maxsz = vlmax << sew;
>          bool vl_eq_vlmax = (env->vstart == 0) && (vlmax == env->vl) &&

Thanks, applied to riscv-to-apply.next

Re: [PATCH] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()

Posted by weiwei 1 year, 2 months ago

On 2023/2/10 20:38, Daniel Henrique Barboza wrote:
> We have a RISCVCPU *cpu pointer available at the start of the function.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>

Regards,

Weiwei Li
> ---
>   target/riscv/cpu_helper.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index ad8d82662c..3a9472a2ff 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -60,7 +60,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc,
>            * which is not supported by GVEC. So we set vl_eq_vlmax flag to true
>            * only when maxsz >= 8 bytes.
>            */
> -        uint32_t vlmax = vext_get_vlmax(env_archcpu(env), env->vtype);
> +        uint32_t vlmax = vext_get_vlmax(cpu, env->vtype);
>           uint32_t sew = FIELD_EX64(env->vtype, VTYPE, VSEW);
>           uint32_t maxsz = vlmax << sew;
>           bool vl_eq_vlmax = (env->vstart == 0) && (vlmax == env->vl) &&

Re: [PATCH] target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()

Posted by Philippe Mathieu-Daudé 1 year, 2 months ago

On 10/2/23 13:38, Daniel Henrique Barboza wrote:
> We have a RISCVCPU *cpu pointer available at the start of the function.
> 
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
>   target/riscv/cpu_helper.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>