From nobody Sat May 18 16:47:01 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1673737594; cv=none; d=zohomail.com; s=zohoarc; b=YtKFP5V4eDyRc903aJ57lrK31wMVPyua5VdUrtHvGchD9tGR6lKVHoAI71QR9aHwvlDTlTnVP5onO5yk+obnPI6SxmgcnYgV5RLagsSFKjtxytvj1SgfSatAaN5yQZlH8u8UaD3w9XynLf3VEiEZZBEqNOvXgaGp4dzR8wWTUtM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1673737594; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ESscYqltv38JAK66qnCh9OoBatoSk12O1tg76EWbi78=; b=mf7RBSmsaZn0EEj6VaDU9J5Lf0WP7xlkNOoqc9LxFL6Pyzoj6G9paIu1BwPgFCIpXnFkDRTQjKgxJM2eQBOVqQTFw6C+ynq5FyCcKZ713BnP8ijgaLSX67sR0iFDrRwDvBp9GbnUgAzvFO6gsCJqkxtFEdPzwijSuV63ew1Fz84= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1673737594282472.13822866756993; Sat, 14 Jan 2023 15:06:34 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pGpaz-0002Q1-Rm; Sat, 14 Jan 2023 18:05:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pGpay-0002PT-94 for qemu-devel@nongnu.org; Sat, 14 Jan 2023 18:05:52 -0500 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pGpav-0000W8-VT for qemu-devel@nongnu.org; Sat, 14 Jan 2023 18:05:52 -0500 Received: by mail-pj1-x1035.google.com with SMTP id m7-20020a17090a730700b00225ebb9cd01so30487352pjk.3 for ; Sat, 14 Jan 2023 15:05:49 -0800 (PST) Received: from stoup.. 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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id l10-20020a170903244a00b0019334350ce6sm12331390pls.244.2023.01.14.15.05.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Jan 2023 15:05:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ESscYqltv38JAK66qnCh9OoBatoSk12O1tg76EWbi78=; b=yHGqPcr36CnNafy4uWKhfqIbE2IuL9G3bymgRNRKHwjEoKle4a/qtIukvswv3efRu4 +0k36SfCNckbGTU95E8zWUsxEVCnv4wqs4KOOj1k9F0KP/yIPeX6NP0Ti2+nn324/cAR aPJZnfgCnL3FW1yizheGqvdeURmNVf2/aQO3dUbw4tTz4fjvJS69IYdEdpB5iTnaV7Rs xRRnOblUEg0xxySN1LrOHS+vFqGtXhlP/drUk74i1v83J0chiZprpbVRFsspY5tFWW+a q6qwUGBkaQiA61lAaJu0eYLRo/35DRd1xv2EkZDRU7kf14HRyJ5KICllj0EDWMYWzVOi JGzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ESscYqltv38JAK66qnCh9OoBatoSk12O1tg76EWbi78=; b=TvFN8KN1t4twS0U+S3kpwk2IowPW1b72LdeO//gqcRc4cyGrJ5q6bDlW7cResPFDA/ uSPga/56e5GhsoDfV7j4HT+UyxpsbIhnGmr62kDu1Kd1LEW8zsMnjm1GKZ4K132u9OdN 0coKMTQmuSjT/A8d9O8xaLfeVoI2rsyfmxB9lkR7m7iWTHEgC2Lr8pyhK7hgJNEt4pq2 F7KxarBZ61a1k6LKXKxHfxeABE/IAT4061X1zsB0GeK6/XT0aTNls2He22MMupUx+4Av ziXnzqx7cQip1N2wIw54bi3N8uTzgWID6zmmDooqipR0L6ir5Hu3ZIA/lSQpI2JvggC8 poGw== X-Gm-Message-State: AFqh2koH7Kvg/lNh5XdX/Fg51Jjg2i2C50DhPS9nbYDmPZAx6hEnDUfP QDBDU9oXzI/XFSSK2tsWvs7fbe3BtJ7wTfnG X-Google-Smtp-Source: AMrXdXu16P5gbNJnGasvhBkQ5JKoPJosGwDvyVPxAwqnPr21MqC1PLBFS/m8aqwl5eTUmGACx4o5yg== X-Received: by 2002:a17:902:e744:b0:194:45ed:2a6a with SMTP id p4-20020a170902e74400b0019445ed2a6amr23337392plf.67.1673737548460; Sat, 14 Jan 2023 15:05:48 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com Subject: [PATCH 1/2] tests/tcg/i386: Introduce and use reg_t consistently Date: Sat, 14 Jan 2023 13:05:41 -1000 Message-Id: <20230114230542.3116013-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230114230542.3116013-1-richard.henderson@linaro.org> References: <20230114230542.3116013-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1673737596465100007 Content-Type: text/plain; charset="utf-8" Define reg_t based on the actual register width. Define the inlines using that type. This will allow input registers to 32-bit insns to be set to 64-bit values on x86-64, which allows testing various edge cases. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- tests/tcg/i386/test-i386-bmi2.c | 182 ++++++++++++++++---------------- 1 file changed, 93 insertions(+), 89 deletions(-) diff --git a/tests/tcg/i386/test-i386-bmi2.c b/tests/tcg/i386/test-i386-bmi= 2.c index 5fadf47510..3c3ef85513 100644 --- a/tests/tcg/i386/test-i386-bmi2.c +++ b/tests/tcg/i386/test-i386-bmi2.c @@ -3,34 +3,40 @@ #include #include =20 +#ifdef __x86_64 +typedef uint64_t reg_t; +#else +typedef uint32_t reg_t; +#endif + #define insn1q(name, arg0) = \ -static inline uint64_t name##q(uint64_t arg0) = \ +static inline reg_t name##q(reg_t arg0) = \ { = \ - uint64_t result64; = \ + reg_t result64; = \ asm volatile (#name "q %1, %0" : "=3Dr"(result64) : "rm"(arg0)); = \ return result64; = \ } =20 #define insn1l(name, arg0) = \ -static inline uint32_t name##l(uint32_t arg0) = \ +static inline reg_t name##l(reg_t arg0) = \ { = \ - uint32_t result32; = \ + reg_t result32; = \ asm volatile (#name "l %k1, %k0" : "=3Dr"(result32) : "rm"(arg0)); = \ return result32; = \ } =20 #define insn2q(name, arg0, c0, arg1, c1) = \ -static inline uint64_t name##q(uint64_t arg0, uint64_t arg1) = \ +static inline reg_t name##q(reg_t arg0, reg_t arg1) = \ { = \ - uint64_t result64; = \ + reg_t result64; = \ asm volatile (#name "q %2, %1, %0" : "=3Dr"(result64) : c0(arg0), c1= (arg1)); \ return result64; = \ } =20 #define insn2l(name, arg0, c0, arg1, c1) = \ -static inline uint32_t name##l(uint32_t arg0, uint32_t arg1) = \ +static inline reg_t name##l(reg_t arg0, reg_t arg1) = \ { = \ - uint32_t result32; = \ + reg_t result32; = \ asm volatile (#name "l %k2, %k1, %k0" : "=3Dr"(result32) : c0(arg0),= c1(arg1)); \ return result32; = \ } @@ -65,130 +71,128 @@ insn1l(blsr, src) int main(int argc, char *argv[]) { uint64_t ehlo =3D 0x202020204f4c4845ull; uint64_t mask =3D 0xa080800302020001ull; - uint32_t result32; + reg_t result; =20 #ifdef __x86_64 - uint64_t result64; - /* 64 bits */ - result64 =3D andnq(mask, ehlo); - assert(result64 =3D=3D 0x002020204d4c4844); + result =3D andnq(mask, ehlo); + assert(result =3D=3D 0x002020204d4c4844); =20 - result64 =3D pextq(ehlo, mask); - assert(result64 =3D=3D 133); + result =3D pextq(ehlo, mask); + assert(result =3D=3D 133); =20 - result64 =3D pdepq(result64, mask); - assert(result64 =3D=3D (ehlo & mask)); + result =3D pdepq(result, mask); + assert(result =3D=3D (ehlo & mask)); =20 - result64 =3D pextq(-1ull, mask); - assert(result64 =3D=3D 511); /* mask has 9 bits set */ + result =3D pextq(-1ull, mask); + assert(result =3D=3D 511); /* mask has 9 bits set */ =20 - result64 =3D pdepq(-1ull, mask); - assert(result64 =3D=3D mask); + result =3D pdepq(-1ull, mask); + assert(result =3D=3D mask); =20 - result64 =3D bextrq(mask, 0x3f00); - assert(result64 =3D=3D (mask & ~INT64_MIN)); + result =3D bextrq(mask, 0x3f00); + assert(result =3D=3D (mask & ~INT64_MIN)); =20 - result64 =3D bextrq(mask, 0x1038); - assert(result64 =3D=3D 0xa0); + result =3D bextrq(mask, 0x1038); + assert(result =3D=3D 0xa0); =20 - result64 =3D bextrq(mask, 0x10f8); - assert(result64 =3D=3D 0); + result =3D bextrq(mask, 0x10f8); + assert(result =3D=3D 0); =20 - result64 =3D blsiq(0x30); - assert(result64 =3D=3D 0x10); + result =3D blsiq(0x30); + assert(result =3D=3D 0x10); =20 - result64 =3D blsiq(0x30ull << 32); - assert(result64 =3D=3D 0x10ull << 32); + result =3D blsiq(0x30ull << 32); + assert(result =3D=3D 0x10ull << 32); =20 - result64 =3D blsmskq(0x30); - assert(result64 =3D=3D 0x1f); + result =3D blsmskq(0x30); + assert(result =3D=3D 0x1f); =20 - result64 =3D blsrq(0x30); - assert(result64 =3D=3D 0x20); + result =3D blsrq(0x30); + assert(result =3D=3D 0x20); =20 - result64 =3D blsrq(0x30ull << 32); - assert(result64 =3D=3D 0x20ull << 32); + result =3D blsrq(0x30ull << 32); + assert(result =3D=3D 0x20ull << 32); =20 - result64 =3D bzhiq(mask, 0x3f); - assert(result64 =3D=3D (mask & ~INT64_MIN)); + result =3D bzhiq(mask, 0x3f); + assert(result =3D=3D (mask & ~INT64_MIN)); =20 - result64 =3D bzhiq(mask, 0x1f); - assert(result64 =3D=3D (mask & ~(-1 << 30))); + result =3D bzhiq(mask, 0x1f); + assert(result =3D=3D (mask & ~(-1 << 30))); =20 - result64 =3D rorxq(0x2132435465768798, 8); - assert(result64 =3D=3D 0x9821324354657687); + result =3D rorxq(0x2132435465768798, 8); + assert(result =3D=3D 0x9821324354657687); =20 - result64 =3D sarxq(0xffeeddccbbaa9988, 8); - assert(result64 =3D=3D 0xffffeeddccbbaa99); + result =3D sarxq(0xffeeddccbbaa9988, 8); + assert(result =3D=3D 0xffffeeddccbbaa99); =20 - result64 =3D sarxq(0x77eeddccbbaa9988, 8 | 64); - assert(result64 =3D=3D 0x0077eeddccbbaa99); + result =3D sarxq(0x77eeddccbbaa9988, 8 | 64); + assert(result =3D=3D 0x0077eeddccbbaa99); =20 - result64 =3D shrxq(0xffeeddccbbaa9988, 8); - assert(result64 =3D=3D 0x00ffeeddccbbaa99); + result =3D shrxq(0xffeeddccbbaa9988, 8); + assert(result =3D=3D 0x00ffeeddccbbaa99); =20 - result64 =3D shrxq(0x77eeddccbbaa9988, 8 | 192); - assert(result64 =3D=3D 0x0077eeddccbbaa99); + result =3D shrxq(0x77eeddccbbaa9988, 8 | 192); + assert(result =3D=3D 0x0077eeddccbbaa99); =20 - result64 =3D shlxq(0xffeeddccbbaa9988, 8); - assert(result64 =3D=3D 0xeeddccbbaa998800); + result =3D shlxq(0xffeeddccbbaa9988, 8); + assert(result =3D=3D 0xeeddccbbaa998800); #endif =20 /* 32 bits */ - result32 =3D andnl(mask, ehlo); - assert(result32 =3D=3D 0x04d4c4844); + result =3D andnl(mask, ehlo); + assert(result =3D=3D 0x04d4c4844); =20 - result32 =3D pextl((uint32_t) ehlo, mask); - assert(result32 =3D=3D 5); + result =3D pextl((uint32_t) ehlo, mask); + assert(result =3D=3D 5); =20 - result32 =3D pdepl(result32, mask); - assert(result32 =3D=3D (uint32_t)(ehlo & mask)); + result =3D pdepl(result, mask); + assert(result =3D=3D (uint32_t)(ehlo & mask)); =20 - result32 =3D pextl(-1u, mask); - assert(result32 =3D=3D 7); /* mask has 3 bits set */ + result =3D pextl(-1u, mask); + assert(result =3D=3D 7); /* mask has 3 bits set */ =20 - result32 =3D pdepl(-1u, mask); - assert(result32 =3D=3D (uint32_t)mask); + result =3D pdepl(-1u, mask); + assert(result =3D=3D (uint32_t)mask); =20 - result32 =3D bextrl(mask, 0x1f00); - assert(result32 =3D=3D (mask & ~INT32_MIN)); + result =3D bextrl(mask, 0x1f00); + assert(result =3D=3D (mask & ~INT32_MIN)); =20 - result32 =3D bextrl(ehlo, 0x1018); - assert(result32 =3D=3D 0x4f); + result =3D bextrl(ehlo, 0x1018); + assert(result =3D=3D 0x4f); =20 - result32 =3D bextrl(mask, 0x1038); - assert(result32 =3D=3D 0); + result =3D bextrl(mask, 0x1038); + assert(result =3D=3D 0); =20 - result32 =3D blsil(0xffff); - assert(result32 =3D=3D 1); + result =3D blsil(0xffff); + assert(result =3D=3D 1); =20 - result32 =3D blsmskl(0x300); - assert(result32 =3D=3D 0x1ff); + result =3D blsmskl(0x300); + assert(result =3D=3D 0x1ff); =20 - result32 =3D blsrl(0xffc); - assert(result32 =3D=3D 0xff8); + result =3D blsrl(0xffc); + assert(result =3D=3D 0xff8); =20 - result32 =3D bzhil(mask, 0xf); - assert(result32 =3D=3D 1); + result =3D bzhil(mask, 0xf); + assert(result =3D=3D 1); =20 - result32 =3D rorxl(0x65768798, 8); - assert(result32 =3D=3D 0x98657687); + result =3D rorxl(0x65768798, 8); + assert(result =3D=3D 0x98657687); =20 - result32 =3D sarxl(0xffeeddcc, 8); - assert(result32 =3D=3D 0xffffeedd); + result =3D sarxl(0xffeeddcc, 8); + assert(result =3D=3D 0xffffeedd); =20 - result32 =3D sarxl(0x77eeddcc, 8 | 32); - assert(result32 =3D=3D 0x0077eedd); + result =3D sarxl(0x77eeddcc, 8 | 32); + assert(result =3D=3D 0x0077eedd); =20 - result32 =3D shrxl(0xffeeddcc, 8); - assert(result32 =3D=3D 0x00ffeedd); + result =3D shrxl(0xffeeddcc, 8); + assert(result =3D=3D 0x00ffeedd); =20 - result32 =3D shrxl(0x77eeddcc, 8 | 128); - assert(result32 =3D=3D 0x0077eedd); + result =3D shrxl(0x77eeddcc, 8 | 128); + assert(result =3D=3D 0x0077eedd); =20 - result32 =3D shlxl(0xffeeddcc, 8); - assert(result32 =3D=3D 0xeeddcc00); + result =3D shlxl(0xffeeddcc, 8); + assert(result =3D=3D 0xeeddcc00); =20 return 0; } --=20 2.34.1 From nobody Sat May 18 16:47:01 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[173.198.77.218]) by smtp.gmail.com with ESMTPSA id l10-20020a170903244a00b0019334350ce6sm12331390pls.244.2023.01.14.15.05.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Jan 2023 15:05:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c/6qnLvEashDiP/jlq0RoDn2u7uOk63bf+cgKHgWoDI=; b=C6F8YNtn5cLyflRIJNM9IaayysIAuef+AOAtwprzqfs40BetGIcYMNYHdYPYSjA+Fv mQW1UKRX4nKDmMabjwWozyfYYJSROKc9/lf/SCp/pWNWsjSkPGNYbYx7HYmr/GFnLiFU YhHtXmST3UvCEIhx6MIekopFZjwVLWZkuSPCAsWHgB285OaTbK2OnjjWINVF5qqzYIyR jO6/Slv1y++2RQenhpMyYE4GtpWL8MxJFq1vufUzWfvkYXEWMIkY7eOc2KJKJVao0E4Y z1iISsozkemAfIMZvXtbuvbnYs8k5rIF0WcCbw4Vvg7uCIx0w8feD/Rqd0ie6aZeCJSM N/KA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c/6qnLvEashDiP/jlq0RoDn2u7uOk63bf+cgKHgWoDI=; b=xlBsQPeXxG1ks0VwZdFtrPaXeIvgja2cSWy3Y8PkwyMx9s5vJmJQQP5kJplZX+1bQD +3Oc7Cfs1zcw/2nT6Jf1U2nqb7+mCzXgeAL+fgCyORcWxuRuSVGXKYYO4MXaWbG7OFCY fMswe1Servgd9y9MeBlJcH3XeG+1RGWW2egHMamf2TnSyKyCn9RSXiZFHMXN3HO6h235 q/tFfxKlko4yGE/so1VWK/upjNl+qNn4D0OEqUPdQzPavZTCKZqoAqa3K9xVDetpaCOB tM0O3tdN5Xc3VFUsTqPMUwTZ5j5fvFEkA7Yd0YmtGgGxZvqe+/Ag82uVJ4x0RpoE1gIl yV3g== X-Gm-Message-State: AFqh2koS2KDphAW/BcgTLQTZNzWfsVP6LanWB/xyYCyHFHJieZhcS0ko hZd+ObYQOE9X5fQmCwvyeZtMYmKoBG1J/CXe X-Google-Smtp-Source: AMrXdXsyAvTdm8YdORKQpd3NoK3CdtD+9hsaKpPlJghHPDd9ahwKLf3ywn9gsf3vxJCKvl85RE44yQ== X-Received: by 2002:a17:902:8686:b0:194:3fd8:f56a with SMTP id g6-20020a170902868600b001943fd8f56amr17936780plo.55.1673737549796; Sat, 14 Jan 2023 15:05:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com Subject: [PATCH 2/2] target/i386: Fix BEXTR instruction Date: Sat, 14 Jan 2023 13:05:42 -1000 Message-Id: <20230114230542.3116013-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230114230542.3116013-1-richard.henderson@linaro.org> References: <20230114230542.3116013-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1673737606508100003 Content-Type: text/plain; charset="utf-8" There were two problems here: not limiting the input to operand bits, and not correctly handling large extraction length. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1372 Signed-off-by: Richard Henderson --- tests/tcg/i386/test-i386-bmi2.c | 12 ++++++++++++ target/i386/tcg/emit.c.inc | 22 +++++++++++----------- 2 files changed, 23 insertions(+), 11 deletions(-) diff --git a/tests/tcg/i386/test-i386-bmi2.c b/tests/tcg/i386/test-i386-bmi= 2.c index 3c3ef85513..982d4abda4 100644 --- a/tests/tcg/i386/test-i386-bmi2.c +++ b/tests/tcg/i386/test-i386-bmi2.c @@ -99,6 +99,9 @@ int main(int argc, char *argv[]) { result =3D bextrq(mask, 0x10f8); assert(result =3D=3D 0); =20 + result =3D bextrq(0xfedcba9876543210ull, 0x7f00); + assert(result =3D=3D 0xfedcba9876543210ull); + result =3D blsiq(0x30); assert(result =3D=3D 0x10); =20 @@ -164,6 +167,15 @@ int main(int argc, char *argv[]) { result =3D bextrl(mask, 0x1038); assert(result =3D=3D 0); =20 + result =3D bextrl((reg_t)0x8f635a775ad3b9b4ull, 0x3018); + assert(result =3D=3D 0x5a); + + result =3D bextrl((reg_t)0xfedcba9876543210ull, 0x7f00); + assert(result =3D=3D 0x76543210u); + + result =3D bextrl(-1, 0); + assert(result =3D=3D 0); + result =3D blsil(0xffff); assert(result =3D=3D 1); =20 diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index 9d610de8c2..4d7702c106 100644 --- a/target/i386/tcg/emit.c.inc +++ b/target/i386/tcg/emit.c.inc @@ -1078,30 +1078,30 @@ static void gen_ANDN(DisasContext *s, CPUX86State *= env, X86DecodedInsn *decode) static void gen_BEXTR(DisasContext *s, CPUX86State *env, X86DecodedInsn *d= ecode) { MemOp ot =3D decode->op[0].ot; - TCGv bound, zero; + TCGv bound =3D tcg_constant_tl(ot =3D=3D MO_64 ? 63 : 31); + TCGv zero =3D tcg_constant_tl(0); + TCGv mone =3D tcg_constant_tl(-1); =20 /* * Extract START, and shift the operand. * Shifts larger than operand size get zeros. */ tcg_gen_ext8u_tl(s->A0, s->T1); + if (TARGET_LONG_BITS =3D=3D 64 && ot =3D=3D MO_32) { + tcg_gen_ext32u_tl(s->T0, s->T0); + } tcg_gen_shr_tl(s->T0, s->T0, s->A0); =20 - bound =3D tcg_constant_tl(ot =3D=3D MO_64 ? 63 : 31); - zero =3D tcg_constant_tl(0); tcg_gen_movcond_tl(TCG_COND_LEU, s->T0, s->A0, bound, s->T0, zero); =20 /* - * Extract the LEN into a mask. Lengths larger than - * operand size get all ones. + * Extract the LEN into an inverse mask. Lengths larger than + * operand size get all zeros, length 0 gets all ones. */ tcg_gen_extract_tl(s->A0, s->T1, 8, 8); - tcg_gen_movcond_tl(TCG_COND_LEU, s->A0, s->A0, bound, s->A0, bound); - - tcg_gen_movi_tl(s->T1, 1); - tcg_gen_shl_tl(s->T1, s->T1, s->A0); - tcg_gen_subi_tl(s->T1, s->T1, 1); - tcg_gen_and_tl(s->T0, s->T0, s->T1); + tcg_gen_shl_tl(s->T1, mone, s->A0); + tcg_gen_movcond_tl(TCG_COND_LEU, s->T1, s->A0, bound, s->T1, zero); + tcg_gen_andc_tl(s->T0, s->T0, s->T1); =20 gen_op_update1_cc(s); set_cc_op(s, CC_OP_LOGICB + ot); --=20 2.34.1